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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
19c93787 HB |
2 | /* |
3 | * Hardware-accelerated CRC-32 variants for Linux on z Systems | |
4 | * | |
5 | * Use the z/Architecture Vector Extension Facility to accelerate the | |
6 | * computing of CRC-32 checksums. | |
7 | * | |
8 | * This CRC-32 implementation algorithm processes the most-significant | |
9 | * bit first (BE). | |
10 | * | |
11 | * Copyright IBM Corp. 2015 | |
12 | * Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com> | |
13 | */ | |
14 | ||
15 | #include <linux/linkage.h> | |
16 | #include <asm/vx-insn.h> | |
17 | ||
18 | /* Vector register range containing CRC-32 constants */ | |
19 | #define CONST_R1R2 %v9 | |
20 | #define CONST_R3R4 %v10 | |
21 | #define CONST_R5 %v11 | |
22 | #define CONST_R6 %v12 | |
23 | #define CONST_RU_POLY %v13 | |
24 | #define CONST_CRC_POLY %v14 | |
25 | ||
26 | .data | |
27 | .align 8 | |
28 | ||
29 | /* | |
30 | * The CRC-32 constant block contains reduction constants to fold and | |
31 | * process particular chunks of the input data stream in parallel. | |
32 | * | |
33 | * For the CRC-32 variants, the constants are precomputed according to | |
34 | * these defintions: | |
35 | * | |
36 | * R1 = x4*128+64 mod P(x) | |
37 | * R2 = x4*128 mod P(x) | |
38 | * R3 = x128+64 mod P(x) | |
39 | * R4 = x128 mod P(x) | |
40 | * R5 = x96 mod P(x) | |
41 | * R6 = x64 mod P(x) | |
42 | * | |
43 | * Barret reduction constant, u, is defined as floor(x**64 / P(x)). | |
44 | * | |
45 | * where P(x) is the polynomial in the normal domain and the P'(x) is the | |
46 | * polynomial in the reversed (bitreflected) domain. | |
47 | * | |
48 | * Note that the constant definitions below are extended in order to compute | |
49 | * intermediate results with a single VECTOR GALOIS FIELD MULTIPLY instruction. | |
50 | * The righmost doubleword can be 0 to prevent contribution to the result or | |
51 | * can be multiplied by 1 to perform an XOR without the need for a separate | |
52 | * VECTOR EXCLUSIVE OR instruction. | |
53 | * | |
54 | * CRC-32 (IEEE 802.3 Ethernet, ...) polynomials: | |
55 | * | |
56 | * P(x) = 0x04C11DB7 | |
57 | * P'(x) = 0xEDB88320 | |
58 | */ | |
59 | ||
60 | .Lconstants_CRC_32_BE: | |
61 | .quad 0x08833794c, 0x0e6228b11 # R1, R2 | |
62 | .quad 0x0c5b9cd4c, 0x0e8a45605 # R3, R4 | |
63 | .quad 0x0f200aa66, 1 << 32 # R5, x32 | |
64 | .quad 0x0490d678d, 1 # R6, 1 | |
65 | .quad 0x104d101df, 0 # u | |
66 | .quad 0x104C11DB7, 0 # P(x) | |
67 | ||
68 | .previous | |
69 | ||
70 | .text | |
71 | /* | |
72 | * The CRC-32 function(s) use these calling conventions: | |
73 | * | |
74 | * Parameters: | |
75 | * | |
76 | * %r2: Initial CRC value, typically ~0; and final CRC (return) value. | |
77 | * %r3: Input buffer pointer, performance might be improved if the | |
78 | * buffer is on a doubleword boundary. | |
79 | * %r4: Length of the buffer, must be 64 bytes or greater. | |
80 | * | |
81 | * Register usage: | |
82 | * | |
83 | * %r5: CRC-32 constant pool base pointer. | |
84 | * V0: Initial CRC value and intermediate constants and results. | |
85 | * V1..V4: Data for CRC computation. | |
86 | * V5..V8: Next data chunks that are fetched from the input buffer. | |
87 | * | |
88 | * V9..V14: CRC-32 constants. | |
89 | */ | |
90 | ENTRY(crc32_be_vgfm_16) | |
91 | /* Load CRC-32 constants */ | |
92 | larl %r5,.Lconstants_CRC_32_BE | |
93 | VLM CONST_R1R2,CONST_CRC_POLY,0,%r5 | |
94 | ||
95 | /* Load the initial CRC value into the leftmost word of V0. */ | |
96 | VZERO %v0 | |
97 | VLVGF %v0,%r2,0 | |
98 | ||
99 | /* Load a 64-byte data chunk and XOR with CRC */ | |
100 | VLM %v1,%v4,0,%r3 /* 64-bytes into V1..V4 */ | |
101 | VX %v1,%v0,%v1 /* V1 ^= CRC */ | |
102 | aghi %r3,64 /* BUF = BUF + 64 */ | |
103 | aghi %r4,-64 /* LEN = LEN - 64 */ | |
104 | ||
105 | /* Check remaining buffer size and jump to proper folding method */ | |
106 | cghi %r4,64 | |
107 | jl .Lless_than_64bytes | |
108 | ||
109 | .Lfold_64bytes_loop: | |
110 | /* Load the next 64-byte data chunk into V5 to V8 */ | |
111 | VLM %v5,%v8,0,%r3 | |
112 | ||
113 | /* | |
114 | * Perform a GF(2) multiplication of the doublewords in V1 with | |
115 | * the reduction constants in V0. The intermediate result is | |
116 | * then folded (accumulated) with the next data chunk in V5 and | |
117 | * stored in V1. Repeat this step for the register contents | |
118 | * in V2, V3, and V4 respectively. | |
119 | */ | |
120 | VGFMAG %v1,CONST_R1R2,%v1,%v5 | |
121 | VGFMAG %v2,CONST_R1R2,%v2,%v6 | |
122 | VGFMAG %v3,CONST_R1R2,%v3,%v7 | |
123 | VGFMAG %v4,CONST_R1R2,%v4,%v8 | |
124 | ||
125 | /* Adjust buffer pointer and length for next loop */ | |
126 | aghi %r3,64 /* BUF = BUF + 64 */ | |
127 | aghi %r4,-64 /* LEN = LEN - 64 */ | |
128 | ||
129 | cghi %r4,64 | |
130 | jnl .Lfold_64bytes_loop | |
131 | ||
132 | .Lless_than_64bytes: | |
133 | /* Fold V1 to V4 into a single 128-bit value in V1 */ | |
134 | VGFMAG %v1,CONST_R3R4,%v1,%v2 | |
135 | VGFMAG %v1,CONST_R3R4,%v1,%v3 | |
136 | VGFMAG %v1,CONST_R3R4,%v1,%v4 | |
137 | ||
138 | /* Check whether to continue with 64-bit folding */ | |
139 | cghi %r4,16 | |
140 | jl .Lfinal_fold | |
141 | ||
142 | .Lfold_16bytes_loop: | |
143 | ||
144 | VL %v2,0,,%r3 /* Load next data chunk */ | |
145 | VGFMAG %v1,CONST_R3R4,%v1,%v2 /* Fold next data chunk */ | |
146 | ||
147 | /* Adjust buffer pointer and size for folding next data chunk */ | |
148 | aghi %r3,16 | |
149 | aghi %r4,-16 | |
150 | ||
151 | /* Process remaining data chunks */ | |
152 | cghi %r4,16 | |
153 | jnl .Lfold_16bytes_loop | |
154 | ||
155 | .Lfinal_fold: | |
156 | /* | |
157 | * The R5 constant is used to fold a 128-bit value into an 96-bit value | |
158 | * that is XORed with the next 96-bit input data chunk. To use a single | |
159 | * VGFMG instruction, multiply the rightmost 64-bit with x^32 (1<<32) to | |
160 | * form an intermediate 96-bit value (with appended zeros) which is then | |
161 | * XORed with the intermediate reduction result. | |
162 | */ | |
163 | VGFMG %v1,CONST_R5,%v1 | |
164 | ||
165 | /* | |
166 | * Further reduce the remaining 96-bit value to a 64-bit value using a | |
167 | * single VGFMG, the rightmost doubleword is multiplied with 0x1. The | |
168 | * intermediate result is then XORed with the product of the leftmost | |
169 | * doubleword with R6. The result is a 64-bit value and is subject to | |
170 | * the Barret reduction. | |
171 | */ | |
172 | VGFMG %v1,CONST_R6,%v1 | |
173 | ||
174 | /* | |
175 | * The input values to the Barret reduction are the degree-63 polynomial | |
176 | * in V1 (R(x)), degree-32 generator polynomial, and the reduction | |
177 | * constant u. The Barret reduction result is the CRC value of R(x) mod | |
178 | * P(x). | |
179 | * | |
180 | * The Barret reduction algorithm is defined as: | |
181 | * | |
182 | * 1. T1(x) = floor( R(x) / x^32 ) GF2MUL u | |
183 | * 2. T2(x) = floor( T1(x) / x^32 ) GF2MUL P(x) | |
184 | * 3. C(x) = R(x) XOR T2(x) mod x^32 | |
185 | * | |
186 | * Note: To compensate the division by x^32, use the vector unpack | |
187 | * instruction to move the leftmost word into the leftmost doubleword | |
188 | * of the vector register. The rightmost doubleword is multiplied | |
189 | * with zero to not contribute to the intermedate results. | |
190 | */ | |
191 | ||
192 | /* T1(x) = floor( R(x) / x^32 ) GF2MUL u */ | |
193 | VUPLLF %v2,%v1 | |
194 | VGFMG %v2,CONST_RU_POLY,%v2 | |
195 | ||
196 | /* | |
197 | * Compute the GF(2) product of the CRC polynomial in VO with T1(x) in | |
198 | * V2 and XOR the intermediate result, T2(x), with the value in V1. | |
199 | * The final result is in the rightmost word of V2. | |
200 | */ | |
201 | VUPLLF %v2,%v2 | |
202 | VGFMAG %v2,CONST_CRC_POLY,%v2,%v1 | |
203 | ||
204 | .Ldone: | |
205 | VLGVF %r2,%v2,3 | |
206 | br %r14 | |
207 | ||
208 | .previous |