[linux-block.git] / arch / riscv / include / asm / vdso / processor.h

/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_VDSO_PROCESSOR_H
#define __ASM_VDSO_PROCESSOR_H

#ifndef __ASSEMBLY__

#include <asm/barrier.h>

static inline void cpu_relax(void)
{
#ifdef __riscv_muldiv
	int dummy;
	/* In lieu of a halt instruction, induce a long-latency stall. */
	__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
#endif

#ifdef __riscv_zihintpause
	/*
	 * Reduce instruction retirement.
	 * This assumes the PC changes.
	 */
	__asm__ __volatile__ ("pause");
#else
	/* Encoding of the pause instruction */
	__asm__ __volatile__ (".4byte 0x100000F");
#endif
	barrier();
}

#endif /* __ASSEMBLY__ */

#endif /* __ASM_VDSO_PROCESSOR_H */
Commit	Line	Data
ad5d1122 VC	1	/* SPDX-License-Identifier: GPL-2.0-only */
	2	#ifndef __ASM_VDSO_PROCESSOR_H
	3	#define __ASM_VDSO_PROCESSOR_H
	4
	5	#ifndef __ASSEMBLY__
	6
30aca1ba RD	7	#include <asm/barrier.h>
30aca1ba RD	8
ad5d1122 VC	9	static inline void cpu_relax(void)
	10	{
	11	#ifdef __riscv_muldiv
0b1d60d6 SH	12	int dummy;
	13	/* In lieu of a halt instruction, induce a long-latency stall. */
	14	__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
ad5d1122	15	#endif
3c349eac PD	16
3c349eac PD	17	#ifdef __riscv_zihintpause
0b1d60d6 SH	18	/*
	19	* Reduce instruction retirement.
	20	* This assumes the PC changes.
	21	*/
0b1d60d6	22	__asm__ __volatile__ ("pause");
8eb060e1	23	#else
0b1d60d6 SH	24	/* Encoding of the pause instruction */
0b1d60d6 SH	25	__asm__ __volatile__ (".4byte 0x100000F");
8eb060e1	26	#endif
ad5d1122 VC	27	barrier();
	28	}
	29
	30	#endif /* __ASSEMBLY__ */
	31
	32	#endif /* __ASM_VDSO_PROCESSOR_H */