Commit | Line | Data |
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1a0e5dbd VC |
1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* | |
3 | * Copyright (C) 2021 Sifive. | |
4 | */ | |
5 | ||
6 | #include <linux/kernel.h> | |
9493e6f3 | 7 | #include <linux/memory.h> |
a8e91016 | 8 | #include <linux/module.h> |
1a0e5dbd VC |
9 | #include <linux/string.h> |
10 | #include <linux/bug.h> | |
11 | #include <asm/patch.h> | |
12 | #include <asm/alternative.h> | |
13 | #include <asm/vendorid_list.h> | |
14 | #include <asm/errata_list.h> | |
15 | ||
16 | struct errata_info_t { | |
17 | char name[ERRATA_STRING_LENGTH_MAX]; | |
18 | bool (*check_func)(unsigned long arch_id, unsigned long impid); | |
19 | }; | |
20 | ||
800149a7 VC |
21 | static bool errata_cip_453_check_func(unsigned long arch_id, unsigned long impid) |
22 | { | |
23 | /* | |
24 | * Affected cores: | |
25 | * Architecture ID: 0x8000000000000007 | |
26 | * Implement ID: 0x20181004 <= impid <= 0x20191105 | |
27 | */ | |
28 | if (arch_id != 0x8000000000000007 || | |
29 | (impid < 0x20181004 || impid > 0x20191105)) | |
30 | return false; | |
31 | return true; | |
32 | } | |
33 | ||
bff3ff52 VC |
34 | static bool errata_cip_1200_check_func(unsigned long arch_id, unsigned long impid) |
35 | { | |
36 | /* | |
37 | * Affected cores: | |
38 | * Architecture ID: 0x8000000000000007 or 0x1 | |
39 | * Implement ID: mimpid[23:0] <= 0x200630 and mimpid != 0x01200626 | |
40 | */ | |
41 | if (arch_id != 0x8000000000000007 && arch_id != 0x1) | |
42 | return false; | |
43 | if ((impid & 0xffffff) > 0x200630 || impid == 0x1200626) | |
44 | return false; | |
45 | return true; | |
46 | } | |
47 | ||
800149a7 VC |
48 | static struct errata_info_t errata_list[ERRATA_SIFIVE_NUMBER] = { |
49 | { | |
50 | .name = "cip-453", | |
51 | .check_func = errata_cip_453_check_func | |
52 | }, | |
bff3ff52 VC |
53 | { |
54 | .name = "cip-1200", | |
55 | .check_func = errata_cip_1200_check_func | |
56 | }, | |
800149a7 VC |
57 | }; |
58 | ||
a8e91016 HS |
59 | static u32 __init_or_module sifive_errata_probe(unsigned long archid, |
60 | unsigned long impid) | |
1a0e5dbd VC |
61 | { |
62 | int idx; | |
63 | u32 cpu_req_errata = 0; | |
64 | ||
65 | for (idx = 0; idx < ERRATA_SIFIVE_NUMBER; idx++) | |
66 | if (errata_list[idx].check_func(archid, impid)) | |
67 | cpu_req_errata |= (1U << idx); | |
68 | ||
69 | return cpu_req_errata; | |
70 | } | |
71 | ||
a8e91016 | 72 | static void __init_or_module warn_miss_errata(u32 miss_errata) |
1a0e5dbd VC |
73 | { |
74 | int i; | |
75 | ||
76 | pr_warn("----------------------------------------------------------------\n"); | |
77 | pr_warn("WARNING: Missing the following errata may cause potential issues\n"); | |
78 | for (i = 0; i < ERRATA_SIFIVE_NUMBER; i++) | |
79 | if (miss_errata & 0x1 << i) | |
80 | pr_warn("\tSiFive Errata[%d]:%s\n", i, errata_list[i].name); | |
81 | pr_warn("Please enable the corresponding Kconfig to apply them\n"); | |
82 | pr_warn("----------------------------------------------------------------\n"); | |
83 | } | |
84 | ||
a8e91016 HS |
85 | void __init_or_module sifive_errata_patch_func(struct alt_entry *begin, |
86 | struct alt_entry *end, | |
87 | unsigned long archid, | |
88 | unsigned long impid, | |
89 | unsigned int stage) | |
1a0e5dbd VC |
90 | { |
91 | struct alt_entry *alt; | |
a35707c3 | 92 | u32 cpu_req_errata; |
1a0e5dbd VC |
93 | u32 cpu_apply_errata = 0; |
94 | u32 tmp; | |
95 | ||
a35707c3 HS |
96 | if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) |
97 | return; | |
98 | ||
99 | cpu_req_errata = sifive_errata_probe(archid, impid); | |
100 | ||
1a0e5dbd VC |
101 | for (alt = begin; alt < end; alt++) { |
102 | if (alt->vendor_id != SIFIVE_VENDOR_ID) | |
103 | continue; | |
104 | if (alt->errata_id >= ERRATA_SIFIVE_NUMBER) { | |
105 | WARN(1, "This errata id:%d is not in kernel errata list", alt->errata_id); | |
106 | continue; | |
107 | } | |
108 | ||
109 | tmp = (1U << alt->errata_id); | |
110 | if (cpu_req_errata & tmp) { | |
9493e6f3 | 111 | mutex_lock(&text_mutex); |
8d23e94a JZ |
112 | patch_text_nosync(ALT_OLD_PTR(alt), ALT_ALT_PTR(alt), |
113 | alt->alt_len); | |
bf89b7ee | 114 | mutex_unlock(&text_mutex); |
1a0e5dbd VC |
115 | cpu_apply_errata |= tmp; |
116 | } | |
117 | } | |
dc5cb7a8 HS |
118 | if (stage != RISCV_ALTERNATIVES_MODULE && |
119 | cpu_apply_errata != cpu_req_errata) | |
1a0e5dbd VC |
120 | warn_miss_errata(cpu_req_errata - cpu_apply_errata); |
121 | } |