Merge tag 'drm-intel-next-2023-11-23' of git://anongit.freedesktop.org/drm/drm-intel...
[linux-2.6-block.git] / arch / riscv / Makefile
CommitLineData
fbe934d6 1# This file is included by the global makefile so that you can add your own
8212f898 2# architecture-specific flags and dependencies.
fbe934d6
PD
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8
26e7aacb 9LDFLAGS_vmlinux := -z norelro
39b33072 10ifeq ($(CONFIG_RELOCATABLE),y)
26e7aacb 11 LDFLAGS_vmlinux += -shared -Bsymbolic -z notext --emit-relocs
39b33072
AG
12 KBUILD_CFLAGS += -fPIE
13endif
a1d2a6b4 14ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
39b33072 15 LDFLAGS_vmlinux += --no-relax
afc76b8b 16 KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY
409c8fb2 17ifeq ($(CONFIG_RISCV_ISA_C),y)
409c8fb2 18 CC_FLAGS_FTRACE := -fpatchable-function-entry=4
6724a76c
GR
19else
20 CC_FLAGS_FTRACE := -fpatchable-function-entry=2
409c8fb2 21endif
a1d2a6b4 22endif
aad15bc8 23
5d2388db 24ifeq ($(CONFIG_CMODEL_MEDLOW),y)
aad15bc8
VC
25KBUILD_CFLAGS_MODULE += -mcmodel=medany
26endif
fbe934d6 27
fbe934d6
PD
28export BITS
29ifeq ($(CONFIG_ARCH_RV64I),y)
30 BITS := 64
31 UTS_MACHINE := riscv64
32
33 KBUILD_CFLAGS += -mabi=lp64
34 KBUILD_AFLAGS += -mabi=lp64
a89757da 35
d503ac53 36 KBUILD_LDFLAGS += -melf64lriscv
fbe934d6
PD
37else
38 BITS := 32
39 UTS_MACHINE := riscv32
40
41 KBUILD_CFLAGS += -mabi=ilp32
42 KBUILD_AFLAGS += -mabi=ilp32
d503ac53 43 KBUILD_LDFLAGS += -melf32lriscv
fbe934d6
PD
44endif
45
ec3a5cb6 46ifeq ($(CONFIG_LD_IS_LLD),y)
fccb3d3e 47ifeq ($(call test-lt, $(CONFIG_LLD_VERSION), 150000),y)
ec3a5cb6
KR
48 KBUILD_CFLAGS += -mno-relax
49 KBUILD_AFLAGS += -mno-relax
52cc02b9 50ifndef CONFIG_AS_IS_LLVM
ec3a5cb6
KR
51 KBUILD_CFLAGS += -Wa,-mno-relax
52 KBUILD_AFLAGS += -Wa,-mno-relax
53endif
54endif
3cebf80e 55endif
ec3a5cb6 56
d1584d79
ST
57ifeq ($(CONFIG_SHADOW_CALL_STACK),y)
58 KBUILD_LDFLAGS += --no-relax-gp
59endif
60
e8be5302 61# ISA string setting
09afac77
CH
62riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
63riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
9671f706 64riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
e8be5302 65riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
fa8e7cce 66riscv-march-$(CONFIG_RISCV_ISA_V) := $(riscv-march-y)v
6df2a016 67
e89c2e81
NC
68ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC
69KBUILD_CFLAGS += -Wa,-misa-spec=2.2
70KBUILD_AFLAGS += -Wa,-misa-spec=2.2
71else
72riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei
73endif
6df2a016 74
8eb060e1 75# Check if the toolchain supports Zihintpause extension
aae538cd 76riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
8eb060e1 77
fa8e7cce
GR
78# Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by
79# matching non-v and non-multi-letter extensions out with the filter ([^v_]*)
80KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')
81
e8be5302 82KBUILD_AFLAGS += -march=$(riscv-march-y)
fbe934d6 83
fbe934d6
PD
84KBUILD_CFLAGS += -mno-save-restore
85KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
86
87ifeq ($(CONFIG_CMODEL_MEDLOW),y)
88 KBUILD_CFLAGS += -mcmodel=medlow
89endif
90ifeq ($(CONFIG_CMODEL_MEDANY),y)
91 KBUILD_CFLAGS += -mcmodel=medany
92endif
ab1ef68e 93
2f394c0e
AS
94# Avoid generating .eh_frame sections.
95KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables
96
e18048da
PD
97# The RISC-V attributes frequently cause compatibility issues and provide no
98# information, so just turn them off.
99KBUILD_CFLAGS += $(call cc-option,-mno-riscv-attribute)
100KBUILD_AFLAGS += $(call cc-option,-mno-riscv-attribute)
101KBUILD_CFLAGS += $(call as-option,-Wa$(comma)-mno-arch-attr)
102KBUILD_AFLAGS += $(call as-option,-Wa$(comma)-mno-arch-attr)
103
ab1ef68e 104KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax)
c1f6eff3 105KBUILD_AFLAGS_MODULE += $(call as-option,-Wa$(comma)-mno-relax)
fbe934d6
PD
106
107# GCC versions that support the "-mstrict-align" option default to allowing
108# unaligned accesses. While unaligned accesses are explicitly allowed in the
109# RISC-V ISA, they're emulated by machine mode traps on all extant
110# architectures. It's faster to have GCC emit only aligned accesses.
111KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
112
fea2fed2
GR
113ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)
114prepare: stack_protector_prepare
115stack_protector_prepare: prepare0
116 $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls \
117 -mstack-protector-guard-reg=tp \
118 -mstack-protector-guard-offset=$(shell \
119 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \
120 include/generated/asm-offsets.h))
121endif
122
889d746e
LVO
123# arch specific predefines for sparse
124CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS)
125
c0fbcd99
AP
126# Default target when executing plain make
127boot := arch/riscv/boot
44c92257
VW
128ifeq ($(CONFIG_XIP_KERNEL),y)
129KBUILD_IMAGE := $(boot)/xipImage
130else
c0fbcd99 131KBUILD_IMAGE := $(boot)/Image.gz
44c92257 132endif
c0fbcd99 133
fbe934d6 134libs-y += arch/riscv/lib/
d7071743 135libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
fbe934d6 136
5a19c7e0 137ifeq ($(KBUILD_EXTMOD),)
a290f510 138ifeq ($(CONFIG_MMU),y)
fde9c59a
SA
139prepare: vdso_prepare
140vdso_prepare: prepare0
141 $(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso include/generated/vdso-offsets.h
0715372a
GR
142 $(if $(CONFIG_COMPAT),$(Q)$(MAKE) \
143 $(build)=arch/riscv/kernel/compat_vdso include/generated/compat_vdso-offsets.h)
144
a290f510 145endif
5a19c7e0 146endif
fde9c59a 147
56769ba4
MY
148vdso-install-y += arch/riscv/kernel/vdso/vdso.so.dbg
149vdso-install-$(CONFIG_COMPAT) += arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg:../compat_vdso/compat_vdso.so
150
44c92257 151ifneq ($(CONFIG_XIP_KERNEL),y)
19ba9cf7 152ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)
37809df4 153KBUILD_IMAGE := $(boot)/loader.bin
405fe7aa 154else
f5579340 155ifeq ($(CONFIG_EFI_ZBOOT),)
405fe7aa 156KBUILD_IMAGE := $(boot)/Image.gz
f5579340
AB
157else
158KBUILD_IMAGE := $(boot)/vmlinuz.efi
159endif
405fe7aa 160endif
44c92257 161endif
f5579340 162BOOT_TARGETS := Image Image.gz loader loader.bin xipImage vmlinuz.efi
c0fbcd99 163
405fe7aa 164all: $(notdir $(KBUILD_IMAGE))
c0fbcd99 165
405fe7aa 166$(BOOT_TARGETS): vmlinux
c0fbcd99 167 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
405fe7aa 168 @$(kecho) ' Kernel: $(boot)/$@ is ready'
c0fbcd99 169
c18d7c17
KW
170Image.%: Image
171 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
172
f774f5bb
MY
173install: KBUILD_IMAGE := $(boot)/Image
174zinstall: KBUILD_IMAGE := $(boot)/Image.gz
399c1ec8 175install zinstall:
f774f5bb 176 $(call cmd,install)
2c42bcbb 177
5d4595db
RD
178PHONY += rv32_randconfig
179rv32_randconfig:
180 $(Q)$(MAKE) KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/32-bit.config \
181 -f $(srctree)/Makefile randconfig
182
183PHONY += rv64_randconfig
184rv64_randconfig:
185 $(Q)$(MAKE) KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/64-bit.config \
186 -f $(srctree)/Makefile randconfig
72f045d1
GR
187
188PHONY += rv32_defconfig
189rv32_defconfig:
190 $(Q)$(MAKE) -f $(srctree)/Makefile defconfig 32-bit.config
77c0c966
JT
191
192PHONY += rv32_nommu_virt_defconfig
193rv32_nommu_virt_defconfig:
194 $(Q)$(MAKE) -f $(srctree)/Makefile nommu_virt_defconfig 32-bit.config