Commit | Line | Data |
---|---|---|
0cbb8a32 LO |
1 | menu "SoC selection" |
2 | ||
444c3dbd CD |
3 | config ARCH_MICROCHIP_POLARFIRE |
4 | def_bool SOC_MICROCHIP_POLARFIRE | |
5 | ||
99b3e3d4 AP |
6 | config SOC_MICROCHIP_POLARFIRE |
7 | bool "Microchip PolarFire SoCs" | |
99b3e3d4 AP |
8 | help |
9 | This enables support for Microchip PolarFire SoC platforms. | |
10 | ||
8292493c LP |
11 | config ARCH_RENESAS |
12 | bool "Renesas RISC-V SoCs" | |
13 | help | |
14 | This enables support for the RISC-V based Renesas SoCs. | |
15 | ||
444c3dbd CD |
16 | config ARCH_SIFIVE |
17 | def_bool SOC_SIFIVE | |
18 | ||
0cbb8a32 | 19 | config SOC_SIFIVE |
de29fe30 | 20 | bool "SiFive SoCs" |
c80ee64a | 21 | select ERRATA_SIFIVE if !XIP_KERNEL |
de29fe30 KK |
22 | help |
23 | This enables support for SiFive SoC platform hardware. | |
0cbb8a32 | 24 | |
444c3dbd CD |
25 | config ARCH_STARFIVE |
26 | def_bool SOC_STARFIVE | |
27 | ||
3d24568b ERB |
28 | config SOC_STARFIVE |
29 | bool "StarFive SoCs" | |
30 | select PINCTRL | |
31 | select RESET_CONTROLLER | |
3d24568b ERB |
32 | help |
33 | This enables support for StarFive SoC platform hardware. | |
34 | ||
444c3dbd CD |
35 | config ARCH_VIRT |
36 | def_bool SOC_VIRT | |
37 | ||
759bdc16 | 38 | config SOC_VIRT |
ab7fbad0 | 39 | bool "QEMU Virt Machine" |
2bc3fc87 | 40 | select CLINT_TIMER if RISCV_M_MODE |
ab7fbad0 KW |
41 | select POWER_RESET |
42 | select POWER_RESET_SYSCON | |
43 | select POWER_RESET_SYSCON_POWEROFF | |
44 | select GOLDFISH | |
45 | select RTC_DRV_GOLDFISH if RTC_CLASS | |
c5179ef1 AP |
46 | select PM_GENERIC_DOMAINS if PM |
47 | select PM_GENERIC_DOMAINS_OF if PM && OF | |
bf9bac40 | 48 | select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI |
ab7fbad0 KW |
49 | help |
50 | This enables support for QEMU Virt Machine. | |
759bdc16 | 51 | |
444c3dbd CD |
52 | config ARCH_CANAAN |
53 | def_bool SOC_CANAAN | |
54 | ||
08734e05 DLM |
55 | config SOC_CANAAN |
56 | bool "Canaan Kendryte K210 SoC" | |
c48c4a4c | 57 | depends on !MMU |
2bc3fc87 | 58 | select CLINT_TIMER if RISCV_M_MODE |
5a2308da | 59 | select ARCH_HAS_RESET_CONTROLLER |
d4c34d09 | 60 | select PINCTRL |
fa59030b | 61 | select COMMON_CLK |
c48c4a4c | 62 | help |
08734e05 | 63 | This enables support for Canaan Kendryte K210 SoC platform hardware. |
c48c4a4c | 64 | |
fc432119 | 65 | if ARCH_CANAAN |
8bb66174 | 66 | |
444c3dbd CD |
67 | config ARCH_CANAAN_K210_DTB_BUILTIN |
68 | def_bool SOC_CANAAN_K210_DTB_BUILTIN | |
69 | ||
08734e05 DLM |
70 | config SOC_CANAAN_K210_DTB_BUILTIN |
71 | bool "Builtin device tree for the Canaan Kendryte K210" | |
fc432119 | 72 | depends on ARCH_CANAAN |
8bb66174 PD |
73 | default y |
74 | select OF | |
75 | select BUILTIN_DTB | |
8bb66174 | 76 | help |
d5805af9 | 77 | Build a device tree for the Kendryte K210 into the Linux image. |
8bb66174 PD |
78 | This option should be selected if no bootloader is being used. |
79 | If unsure, say Y. | |
80 | ||
444c3dbd | 81 | config ARCH_CANAAN_K210_DTB_SOURCE |
6fb4c593 CD |
82 | string |
83 | default SOC_CANAAN_K210_DTB_SOURCE | |
444c3dbd | 84 | |
08734e05 DLM |
85 | config SOC_CANAAN_K210_DTB_SOURCE |
86 | string "Source file for the Canaan Kendryte K210 builtin DTB" | |
fc432119 CD |
87 | depends on ARCH_CANAAN |
88 | depends on ARCH_CANAAN_K210_DTB_BUILTIN | |
67d96729 | 89 | default "k210_generic" |
d5805af9 | 90 | help |
08734e05 | 91 | Base name (without suffix, relative to arch/riscv/boot/dts/canaan) |
d5805af9 DLM |
92 | for the DTS file that will be used to produce the DTB linked into the |
93 | kernel. | |
94 | ||
fc432119 | 95 | endif # ARCH_CANAAN |
d5805af9 | 96 | |
ca503bb2 | 97 | endmenu # "SoC selection" |