Commit | Line | Data |
---|---|---|
0cbb8a32 LO |
1 | menu "SoC selection" |
2 | ||
444c3dbd CD |
3 | config ARCH_MICROCHIP_POLARFIRE |
4 | def_bool SOC_MICROCHIP_POLARFIRE | |
5 | ||
99b3e3d4 AP |
6 | config SOC_MICROCHIP_POLARFIRE |
7 | bool "Microchip PolarFire SoCs" | |
99b3e3d4 AP |
8 | help |
9 | This enables support for Microchip PolarFire SoC platforms. | |
10 | ||
8292493c LP |
11 | config ARCH_RENESAS |
12 | bool "Renesas RISC-V SoCs" | |
13 | help | |
14 | This enables support for the RISC-V based Renesas SoCs. | |
15 | ||
444c3dbd CD |
16 | config ARCH_SIFIVE |
17 | def_bool SOC_SIFIVE | |
18 | ||
0cbb8a32 | 19 | config SOC_SIFIVE |
de29fe30 | 20 | bool "SiFive SoCs" |
c80ee64a | 21 | select ERRATA_SIFIVE if !XIP_KERNEL |
de29fe30 KK |
22 | help |
23 | This enables support for SiFive SoC platform hardware. | |
0cbb8a32 | 24 | |
444c3dbd CD |
25 | config ARCH_STARFIVE |
26 | def_bool SOC_STARFIVE | |
27 | ||
3d24568b ERB |
28 | config SOC_STARFIVE |
29 | bool "StarFive SoCs" | |
30 | select PINCTRL | |
31 | select RESET_CONTROLLER | |
3d24568b ERB |
32 | help |
33 | This enables support for StarFive SoC platform hardware. | |
34 | ||
6f5178ac SH |
35 | config ARCH_SUNXI |
36 | bool "Allwinner sun20i SoCs" | |
37 | depends on MMU && !XIP_KERNEL | |
38 | select ERRATA_THEAD | |
39 | select SUN4I_TIMER | |
40 | help | |
41 | This enables support for Allwinner sun20i platform hardware, | |
42 | including boards based on the D1 and D1s SoCs. | |
43 | ||
444c3dbd CD |
44 | config ARCH_VIRT |
45 | def_bool SOC_VIRT | |
451fb217 | 46 | |
759bdc16 | 47 | config SOC_VIRT |
ab7fbad0 | 48 | bool "QEMU Virt Machine" |
2bc3fc87 | 49 | select CLINT_TIMER if RISCV_M_MODE |
ab7fbad0 KW |
50 | select POWER_RESET |
51 | select POWER_RESET_SYSCON | |
52 | select POWER_RESET_SYSCON_POWEROFF | |
53 | select GOLDFISH | |
54 | select RTC_DRV_GOLDFISH if RTC_CLASS | |
c5179ef1 AP |
55 | select PM_GENERIC_DOMAINS if PM |
56 | select PM_GENERIC_DOMAINS_OF if PM && OF | |
bf9bac40 | 57 | select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI |
ab7fbad0 KW |
58 | help |
59 | This enables support for QEMU Virt Machine. | |
759bdc16 | 60 | |
444c3dbd CD |
61 | config ARCH_CANAAN |
62 | def_bool SOC_CANAAN | |
63 | ||
08734e05 DLM |
64 | config SOC_CANAAN |
65 | bool "Canaan Kendryte K210 SoC" | |
c48c4a4c | 66 | depends on !MMU |
2bc3fc87 | 67 | select CLINT_TIMER if RISCV_M_MODE |
5a2308da | 68 | select ARCH_HAS_RESET_CONTROLLER |
d4c34d09 | 69 | select PINCTRL |
fa59030b | 70 | select COMMON_CLK |
c48c4a4c | 71 | help |
08734e05 | 72 | This enables support for Canaan Kendryte K210 SoC platform hardware. |
c48c4a4c | 73 | |
fc432119 | 74 | if ARCH_CANAAN |
8bb66174 | 75 | |
444c3dbd CD |
76 | config ARCH_CANAAN_K210_DTB_BUILTIN |
77 | def_bool SOC_CANAAN_K210_DTB_BUILTIN | |
78 | ||
08734e05 DLM |
79 | config SOC_CANAAN_K210_DTB_BUILTIN |
80 | bool "Builtin device tree for the Canaan Kendryte K210" | |
fc432119 | 81 | depends on ARCH_CANAAN |
8bb66174 PD |
82 | default y |
83 | select OF | |
84 | select BUILTIN_DTB | |
8bb66174 | 85 | help |
d5805af9 | 86 | Build a device tree for the Kendryte K210 into the Linux image. |
8bb66174 PD |
87 | This option should be selected if no bootloader is being used. |
88 | If unsure, say Y. | |
89 | ||
444c3dbd | 90 | config ARCH_CANAAN_K210_DTB_SOURCE |
6fb4c593 CD |
91 | string |
92 | default SOC_CANAAN_K210_DTB_SOURCE | |
444c3dbd | 93 | |
08734e05 DLM |
94 | config SOC_CANAAN_K210_DTB_SOURCE |
95 | string "Source file for the Canaan Kendryte K210 builtin DTB" | |
fc432119 CD |
96 | depends on ARCH_CANAAN |
97 | depends on ARCH_CANAAN_K210_DTB_BUILTIN | |
67d96729 | 98 | default "k210_generic" |
d5805af9 | 99 | help |
08734e05 | 100 | Base name (without suffix, relative to arch/riscv/boot/dts/canaan) |
d5805af9 DLM |
101 | for the DTS file that will be used to produce the DTB linked into the |
102 | kernel. | |
103 | ||
fc432119 | 104 | endif # ARCH_CANAAN |
d5805af9 | 105 | |
ca503bb2 | 106 | endmenu # "SoC selection" |