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c5a3c2e5 AB |
1 | /* |
2 | * arch/ppc64/kernel/rtas_pci.c | |
3 | * | |
4 | * Copyright (C) 2001 Dave Engebretsen, IBM Corporation | |
5 | * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM | |
6 | * | |
7 | * RTAS specific routines for PCI. | |
8 | * | |
9 | * Based on code from pci.c, chrp_pci.c and pSeries_pci.c | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/threads.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/string.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/bootmem.h> | |
32 | ||
33 | #include <asm/io.h> | |
34 | #include <asm/pgtable.h> | |
35 | #include <asm/irq.h> | |
36 | #include <asm/prom.h> | |
37 | #include <asm/machdep.h> | |
38 | #include <asm/pci-bridge.h> | |
39 | #include <asm/iommu.h> | |
40 | #include <asm/rtas.h> | |
bbeb3f4c | 41 | #include <asm/mpic.h> |
d387899f | 42 | #include <asm/ppc-pci.h> |
c5a3c2e5 AB |
43 | |
44 | /* RTAS tokens */ | |
45 | static int read_pci_config; | |
46 | static int write_pci_config; | |
47 | static int ibm_read_pci_config; | |
48 | static int ibm_write_pci_config; | |
49 | ||
1635317f | 50 | static int config_access_valid(struct pci_dn *dn, int where) |
c5a3c2e5 AB |
51 | { |
52 | if (where < 256) | |
53 | return 1; | |
54 | if (where < 4096 && dn->pci_ext_config_space) | |
55 | return 1; | |
56 | ||
57 | return 0; | |
58 | } | |
59 | ||
293da76b JM |
60 | static int of_device_available(struct device_node * dn) |
61 | { | |
62 | char * status; | |
63 | ||
64 | status = get_property(dn, "status", NULL); | |
65 | ||
66 | if (!status) | |
67 | return 1; | |
68 | ||
69 | if (!strcmp(status, "okay")) | |
70 | return 1; | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
c5a3c2e5 AB |
75 | static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val) |
76 | { | |
77 | int returnval = -1; | |
78 | unsigned long buid, addr; | |
79 | int ret; | |
1635317f | 80 | struct pci_dn *pdn; |
c5a3c2e5 | 81 | |
1635317f | 82 | if (!dn || !dn->data) |
c5a3c2e5 | 83 | return PCIBIOS_DEVICE_NOT_FOUND; |
1635317f PM |
84 | pdn = dn->data; |
85 | if (!config_access_valid(pdn, where)) | |
c5a3c2e5 AB |
86 | return PCIBIOS_BAD_REGISTER_NUMBER; |
87 | ||
1635317f PM |
88 | addr = ((where & 0xf00) << 20) | (pdn->busno << 16) | |
89 | (pdn->devfn << 8) | (where & 0xff); | |
90 | buid = pdn->phb->buid; | |
c5a3c2e5 AB |
91 | if (buid) { |
92 | ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, | |
93 | addr, buid >> 32, buid & 0xffffffff, size); | |
94 | } else { | |
95 | ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); | |
96 | } | |
97 | *val = returnval; | |
98 | ||
99 | if (ret) | |
100 | return PCIBIOS_DEVICE_NOT_FOUND; | |
101 | ||
1635317f PM |
102 | if (returnval == EEH_IO_ERROR_VALUE(size) && |
103 | eeh_dn_check_failure (dn, NULL)) | |
c5a3c2e5 AB |
104 | return PCIBIOS_DEVICE_NOT_FOUND; |
105 | ||
106 | return PCIBIOS_SUCCESSFUL; | |
107 | } | |
108 | ||
109 | static int rtas_pci_read_config(struct pci_bus *bus, | |
110 | unsigned int devfn, | |
111 | int where, int size, u32 *val) | |
112 | { | |
113 | struct device_node *busdn, *dn; | |
114 | ||
115 | if (bus->self) | |
116 | busdn = pci_device_to_OF_node(bus->self); | |
117 | else | |
118 | busdn = bus->sysdata; /* must be a phb */ | |
119 | ||
120 | /* Search only direct children of the bus */ | |
121 | for (dn = busdn->child; dn; dn = dn->sibling) | |
1635317f PM |
122 | if (dn->data && PCI_DN(dn)->devfn == devfn |
123 | && of_device_available(dn)) | |
c5a3c2e5 | 124 | return rtas_read_config(dn, where, size, val); |
1635317f | 125 | |
c5a3c2e5 AB |
126 | return PCIBIOS_DEVICE_NOT_FOUND; |
127 | } | |
128 | ||
1635317f | 129 | int rtas_write_config(struct device_node *dn, int where, int size, u32 val) |
c5a3c2e5 AB |
130 | { |
131 | unsigned long buid, addr; | |
132 | int ret; | |
1635317f | 133 | struct pci_dn *pdn; |
c5a3c2e5 | 134 | |
1635317f | 135 | if (!dn || !dn->data) |
c5a3c2e5 | 136 | return PCIBIOS_DEVICE_NOT_FOUND; |
1635317f PM |
137 | pdn = dn->data; |
138 | if (!config_access_valid(pdn, where)) | |
c5a3c2e5 AB |
139 | return PCIBIOS_BAD_REGISTER_NUMBER; |
140 | ||
1635317f PM |
141 | addr = ((where & 0xf00) << 20) | (pdn->busno << 16) | |
142 | (pdn->devfn << 8) | (where & 0xff); | |
143 | buid = pdn->phb->buid; | |
c5a3c2e5 AB |
144 | if (buid) { |
145 | ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >> 32, buid & 0xffffffff, size, (ulong) val); | |
146 | } else { | |
147 | ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val); | |
148 | } | |
149 | ||
150 | if (ret) | |
151 | return PCIBIOS_DEVICE_NOT_FOUND; | |
152 | ||
153 | return PCIBIOS_SUCCESSFUL; | |
154 | } | |
155 | ||
156 | static int rtas_pci_write_config(struct pci_bus *bus, | |
157 | unsigned int devfn, | |
158 | int where, int size, u32 val) | |
159 | { | |
160 | struct device_node *busdn, *dn; | |
161 | ||
162 | if (bus->self) | |
163 | busdn = pci_device_to_OF_node(bus->self); | |
164 | else | |
165 | busdn = bus->sysdata; /* must be a phb */ | |
166 | ||
167 | /* Search only direct children of the bus */ | |
168 | for (dn = busdn->child; dn; dn = dn->sibling) | |
1635317f PM |
169 | if (dn->data && PCI_DN(dn)->devfn == devfn |
170 | && of_device_available(dn)) | |
c5a3c2e5 AB |
171 | return rtas_write_config(dn, where, size, val); |
172 | return PCIBIOS_DEVICE_NOT_FOUND; | |
173 | } | |
174 | ||
175 | struct pci_ops rtas_pci_ops = { | |
176 | rtas_pci_read_config, | |
177 | rtas_pci_write_config | |
178 | }; | |
179 | ||
180 | int is_python(struct device_node *dev) | |
181 | { | |
182 | char *model = (char *)get_property(dev, "model", NULL); | |
183 | ||
184 | if (model && strstr(model, "Python")) | |
185 | return 1; | |
186 | ||
187 | return 0; | |
188 | } | |
189 | ||
190 | static int get_phb_reg_prop(struct device_node *dev, | |
191 | unsigned int addr_size_words, | |
192 | struct reg_property64 *reg) | |
193 | { | |
194 | unsigned int *ui_ptr = NULL, len; | |
195 | ||
196 | /* Found a PHB, now figure out where his registers are mapped. */ | |
197 | ui_ptr = (unsigned int *)get_property(dev, "reg", &len); | |
198 | if (ui_ptr == NULL) | |
199 | return 1; | |
200 | ||
201 | if (addr_size_words == 1) { | |
202 | reg->address = ((struct reg_property32 *)ui_ptr)->address; | |
203 | reg->size = ((struct reg_property32 *)ui_ptr)->size; | |
204 | } else { | |
205 | *reg = *((struct reg_property64 *)ui_ptr); | |
206 | } | |
207 | ||
208 | return 0; | |
209 | } | |
210 | ||
211 | static void python_countermeasures(struct device_node *dev, | |
212 | unsigned int addr_size_words) | |
213 | { | |
214 | struct reg_property64 reg_struct; | |
215 | void __iomem *chip_regs; | |
216 | volatile u32 val; | |
217 | ||
218 | if (get_phb_reg_prop(dev, addr_size_words, ®_struct)) | |
219 | return; | |
220 | ||
221 | /* Python's register file is 1 MB in size. */ | |
222 | chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000); | |
223 | ||
224 | /* | |
225 | * Firmware doesn't always clear this bit which is critical | |
226 | * for good performance - Anton | |
227 | */ | |
228 | ||
229 | #define PRG_CL_RESET_VALID 0x00010000 | |
230 | ||
231 | val = in_be32(chip_regs + 0xf6030); | |
232 | if (val & PRG_CL_RESET_VALID) { | |
233 | printk(KERN_INFO "Python workaround: "); | |
234 | val &= ~PRG_CL_RESET_VALID; | |
235 | out_be32(chip_regs + 0xf6030, val); | |
236 | /* | |
237 | * We must read it back for changes to | |
238 | * take effect | |
239 | */ | |
240 | val = in_be32(chip_regs + 0xf6030); | |
241 | printk("reg0: %x\n", val); | |
242 | } | |
243 | ||
244 | iounmap(chip_regs); | |
245 | } | |
246 | ||
247 | void __init init_pci_config_tokens (void) | |
248 | { | |
249 | read_pci_config = rtas_token("read-pci-config"); | |
250 | write_pci_config = rtas_token("write-pci-config"); | |
251 | ibm_read_pci_config = rtas_token("ibm,read-pci-config"); | |
252 | ibm_write_pci_config = rtas_token("ibm,write-pci-config"); | |
253 | } | |
254 | ||
255 | unsigned long __devinit get_phb_buid (struct device_node *phb) | |
256 | { | |
257 | int addr_cells; | |
258 | unsigned int *buid_vals; | |
259 | unsigned int len; | |
260 | unsigned long buid; | |
261 | ||
262 | if (ibm_read_pci_config == -1) return 0; | |
263 | ||
264 | /* PHB's will always be children of the root node, | |
265 | * or so it is promised by the current firmware. */ | |
266 | if (phb->parent == NULL) | |
267 | return 0; | |
268 | if (phb->parent->parent) | |
269 | return 0; | |
270 | ||
271 | buid_vals = (unsigned int *) get_property(phb, "reg", &len); | |
272 | if (buid_vals == NULL) | |
273 | return 0; | |
274 | ||
275 | addr_cells = prom_n_addr_cells(phb); | |
276 | if (addr_cells == 1) { | |
277 | buid = (unsigned long) buid_vals[0]; | |
278 | } else { | |
279 | buid = (((unsigned long)buid_vals[0]) << 32UL) | | |
280 | (((unsigned long)buid_vals[1]) & 0xffffffff); | |
281 | } | |
282 | return buid; | |
283 | } | |
284 | ||
285 | static int phb_set_bus_ranges(struct device_node *dev, | |
286 | struct pci_controller *phb) | |
287 | { | |
288 | int *bus_range; | |
289 | unsigned int len; | |
290 | ||
291 | bus_range = (int *) get_property(dev, "bus-range", &len); | |
292 | if (bus_range == NULL || len < 2 * sizeof(int)) { | |
293 | return 1; | |
294 | } | |
295 | ||
296 | phb->first_busno = bus_range[0]; | |
297 | phb->last_busno = bus_range[1]; | |
298 | ||
299 | return 0; | |
300 | } | |
301 | ||
302 | static int __devinit setup_phb(struct device_node *dev, | |
303 | struct pci_controller *phb, | |
304 | unsigned int addr_size_words) | |
305 | { | |
306 | pci_setup_pci_controller(phb); | |
307 | ||
308 | if (is_python(dev)) | |
309 | python_countermeasures(dev, addr_size_words); | |
310 | ||
311 | if (phb_set_bus_ranges(dev, phb)) | |
312 | return 1; | |
313 | ||
314 | phb->arch_data = dev; | |
315 | phb->ops = &rtas_pci_ops; | |
316 | phb->buid = get_phb_buid(dev); | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
321 | static void __devinit add_linux_pci_domain(struct device_node *dev, | |
322 | struct pci_controller *phb, | |
323 | struct property *of_prop) | |
324 | { | |
325 | memset(of_prop, 0, sizeof(struct property)); | |
326 | of_prop->name = "linux,pci-domain"; | |
327 | of_prop->length = sizeof(phb->global_number); | |
328 | of_prop->value = (unsigned char *)&of_prop[1]; | |
329 | memcpy(of_prop->value, &phb->global_number, sizeof(phb->global_number)); | |
330 | prom_add_property(dev, of_prop); | |
331 | } | |
332 | ||
333 | static struct pci_controller * __init alloc_phb(struct device_node *dev, | |
334 | unsigned int addr_size_words) | |
335 | { | |
336 | struct pci_controller *phb; | |
337 | struct property *of_prop; | |
338 | ||
339 | phb = alloc_bootmem(sizeof(struct pci_controller)); | |
340 | if (phb == NULL) | |
341 | return NULL; | |
342 | ||
343 | of_prop = alloc_bootmem(sizeof(struct property) + | |
344 | sizeof(phb->global_number)); | |
345 | if (!of_prop) | |
346 | return NULL; | |
347 | ||
348 | if (setup_phb(dev, phb, addr_size_words)) | |
349 | return NULL; | |
350 | ||
351 | add_linux_pci_domain(dev, phb, of_prop); | |
352 | ||
353 | return phb; | |
354 | } | |
355 | ||
356 | static struct pci_controller * __devinit alloc_phb_dynamic(struct device_node *dev, unsigned int addr_size_words) | |
357 | { | |
358 | struct pci_controller *phb; | |
359 | ||
360 | phb = (struct pci_controller *)kmalloc(sizeof(struct pci_controller), | |
361 | GFP_KERNEL); | |
362 | if (phb == NULL) | |
363 | return NULL; | |
364 | ||
365 | if (setup_phb(dev, phb, addr_size_words)) | |
366 | return NULL; | |
367 | ||
368 | phb->is_dynamic = 1; | |
369 | ||
370 | /* TODO: linux,pci-domain? */ | |
371 | ||
372 | return phb; | |
373 | } | |
374 | ||
375 | unsigned long __init find_and_init_phbs(void) | |
376 | { | |
377 | struct device_node *node; | |
378 | struct pci_controller *phb; | |
379 | unsigned int root_size_cells = 0; | |
380 | unsigned int index; | |
381 | unsigned int *opprop = NULL; | |
382 | struct device_node *root = of_find_node_by_path("/"); | |
383 | ||
384 | if (ppc64_interrupt_controller == IC_OPEN_PIC) { | |
385 | opprop = (unsigned int *)get_property(root, | |
386 | "platform-open-pic", NULL); | |
387 | } | |
388 | ||
389 | root_size_cells = prom_n_size_cells(root); | |
390 | ||
391 | index = 0; | |
392 | ||
393 | for (node = of_get_next_child(root, NULL); | |
394 | node != NULL; | |
395 | node = of_get_next_child(root, node)) { | |
396 | if (node->type == NULL || strcmp(node->type, "pci") != 0) | |
397 | continue; | |
398 | ||
399 | phb = alloc_phb(node, root_size_cells); | |
400 | if (!phb) | |
401 | continue; | |
402 | ||
f7abbc19 | 403 | pci_process_bridge_OF_ranges(phb, node, 0); |
c5a3c2e5 AB |
404 | pci_setup_phb_io(phb, index == 0); |
405 | #ifdef CONFIG_PPC_PSERIES | |
406 | if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) { | |
407 | int addr = root_size_cells * (index + 2) - 1; | |
408 | mpic_assign_isu(pSeries_mpic, index, opprop[addr]); | |
409 | } | |
410 | #endif | |
411 | index++; | |
412 | } | |
413 | ||
414 | of_node_put(root); | |
415 | pci_devs_phb_init(); | |
416 | ||
417 | /* | |
418 | * pci_probe_only and pci_assign_all_buses can be set via properties | |
419 | * in chosen. | |
420 | */ | |
421 | if (of_chosen) { | |
422 | int *prop; | |
423 | ||
424 | prop = (int *)get_property(of_chosen, "linux,pci-probe-only", | |
425 | NULL); | |
426 | if (prop) | |
427 | pci_probe_only = *prop; | |
428 | ||
429 | prop = (int *)get_property(of_chosen, | |
430 | "linux,pci-assign-all-buses", NULL); | |
431 | if (prop) | |
432 | pci_assign_all_buses = *prop; | |
433 | } | |
434 | ||
435 | return 0; | |
436 | } | |
437 | ||
438 | struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn) | |
439 | { | |
440 | struct device_node *root = of_find_node_by_path("/"); | |
441 | unsigned int root_size_cells = 0; | |
442 | struct pci_controller *phb; | |
443 | struct pci_bus *bus; | |
444 | int primary; | |
445 | ||
446 | root_size_cells = prom_n_size_cells(root); | |
447 | ||
448 | primary = list_empty(&hose_list); | |
449 | phb = alloc_phb_dynamic(dn, root_size_cells); | |
450 | if (!phb) | |
451 | return NULL; | |
452 | ||
f7abbc19 | 453 | pci_process_bridge_OF_ranges(phb, dn, primary); |
c5a3c2e5 AB |
454 | |
455 | pci_setup_phb_io_dynamic(phb, primary); | |
456 | of_node_put(root); | |
457 | ||
458 | pci_devs_phb_init_dynamic(phb); | |
459 | phb->last_busno = 0xff; | |
460 | bus = pci_scan_bus(phb->first_busno, phb->ops, phb->arch_data); | |
461 | phb->bus = bus; | |
462 | phb->last_busno = bus->subordinate; | |
463 | ||
464 | return phb; | |
465 | } | |
466 | EXPORT_SYMBOL(init_phb_dynamic); | |
467 | ||
468 | /* RPA-specific bits for removing PHBs */ | |
469 | int pcibios_remove_root_bus(struct pci_controller *phb) | |
470 | { | |
471 | struct pci_bus *b = phb->bus; | |
472 | struct resource *res; | |
473 | int rc, i; | |
474 | ||
475 | res = b->resource[0]; | |
476 | if (!res->flags) { | |
477 | printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__, | |
478 | b->name); | |
479 | return 1; | |
480 | } | |
481 | ||
482 | rc = unmap_bus_range(b); | |
483 | if (rc) { | |
484 | printk(KERN_ERR "%s: failed to unmap IO on bus %s\n", | |
485 | __FUNCTION__, b->name); | |
486 | return 1; | |
487 | } | |
488 | ||
489 | if (release_resource(res)) { | |
490 | printk(KERN_ERR "%s: failed to release IO on bus %s\n", | |
491 | __FUNCTION__, b->name); | |
492 | return 1; | |
493 | } | |
494 | ||
495 | for (i = 1; i < 3; ++i) { | |
496 | res = b->resource[i]; | |
497 | if (!res->flags && i == 0) { | |
498 | printk(KERN_ERR "%s: no MEM resource for PHB %s\n", | |
499 | __FUNCTION__, b->name); | |
500 | return 1; | |
501 | } | |
502 | if (res->flags && release_resource(res)) { | |
503 | printk(KERN_ERR | |
504 | "%s: failed to release IO %d on bus %s\n", | |
505 | __FUNCTION__, i, b->name); | |
506 | return 1; | |
507 | } | |
508 | } | |
509 | ||
510 | list_del(&phb->list_node); | |
511 | if (phb->is_dynamic) | |
512 | kfree(phb); | |
513 | ||
514 | return 0; | |
515 | } | |
516 | EXPORT_SYMBOL(pcibios_remove_root_bus); |