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1da177e4 LT |
1 | /* |
2 | * arch/ppc/platforms/gemini_setup.c | |
3 | * | |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * Synergy Microsystems board support by Dan Cox (dan@synergymicro.com) | |
8 | * | |
9 | */ | |
10 | ||
11 | #include <linux/config.h> | |
12 | #include <linux/stddef.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/reboot.h> | |
17 | #include <linux/pci.h> | |
18 | #include <linux/time.h> | |
19 | #include <linux/kdev_t.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/major.h> | |
22 | #include <linux/initrd.h> | |
23 | #include <linux/console.h> | |
1da177e4 LT |
24 | #include <linux/seq_file.h> |
25 | #include <linux/root_dev.h> | |
26 | #include <linux/bcd.h> | |
27 | ||
28 | #include <asm/system.h> | |
29 | #include <asm/pgtable.h> | |
30 | #include <asm/page.h> | |
31 | #include <asm/dma.h> | |
32 | #include <asm/io.h> | |
33 | #include <asm/m48t35.h> | |
34 | #include <platforms/gemini.h> | |
35 | #include <asm/time.h> | |
36 | #include <asm/open_pic.h> | |
37 | #include <asm/bootinfo.h> | |
38 | ||
39 | void gemini_find_bridges(void); | |
40 | static int gemini_get_clock_speed(void); | |
41 | extern void gemini_pcibios_fixup(void); | |
42 | ||
43 | static char *gemini_board_families[] = { | |
44 | "VGM", "VSS", "KGM", "VGR", "VCM", "VCS", "KCM", "VCR" | |
45 | }; | |
46 | static int gemini_board_count = sizeof(gemini_board_families) / | |
47 | sizeof(gemini_board_families[0]); | |
48 | ||
49 | static unsigned int cpu_7xx[16] = { | |
50 | 0, 15, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0 | |
51 | }; | |
52 | static unsigned int cpu_6xx[16] = { | |
53 | 0, 0, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 0, 12, 7, 0 | |
54 | }; | |
55 | ||
56 | /* | |
57 | * prom_init is the Gemini version of prom.c:prom_init. We only need | |
58 | * the BSS clearing code, so I copied that out of prom.c. This is a | |
59 | * lot simpler than hacking prom.c so it will build with Gemini. -VAL | |
60 | */ | |
61 | ||
62 | #define PTRRELOC(x) ((typeof(x))((unsigned long)(x) + offset)) | |
63 | ||
64 | unsigned long | |
65 | prom_init(void) | |
66 | { | |
67 | unsigned long offset = reloc_offset(); | |
68 | unsigned long phys; | |
69 | extern char __bss_start, _end; | |
70 | ||
71 | /* First zero the BSS -- use memset, some arches don't have | |
72 | * caches on yet */ | |
73 | memset_io(PTRRELOC(&__bss_start),0 , &_end - &__bss_start); | |
74 | ||
75 | /* Default */ | |
76 | phys = offset + KERNELBASE; | |
77 | ||
78 | gemini_prom_init(); | |
79 | ||
80 | return phys; | |
81 | } | |
82 | ||
83 | int | |
84 | gemini_show_cpuinfo(struct seq_file *m) | |
85 | { | |
86 | unsigned char reg, rev; | |
87 | char *family; | |
88 | unsigned int type; | |
89 | ||
90 | reg = readb(GEMINI_FEAT); | |
91 | family = gemini_board_families[((reg>>4) & 0xf)]; | |
92 | if (((reg>>4) & 0xf) > gemini_board_count) | |
93 | printk(KERN_ERR "cpuinfo(): unable to determine board family\n"); | |
94 | ||
95 | reg = readb(GEMINI_BREV); | |
96 | type = (reg>>4) & 0xf; | |
97 | rev = reg & 0xf; | |
98 | ||
99 | reg = readb(GEMINI_BECO); | |
100 | ||
101 | seq_printf(m, "machine\t\t: Gemini %s%d, rev %c, eco %d\n", | |
102 | family, type, (rev + 'A'), (reg & 0xf)); | |
103 | ||
104 | seq_printf(m, "board\t\t: Gemini %s", family); | |
105 | if (type > 9) | |
106 | seq_printf(m, "%c", (type - 10) + 'A'); | |
107 | else | |
108 | seq_printf(m, "%d", type); | |
109 | ||
110 | seq_printf(m, ", rev %c, eco %d\n", (rev + 'A'), (reg & 0xf)); | |
111 | ||
112 | seq_printf(m, "clock\t\t: %dMhz\n", gemini_get_clock_speed()); | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
117 | static u_char gemini_openpic_initsenses[] = { | |
118 | 1, | |
119 | 1, | |
120 | 1, | |
121 | 1, | |
122 | 0, | |
123 | 0, | |
124 | 1, /* remainder are level-triggered */ | |
125 | }; | |
126 | ||
127 | #define GEMINI_MPIC_ADDR (0xfcfc0000) | |
128 | #define GEMINI_MPIC_PCI_CFG (0x80005800) | |
129 | ||
130 | void __init gemini_openpic_init(void) | |
131 | { | |
132 | ||
133 | OpenPIC_Addr = (volatile struct OpenPIC *) | |
134 | grackle_read(GEMINI_MPIC_PCI_CFG + 0x10); | |
135 | OpenPIC_InitSenses = gemini_openpic_initsenses; | |
136 | OpenPIC_NumInitSenses = sizeof( gemini_openpic_initsenses ); | |
137 | ||
138 | ioremap( GEMINI_MPIC_ADDR, OPENPIC_SIZE); | |
139 | } | |
140 | ||
141 | ||
142 | extern unsigned long loops_per_jiffy; | |
143 | extern int root_mountflags; | |
144 | extern char cmd_line[]; | |
145 | ||
146 | void | |
147 | gemini_heartbeat(void) | |
148 | { | |
149 | static unsigned long led = GEMINI_LEDBASE+(4*8); | |
150 | static char direction = 8; | |
151 | ||
152 | ||
153 | /* We only want to do this on 1 CPU */ | |
154 | if (smp_processor_id()) | |
155 | return; | |
156 | *(char *)led = 0; | |
157 | if ( (led + direction) > (GEMINI_LEDBASE+(7*8)) || | |
158 | (led + direction) < (GEMINI_LEDBASE+(4*8)) ) | |
159 | direction *= -1; | |
160 | led += direction; | |
161 | *(char *)led = 0xff; | |
162 | ppc_md.heartbeat_count = ppc_md.heartbeat_reset; | |
163 | } | |
164 | ||
165 | void __init gemini_setup_arch(void) | |
166 | { | |
167 | extern char cmd_line[]; | |
168 | ||
169 | ||
170 | loops_per_jiffy = 50000000/HZ; | |
171 | ||
172 | #ifdef CONFIG_BLK_DEV_INITRD | |
173 | /* bootable off CDROM */ | |
174 | if (initrd_start) | |
175 | ROOT_DEV = Root_SR0; | |
176 | else | |
177 | #endif | |
178 | ROOT_DEV = Root_SDA1; | |
179 | ||
180 | /* nothing but serial consoles... */ | |
181 | sprintf(cmd_line, "%s console=ttyS0", cmd_line); | |
182 | ||
183 | printk("Boot arguments: %s\n", cmd_line); | |
184 | ||
185 | ppc_md.heartbeat = gemini_heartbeat; | |
186 | ppc_md.heartbeat_reset = HZ/8; | |
187 | ppc_md.heartbeat_count = 1; | |
188 | ||
189 | /* Lookup PCI hosts */ | |
190 | gemini_find_bridges(); | |
191 | /* take special pains to map the MPIC, since it isn't mapped yet */ | |
192 | gemini_openpic_init(); | |
193 | /* start the L2 */ | |
194 | gemini_init_l2(); | |
195 | } | |
196 | ||
197 | ||
198 | int | |
199 | gemini_get_clock_speed(void) | |
200 | { | |
201 | unsigned long hid1, pvr; | |
202 | int clock; | |
203 | ||
204 | pvr = mfspr(SPRN_PVR); | |
205 | hid1 = (mfspr(SPRN_HID1) >> 28) & 0xf; | |
206 | if (PVR_VER(pvr) == 8 || | |
207 | PVR_VER(pvr) == 12) | |
208 | hid1 = cpu_7xx[hid1]; | |
209 | else | |
210 | hid1 = cpu_6xx[hid1]; | |
211 | ||
212 | switch((readb(GEMINI_BSTAT) & 0xc) >> 2) { | |
213 | ||
214 | case 0: | |
215 | default: | |
216 | clock = (hid1*100)/3; | |
217 | break; | |
218 | ||
219 | case 1: | |
220 | clock = (hid1*125)/3; | |
221 | break; | |
222 | ||
223 | case 2: | |
224 | clock = (hid1*50); | |
225 | break; | |
226 | } | |
227 | ||
228 | return clock; | |
229 | } | |
230 | ||
231 | void __init gemini_init_l2(void) | |
232 | { | |
233 | unsigned char reg, brev, fam, creg; | |
234 | unsigned long cache; | |
235 | unsigned long pvr; | |
236 | ||
237 | reg = readb(GEMINI_L2CFG); | |
238 | brev = readb(GEMINI_BREV); | |
239 | fam = readb(GEMINI_FEAT); | |
240 | pvr = mfspr(SPRN_PVR); | |
241 | ||
242 | switch(PVR_VER(pvr)) { | |
243 | ||
244 | case 8: | |
245 | if (reg & 0xc0) | |
246 | cache = (((reg >> 6) & 0x3) << 28); | |
247 | else | |
248 | cache = 0x3 << 28; | |
249 | ||
250 | #ifdef CONFIG_SMP | |
251 | /* Pre-3.0 processor revs had snooping errata. Leave | |
252 | their L2's disabled with SMP. -- Dan */ | |
253 | if (PVR_CFG(pvr) < 3) { | |
254 | printk("Pre-3.0 750; L2 left disabled!\n"); | |
255 | return; | |
256 | } | |
257 | #endif /* CONFIG_SMP */ | |
258 | ||
259 | /* Special case: VGM5-B's came before L2 ratios were set on | |
260 | the board. Processor speed shouldn't be too high, so | |
261 | set L2 ratio to 1:1.5. */ | |
262 | if ((brev == 0x51) && ((fam & 0xa0) >> 4) == 0) | |
263 | reg |= 1; | |
264 | ||
265 | /* determine best cache ratio based upon what the board | |
266 | tells us (which sometimes _may_ not be true) and | |
267 | the processor speed. */ | |
268 | else { | |
269 | if (gemini_get_clock_speed() > 250) | |
270 | reg = 2; | |
271 | } | |
272 | break; | |
273 | case 12: | |
274 | { | |
275 | static unsigned long l2_size_val = 0; | |
276 | ||
277 | if (!l2_size_val) | |
278 | l2_size_val = _get_L2CR(); | |
279 | cache = l2_size_val; | |
280 | break; | |
281 | } | |
282 | case 4: | |
283 | case 9: | |
284 | creg = readb(GEMINI_CPUSTAT); | |
285 | if (((creg & 0xc) >> 2) != 1) | |
286 | printk("Dual-604 boards don't support the use of L2\n"); | |
287 | else | |
288 | writeb(1, GEMINI_L2CFG); | |
289 | return; | |
290 | default: | |
291 | printk("Unknown processor; L2 left disabled\n"); | |
292 | return; | |
293 | } | |
294 | ||
295 | cache |= ((1<<reg) << 25); | |
296 | cache |= (L2CR_L2RAM_MASK|L2CR_L2CTL|L2CR_L2DO); | |
297 | _set_L2CR(0); | |
298 | _set_L2CR(cache | L2CR_L2E); | |
299 | ||
300 | } | |
301 | ||
302 | void | |
303 | gemini_restart(char *cmd) | |
304 | { | |
305 | local_irq_disable(); | |
306 | /* make a clean restart, not via the MPIC */ | |
307 | _gemini_reboot(); | |
308 | for(;;); | |
309 | } | |
310 | ||
311 | void | |
312 | gemini_power_off(void) | |
313 | { | |
314 | for(;;); | |
315 | } | |
316 | ||
317 | void | |
318 | gemini_halt(void) | |
319 | { | |
320 | gemini_restart(NULL); | |
321 | } | |
322 | ||
323 | void __init gemini_init_IRQ(void) | |
324 | { | |
325 | /* gemini has no 8259 */ | |
326 | openpic_init(1, 0, 0, -1); | |
327 | } | |
328 | ||
329 | #define gemini_rtc_read(x) (readb(GEMINI_RTC+(x))) | |
330 | #define gemini_rtc_write(val,x) (writeb((val),(GEMINI_RTC+(x)))) | |
331 | ||
332 | /* ensure that the RTC is up and running */ | |
333 | long __init gemini_time_init(void) | |
334 | { | |
335 | unsigned char reg; | |
336 | ||
337 | reg = gemini_rtc_read(M48T35_RTC_CONTROL); | |
338 | ||
339 | if ( reg & M48T35_RTC_STOPPED ) { | |
340 | printk(KERN_INFO "M48T35 real-time-clock was stopped. Now starting...\n"); | |
341 | gemini_rtc_write((reg & ~(M48T35_RTC_STOPPED)), M48T35_RTC_CONTROL); | |
342 | gemini_rtc_write((reg | M48T35_RTC_SET), M48T35_RTC_CONTROL); | |
343 | } | |
344 | return 0; | |
345 | } | |
346 | ||
347 | #undef DEBUG_RTC | |
348 | ||
349 | unsigned long | |
350 | gemini_get_rtc_time(void) | |
351 | { | |
352 | unsigned int year, mon, day, hour, min, sec; | |
353 | unsigned char reg; | |
354 | ||
355 | reg = gemini_rtc_read(M48T35_RTC_CONTROL); | |
356 | gemini_rtc_write((reg|M48T35_RTC_READ), M48T35_RTC_CONTROL); | |
357 | #ifdef DEBUG_RTC | |
358 | printk("get rtc: reg = %x\n", reg); | |
359 | #endif | |
360 | ||
361 | do { | |
362 | sec = gemini_rtc_read(M48T35_RTC_SECONDS); | |
363 | min = gemini_rtc_read(M48T35_RTC_MINUTES); | |
364 | hour = gemini_rtc_read(M48T35_RTC_HOURS); | |
365 | day = gemini_rtc_read(M48T35_RTC_DOM); | |
366 | mon = gemini_rtc_read(M48T35_RTC_MONTH); | |
367 | year = gemini_rtc_read(M48T35_RTC_YEAR); | |
368 | } while( sec != gemini_rtc_read(M48T35_RTC_SECONDS)); | |
369 | #ifdef DEBUG_RTC | |
370 | printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n", | |
371 | sec, min, hour, day, mon, year); | |
372 | #endif | |
373 | ||
374 | gemini_rtc_write(reg, M48T35_RTC_CONTROL); | |
375 | ||
376 | BCD_TO_BIN(sec); | |
377 | BCD_TO_BIN(min); | |
378 | BCD_TO_BIN(hour); | |
379 | BCD_TO_BIN(day); | |
380 | BCD_TO_BIN(mon); | |
381 | BCD_TO_BIN(year); | |
382 | ||
383 | if ((year += 1900) < 1970) | |
384 | year += 100; | |
385 | #ifdef DEBUG_RTC | |
386 | printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n", | |
387 | sec, min, hour, day, mon, year); | |
388 | #endif | |
389 | ||
390 | return mktime( year, mon, day, hour, min, sec ); | |
391 | } | |
392 | ||
393 | ||
394 | int | |
395 | gemini_set_rtc_time( unsigned long now ) | |
396 | { | |
397 | unsigned char reg; | |
398 | struct rtc_time tm; | |
399 | ||
400 | to_tm( now, &tm ); | |
401 | ||
402 | reg = gemini_rtc_read(M48T35_RTC_CONTROL); | |
403 | #ifdef DEBUG_RTC | |
404 | printk("set rtc: reg = %x\n", reg); | |
405 | #endif | |
406 | ||
407 | gemini_rtc_write((reg|M48T35_RTC_SET), M48T35_RTC_CONTROL); | |
408 | #ifdef DEBUG_RTC | |
409 | printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n", | |
410 | tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year); | |
411 | #endif | |
412 | ||
413 | tm.tm_year -= 1900; | |
414 | BIN_TO_BCD(tm.tm_sec); | |
415 | BIN_TO_BCD(tm.tm_min); | |
416 | BIN_TO_BCD(tm.tm_hour); | |
417 | BIN_TO_BCD(tm.tm_mon); | |
418 | BIN_TO_BCD(tm.tm_mday); | |
419 | BIN_TO_BCD(tm.tm_year); | |
420 | #ifdef DEBUG_RTC | |
421 | printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n", | |
422 | tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year); | |
423 | #endif | |
424 | ||
425 | gemini_rtc_write(tm.tm_sec, M48T35_RTC_SECONDS); | |
426 | gemini_rtc_write(tm.tm_min, M48T35_RTC_MINUTES); | |
427 | gemini_rtc_write(tm.tm_hour, M48T35_RTC_HOURS); | |
428 | gemini_rtc_write(tm.tm_mday, M48T35_RTC_DOM); | |
429 | gemini_rtc_write(tm.tm_mon, M48T35_RTC_MONTH); | |
430 | gemini_rtc_write(tm.tm_year, M48T35_RTC_YEAR); | |
431 | ||
432 | /* done writing */ | |
433 | gemini_rtc_write(reg, M48T35_RTC_CONTROL); | |
434 | ||
1da177e4 LT |
435 | return 0; |
436 | } | |
437 | ||
438 | /* use the RTC to determine the decrementer count */ | |
439 | void __init gemini_calibrate_decr(void) | |
440 | { | |
441 | int freq, divisor; | |
442 | unsigned char reg; | |
443 | ||
444 | /* determine processor bus speed */ | |
445 | reg = readb(GEMINI_BSTAT); | |
446 | ||
447 | switch(((reg & 0x0c)>>2)&0x3) { | |
448 | case 0: | |
449 | default: | |
450 | freq = 66667; | |
451 | break; | |
452 | case 1: | |
453 | freq = 83000; | |
454 | break; | |
455 | case 2: | |
456 | freq = 100000; | |
457 | break; | |
458 | } | |
459 | ||
460 | freq *= 1000; | |
461 | divisor = 4; | |
462 | tb_ticks_per_jiffy = freq / HZ / divisor; | |
463 | tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000); | |
464 | } | |
465 | ||
466 | unsigned long __init gemini_find_end_of_memory(void) | |
467 | { | |
468 | unsigned long total; | |
469 | unsigned char reg; | |
470 | ||
471 | reg = readb(GEMINI_MEMCFG); | |
472 | total = ((1<<((reg & 0x7) - 1)) * | |
473 | (8<<((reg >> 3) & 0x7))); | |
474 | total *= (1024*1024); | |
475 | return total; | |
476 | } | |
477 | ||
478 | static void __init | |
479 | gemini_map_io(void) | |
480 | { | |
481 | io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO); | |
482 | io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO); | |
483 | } | |
484 | ||
485 | #ifdef CONFIG_SMP | |
486 | static int | |
487 | smp_gemini_probe(void) | |
488 | { | |
489 | int i, nr; | |
490 | ||
491 | nr = (readb(GEMINI_CPUSTAT) & GEMINI_CPU_COUNT_MASK) >> 2; | |
492 | if (nr == 0) | |
493 | nr = 4; | |
494 | ||
495 | if (nr > 1) { | |
496 | openpic_request_IPIs(); | |
497 | for (i = 1; i < nr; ++i) | |
498 | smp_hw_index[i] = i; | |
499 | } | |
500 | ||
501 | return nr; | |
502 | } | |
503 | ||
504 | static void | |
505 | smp_gemini_kick_cpu(int nr) | |
506 | { | |
507 | openpic_reset_processor_phys(1 << nr); | |
508 | openpic_reset_processor_phys(0); | |
509 | } | |
510 | ||
511 | static void | |
512 | smp_gemini_setup_cpu(int cpu_nr) | |
513 | { | |
514 | if (OpenPIC_Addr) | |
515 | do_openpic_setup_cpu(); | |
516 | if (cpu_nr > 0) | |
517 | gemini_init_l2(); | |
518 | } | |
519 | ||
520 | static struct smp_ops_t gemini_smp_ops = { | |
521 | smp_openpic_message_pass, | |
522 | smp_gemini_probe, | |
523 | smp_gemini_kick_cpu, | |
524 | smp_gemini_setup_cpu, | |
525 | .give_timebase = smp_generic_give_timebase, | |
526 | .take_timebase = smp_generic_take_timebase, | |
527 | }; | |
528 | #endif /* CONFIG_SMP */ | |
529 | ||
530 | void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |
531 | unsigned long r6, unsigned long r7) | |
532 | { | |
533 | int i; | |
534 | ||
535 | /* Restore BATs for now */ | |
536 | mtspr(SPRN_DBAT3U, 0xf0001fff); | |
537 | mtspr(SPRN_DBAT3L, 0xf000002a); | |
538 | ||
539 | parse_bootinfo(find_bootinfo()); | |
540 | ||
541 | for(i = 0; i < GEMINI_LEDS; i++) | |
542 | gemini_led_off(i); | |
543 | ||
544 | ISA_DMA_THRESHOLD = 0; | |
545 | DMA_MODE_READ = 0; | |
546 | DMA_MODE_WRITE = 0; | |
547 | ||
548 | #ifdef CONFIG_BLK_DEV_INITRD | |
549 | if ( r4 ) | |
550 | { | |
551 | initrd_start = r4 + KERNELBASE; | |
552 | initrd_end = r5 + KERNELBASE; | |
553 | } | |
554 | #endif | |
555 | ||
556 | ppc_md.setup_arch = gemini_setup_arch; | |
557 | ppc_md.show_cpuinfo = gemini_show_cpuinfo; | |
558 | ppc_md.irq_canonicalize = NULL; | |
559 | ppc_md.init_IRQ = gemini_init_IRQ; | |
560 | ppc_md.get_irq = openpic_get_irq; | |
561 | ppc_md.init = NULL; | |
562 | ||
563 | ppc_md.restart = gemini_restart; | |
564 | ppc_md.power_off = gemini_power_off; | |
565 | ppc_md.halt = gemini_halt; | |
566 | ||
567 | ppc_md.time_init = gemini_time_init; | |
568 | ppc_md.set_rtc_time = gemini_set_rtc_time; | |
569 | ppc_md.get_rtc_time = gemini_get_rtc_time; | |
570 | ppc_md.calibrate_decr = gemini_calibrate_decr; | |
571 | ||
572 | ppc_md.find_end_of_memory = gemini_find_end_of_memory; | |
573 | ppc_md.setup_io_mappings = gemini_map_io; | |
574 | ||
575 | ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup; | |
576 | ||
577 | #ifdef CONFIG_SMP | |
578 | ppc_md.smp_ops = &gemini_smp_ops; | |
579 | #endif /* CONFIG_SMP */ | |
580 | } |