Commit | Line | Data |
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1da177e4 | 1 | /* |
3e9e7c1d | 2 | * Sycamore board definitions |
1da177e4 | 3 | * |
3e9e7c1d MP |
4 | * Copyright (c) 2005 DENX Software Engineering |
5 | * Stefan Roese <sr@denx.de> | |
6 | * | |
7 | * Based on original work by | |
8 | * Armin Kuster <akuster@mvista.com> | |
9 | * 2000 (c) MontaVista, Software, Inc. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify it | |
12 | * under the terms of the GNU General Public License as published by the | |
13 | * Free Software Foundation; either version 2 of the License, or (at your | |
14 | * option) any later version. | |
1da177e4 | 15 | * |
1da177e4 LT |
16 | */ |
17 | ||
18 | #ifdef __KERNEL__ | |
19 | #ifndef __ASM_SYCAMORE_H__ | |
20 | #define __ASM_SYCAMORE_H__ | |
21 | ||
3e9e7c1d | 22 | #include <linux/config.h> |
1da177e4 | 23 | #include <platforms/4xx/ibm405gpr.h> |
3e9e7c1d | 24 | #include <asm/ppcboot.h> |
1da177e4 | 25 | |
3e9e7c1d | 26 | /* Memory map for the IBM "Sycamore" 405GPr evaluation board. |
1da177e4 LT |
27 | * Generic 4xx plus RTC. |
28 | */ | |
29 | ||
1da177e4 LT |
30 | #define SYCAMORE_RTC_PADDR ((uint)0xf0000000) |
31 | #define SYCAMORE_RTC_VADDR SYCAMORE_RTC_PADDR | |
3e9e7c1d | 32 | #define SYCAMORE_RTC_SIZE ((uint)8*1024) |
1da177e4 | 33 | |
1da177e4 | 34 | #define BASE_BAUD 691200 |
1da177e4 | 35 | |
3e9e7c1d MP |
36 | #define SYCAMORE_PS2_BASE 0xF0100000 |
37 | ||
38 | /* Flash */ | |
39 | #define PPC40x_FPGA_BASE 0xF0300000 | |
40 | #define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */ | |
41 | #define PPC40x_FLASH_ONBD_N(x) (x & 0x02) | |
42 | #define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) | |
43 | #define PPC40x_FLASH_LOW 0xFFF00000 | |
44 | #define PPC40x_FLASH_HIGH 0xFFF80000 | |
45 | #define PPC40x_FLASH_SIZE 0x80000 | |
1da177e4 LT |
46 | |
47 | #define PPC4xx_MACHINE_NAME "IBM Sycamore" | |
48 | ||
1da177e4 LT |
49 | #endif /* __ASM_SYCAMORE_H__ */ |
50 | #endif /* __KERNEL__ */ |