projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 | 1 | /* |
| 1da177e4 LT |
2 | * Luan board definitions |
| 3 | * | |
| 4 | * Matt Porter <mporter@kernel.crashing.org> | |
| 5 | * | |
| 6 | * Copyright 2004-2005 MontaVista Software Inc. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or modify it | |
| 9 | * under the terms of the GNU General Public License as published by the | |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 11 | * option) any later version. | |
| 12 | * | |
| 13 | */ | |
| 14 | ||
| 15 | #ifdef __KERNEL__ | |
| 16 | #ifndef __ASM_LUAN_H__ | |
| 17 | #define __ASM_LUAN_H__ | |
| 18 | ||
| 19 | #include <linux/config.h> | |
| 20 | #include <platforms/4xx/ibm440sp.h> | |
| 21 | ||
| 22 | /* F/W TLB mapping used in bootloader glue to reset EMAC */ | |
| 23 | #define PPC44x_EMAC0_MR0 0xa0000800 | |
| 24 | ||
| 25 | /* Location of MAC addresses in PIBS image */ | |
| 26 | #define PIBS_FLASH_BASE 0xffe00000 | |
| 27 | #define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400) | |
| 28 | ||
| 29 | /* External timer clock frequency */ | |
| 30 | #define LUAN_TMR_CLK 25000000 | |
| 31 | ||
| 32 | /* Flash */ | |
| 33 | #define LUAN_FPGA_REG_0 0x0000000148300000ULL | |
| 34 | #define LUAN_BOOT_LARGE_FLASH(x) (x & 0x40) | |
| 35 | #define LUAN_SMALL_FLASH_LOW 0x00000001ff900000ULL | |
| 36 | #define LUAN_SMALL_FLASH_HIGH 0x00000001ffe00000ULL | |
| 37 | #define LUAN_SMALL_FLASH_SIZE 0x100000 | |
| 38 | #define LUAN_LARGE_FLASH_LOW 0x00000001ff800000ULL | |
| 39 | #define LUAN_LARGE_FLASH_HIGH 0x00000001ffc00000ULL | |
| 40 | #define LUAN_LARGE_FLASH_SIZE 0x400000 | |
| 41 | ||
| 42 | /* | |
| 43 | * Serial port defines | |
| 44 | */ | |
| 45 | #define RS_TABLE_SIZE 3 | |
| 46 | ||
| 47 | /* PIBS defined UART mappings, used before early_serial_setup */ | |
| 48 | #define UART0_IO_BASE 0xa0000200 | |
| 49 | #define UART1_IO_BASE 0xa0000300 | |
| 50 | #define UART2_IO_BASE 0xa0000600 | |
| 51 | ||
| 52 | #define BASE_BAUD 11059200 | |
| 53 | #define STD_UART_OP(num) \ | |
| 54 | { 0, BASE_BAUD, 0, UART##num##_INT, \ | |
| 55 | (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ | |
| cc506644 | 56 | iomem_base: (void*)UART##num##_IO_BASE, \ |
| 1da177e4 LT |
57 | io_type: SERIAL_IO_MEM}, |
| 58 | ||
| 59 | #define SERIAL_PORT_DFNS \ | |
| 60 | STD_UART_OP(0) \ | |
| 61 | STD_UART_OP(1) \ | |
| 62 | STD_UART_OP(2) | |
| 63 | ||
| 64 | /* PCI support */ | |
| 65 | #define LUAN_PCIX_LOWER_IO 0x00000000 | |
| 66 | #define LUAN_PCIX_UPPER_IO 0x0000ffff | |
| 67 | #define LUAN_PCIX0_LOWER_MEM 0x80000000 | |
| 68 | #define LUAN_PCIX0_UPPER_MEM 0x9fffffff | |
| 69 | #define LUAN_PCIX1_LOWER_MEM 0xa0000000 | |
| 70 | #define LUAN_PCIX1_UPPER_MEM 0xbfffffff | |
| 71 | #define LUAN_PCIX2_LOWER_MEM 0xc0000000 | |
| 72 | #define LUAN_PCIX2_UPPER_MEM 0xdfffffff | |
| 73 | ||
| 74 | #define LUAN_PCIX_MEM_SIZE 0x20000000 | |
| 75 | #define LUAN_PCIX_MEM_OFFSET 0x00000000 | |
| 76 | ||
| 77 | #endif /* __ASM_LUAN_H__ */ | |
| 78 | #endif /* __KERNEL__ */ |