[linux-2.6-block.git] / arch / powerpc / sysdev / qe_lib / ucc_fast.c

/*
 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
 *
 * Authors: 	Shlomi Gridish <gridish@freescale.com>
 * 		Li Yang <leoli@freescale.com>
 *
 * Description:
 * QE UCC Fast API Set - UCC Fast specific routines implementations.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/stddef.h>
#include <linux/interrupt.h>
#include <linux/err.h>
#include <linux/module.h>

#include <asm/io.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>

#include <asm/ucc.h>
#include <asm/ucc_fast.h>

void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
{
	printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num);
	printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs);

	printk(KERN_INFO "gumr  : addr - 0x%08x, val - 0x%08x",
		  (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
	printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x",
		  (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
	printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
	printk(KERN_INFO "udsr  : addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
	printk(KERN_INFO "ucce  : addr - 0x%08x, val - 0x%08x",
		  (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
	printk(KERN_INFO "uccm  : addr - 0x%08x, val - 0x%08x",
		  (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
	printk(KERN_INFO "uccs  : addr - 0x%08x, val - 0x%02x",
		  (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs);
	printk(KERN_INFO "urfb  : addr - 0x%08x, val - 0x%08x",
		  (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
	printk(KERN_INFO "urfs  : addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
	printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
	printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->urfset,
		  in_be16(&uccf->uf_regs->urfset));
	printk(KERN_INFO "utfb  : addr - 0x%08x, val - 0x%08x",
		  (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
	printk(KERN_INFO "utfs  : addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
	printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
	printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
	printk(KERN_INFO "utpt  : addr - 0x%08x, val - 0x%04x",
		  (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
	printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x",
		  (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
	printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x",
		  (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr);
}
EXPORT_SYMBOL(ucc_fast_dump_regs);

u32 ucc_fast_get_qe_cr_subblock(int uccf_num)
{
	switch (uccf_num) {
	case 0: return QE_CR_SUBBLOCK_UCCFAST1;
	case 1: return QE_CR_SUBBLOCK_UCCFAST2;
	case 2: return QE_CR_SUBBLOCK_UCCFAST3;
	case 3: return QE_CR_SUBBLOCK_UCCFAST4;
	case 4: return QE_CR_SUBBLOCK_UCCFAST5;
	case 5: return QE_CR_SUBBLOCK_UCCFAST6;
	case 6: return QE_CR_SUBBLOCK_UCCFAST7;
	case 7: return QE_CR_SUBBLOCK_UCCFAST8;
	default: return QE_CR_SUBBLOCK_INVALID;
	}
}
EXPORT_SYMBOL(ucc_fast_get_qe_cr_subblock);

void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf)
{
	out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
}
EXPORT_SYMBOL(ucc_fast_transmit_on_demand);

void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode)
{
	struct ucc_fast *uf_regs;
	u32 gumr;

	uf_regs = uccf->uf_regs;

	/* Enable reception and/or transmission on this UCC. */
	gumr = in_be32(&uf_regs->gumr);
	if (mode & COMM_DIR_TX) {
		gumr |= UCC_FAST_GUMR_ENT;
		uccf->enabled_tx = 1;
	}
	if (mode & COMM_DIR_RX) {
		gumr |= UCC_FAST_GUMR_ENR;
		uccf->enabled_rx = 1;
	}
	out_be32(&uf_regs->gumr, gumr);
}
EXPORT_SYMBOL(ucc_fast_enable);

void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode)
{
	struct ucc_fast *uf_regs;
	u32 gumr;

	uf_regs = uccf->uf_regs;

	/* Disable reception and/or transmission on this UCC. */
	gumr = in_be32(&uf_regs->gumr);
	if (mode & COMM_DIR_TX) {
		gumr &= ~UCC_FAST_GUMR_ENT;
		uccf->enabled_tx = 0;
	}
	if (mode & COMM_DIR_RX) {
		gumr &= ~UCC_FAST_GUMR_ENR;
		uccf->enabled_rx = 0;
	}
	out_be32(&uf_regs->gumr, gumr);
}
EXPORT_SYMBOL(ucc_fast_disable);

int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret)
{
	struct ucc_fast_private *uccf;
	struct ucc_fast *uf_regs;
	u32 gumr;
	int ret;

	if (!uf_info)
		return -EINVAL;

	/* check if the UCC port number is in range. */
	if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) {
		printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
		return -EINVAL;
	}

	/* Check that 'max_rx_buf_length' is properly aligned (4). */
	if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) {
		printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__);
		return -EINVAL;
	}

	/* Validate Virtual Fifo register values */
	if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) {
		printk(KERN_ERR "%s: urfs is too small", __FUNCTION__);
		return -EINVAL;
	}

	if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
		printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__);
		return -EINVAL;
	}

	if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
		printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__);
		return -EINVAL;
	}

	if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
		printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__);
		return -EINVAL;
	}

	if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
		printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__);
		return -EINVAL;
	}

	if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
		printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__);
		return -EINVAL;
	}

	if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
		printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__);
		return -EINVAL;
	}

	uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL);
	if (!uccf) {
		printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
		return -ENOMEM;
	}

	/* Fill fast UCC structure */
	uccf->uf_info = uf_info;
	/* Set the PHY base address */
	uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
	if (uccf->uf_regs == NULL) {
		printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
		return -ENOMEM;
	}

	uccf->enabled_tx = 0;
	uccf->enabled_rx = 0;
	uccf->stopped_tx = 0;
	uccf->stopped_rx = 0;
	uf_regs = uccf->uf_regs;
	uccf->p_ucce = (u32 *) & (uf_regs->ucce);
	uccf->p_uccm = (u32 *) & (uf_regs->uccm);
#ifdef CONFIG_UGETH_TX_ON_DEMAND
	uccf->p_utodr = (u16 *) & (uf_regs->utodr);
#endif
#ifdef STATISTICS
	uccf->tx_frames = 0;
	uccf->rx_frames = 0;
	uccf->rx_discarded = 0;
#endif				/* STATISTICS */

	/* Init Guemr register */
	if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) {
		printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
		ucc_fast_free(uccf);
		return ret;
	}

	/* Set UCC to fast type */
	if ((ret = ucc_set_type(uf_info->ucc_num,
				(struct ucc_common *) (uf_regs),
				UCC_SPEED_TYPE_FAST))) {
		printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
		ucc_fast_free(uccf);
		return ret;
	}

	uccf->mrblr = uf_info->max_rx_buf_length;

	/* Set GUMR */
	/* For more details see the hardware spec. */
	gumr = uf_info->ttx_trx;
	if (uf_info->tci)
		gumr |= UCC_FAST_GUMR_TCI;
	if (uf_info->cdp)
		gumr |= UCC_FAST_GUMR_CDP;
	if (uf_info->ctsp)
		gumr |= UCC_FAST_GUMR_CTSP;
	if (uf_info->cds)
		gumr |= UCC_FAST_GUMR_CDS;
	if (uf_info->ctss)
		gumr |= UCC_FAST_GUMR_CTSS;
	if (uf_info->txsy)
		gumr |= UCC_FAST_GUMR_TXSY;
	if (uf_info->rsyn)
		gumr |= UCC_FAST_GUMR_RSYN;
	gumr |= uf_info->synl;
	if (uf_info->rtsm)
		gumr |= UCC_FAST_GUMR_RTSM;
	gumr |= uf_info->renc;
	if (uf_info->revd)
		gumr |= UCC_FAST_GUMR_REVD;
	gumr |= uf_info->tenc;
	gumr |= uf_info->tcrc;
	gumr |= uf_info->mode;
	out_be32(&uf_regs->gumr, gumr);

	/* Allocate memory for Tx Virtual Fifo */
	uccf->ucc_fast_tx_virtual_fifo_base_offset =
	    qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
	if (IS_ERR_VALUE(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
		printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
		uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
		ucc_fast_free(uccf);
		return -ENOMEM;
	}

	/* Allocate memory for Rx Virtual Fifo */
	uccf->ucc_fast_rx_virtual_fifo_base_offset =
		qe_muram_alloc(uf_info->urfs +
			   UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
			   UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
	if (IS_ERR_VALUE(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
		printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
		uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
		ucc_fast_free(uccf);
		return -ENOMEM;
	}

	/* Set Virtual Fifo registers */
	out_be16(&uf_regs->urfs, uf_info->urfs);
	out_be16(&uf_regs->urfet, uf_info->urfet);
	out_be16(&uf_regs->urfset, uf_info->urfset);
	out_be16(&uf_regs->utfs, uf_info->utfs);
	out_be16(&uf_regs->utfet, uf_info->utfet);
	out_be16(&uf_regs->utftt, uf_info->utftt);
	/* utfb, urfb are offsets from MURAM base */
	out_be32(&uf_regs->utfb, uccf->ucc_fast_tx_virtual_fifo_base_offset);
	out_be32(&uf_regs->urfb, uccf->ucc_fast_rx_virtual_fifo_base_offset);

	/* Mux clocking */
	/* Grant Support */
	ucc_set_qe_mux_grant(uf_info->ucc_num, uf_info->grant_support);
	/* Breakpoint Support */
	ucc_set_qe_mux_bkpt(uf_info->ucc_num, uf_info->brkpt_support);
	/* Set Tsa or NMSI mode. */
	ucc_set_qe_mux_tsa(uf_info->ucc_num, uf_info->tsa);
	/* If NMSI (not Tsa), set Tx and Rx clock. */
	if (!uf_info->tsa) {
		/* Rx clock routing */
		if ((uf_info->rx_clock != QE_CLK_NONE) &&
		    ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock,
					COMM_DIR_RX)) {
			printk(KERN_ERR "%s: illegal value for RX clock",
			       __FUNCTION__);
			ucc_fast_free(uccf);
			return -EINVAL;
		}
		/* Tx clock routing */
		if ((uf_info->tx_clock != QE_CLK_NONE) &&
		    ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock,
					COMM_DIR_TX)) {
			printk(KERN_ERR "%s: illegal value for TX clock",
			       __FUNCTION__);
			ucc_fast_free(uccf);
			return -EINVAL;
		}
	}

	/* Set interrupt mask register at UCC level. */
	out_be32(&uf_regs->uccm, uf_info->uccm_mask);

	/* First, clear anything pending at UCC level,
	 * otherwise, old garbage may come through
	 * as soon as the dam is opened. */

	/* Writing '1' clears */
	out_be32(&uf_regs->ucce, 0xffffffff);

	*uccf_ret = uccf;
	return 0;
}
EXPORT_SYMBOL(ucc_fast_init);

void ucc_fast_free(struct ucc_fast_private * uccf)
{
	if (!uccf)
		return;

	if (uccf->ucc_fast_tx_virtual_fifo_base_offset)
		qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);

	if (uccf->ucc_fast_rx_virtual_fifo_base_offset)
		qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);

	kfree(uccf);
}
EXPORT_SYMBOL(ucc_fast_free);
Commit	Line	Data
98658538	1	/*
98658538 LY	2	* Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
	3	*
	4	* Authors: Shlomi Gridish <gridish@freescale.com>
	5	* Li Yang <leoli@freescale.com>
	6	*
5af68af5 TT	7	* Description:
	8	* QE UCC Fast API Set - UCC Fast specific routines implementations.
	9	*
98658538 LY	10	* This program is free software; you can redistribute it and/or modify it
	11	* under the terms of the GNU General Public License as published by the
	12	* Free Software Foundation; either version 2 of the License, or (at your
	13	* option) any later version.
	14	*/
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/errno.h>
	18	#include <linux/slab.h>
	19	#include <linux/stddef.h>
	20	#include <linux/interrupt.h>
4c35630c	21	#include <linux/err.h>
65482ccf	22	#include <linux/module.h>
98658538 LY	23
	24	#include <asm/io.h>
	25	#include <asm/immap_qe.h>
	26	#include <asm/qe.h>
	27
	28	#include <asm/ucc.h>
	29	#include <asm/ucc_fast.h>
	30
98658538 LY	31	void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
98658538 LY	32	{
5af68af5 TT	33	printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num);
5af68af5 TT	34	printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs);
98658538	35
5af68af5	36	printk(KERN_INFO "gumr : addr - 0x%08x, val - 0x%08x",
98658538	37	(u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
5af68af5	38	printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x",
98658538	39	(u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
5af68af5	40	printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x",
98658538	41	(u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
5af68af5	42	printk(KERN_INFO "udsr : addr - 0x%08x, val - 0x%04x",
98658538	43	(u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
5af68af5	44	printk(KERN_INFO "ucce : addr - 0x%08x, val - 0x%08x",
98658538	45	(u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
5af68af5	46	printk(KERN_INFO "uccm : addr - 0x%08x, val - 0x%08x",
98658538	47	(u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
5af68af5	48	printk(KERN_INFO "uccs : addr - 0x%08x, val - 0x%02x",
98658538	49	(u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs);
5af68af5	50	printk(KERN_INFO "urfb : addr - 0x%08x, val - 0x%08x",
98658538	51	(u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
5af68af5	52	printk(KERN_INFO "urfs : addr - 0x%08x, val - 0x%04x",
98658538	53	(u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
5af68af5	54	printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x",
98658538	55	(u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
5af68af5	56	printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x",
98658538 LY	57	(u32) & uccf->uf_regs->urfset,
98658538 LY	58	in_be16(&uccf->uf_regs->urfset));
5af68af5	59	printk(KERN_INFO "utfb : addr - 0x%08x, val - 0x%08x",
98658538	60	(u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
5af68af5	61	printk(KERN_INFO "utfs : addr - 0x%08x, val - 0x%04x",
98658538	62	(u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
5af68af5	63	printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x",
98658538	64	(u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
5af68af5	65	printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x",
98658538	66	(u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
5af68af5	67	printk(KERN_INFO "utpt : addr - 0x%08x, val - 0x%04x",
98658538	68	(u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
5af68af5	69	printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x",
98658538	70	(u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
5af68af5	71	printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x",
98658538 LY	72	(u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr);
98658538 LY	73	}
65482ccf	74	EXPORT_SYMBOL(ucc_fast_dump_regs);
98658538 LY	75
	76	u32 ucc_fast_get_qe_cr_subblock(int uccf_num)
	77	{
	78	switch (uccf_num) {
5af68af5	79	case 0: return QE_CR_SUBBLOCK_UCCFAST1;
98658538 LY	80	case 1: return QE_CR_SUBBLOCK_UCCFAST2;
	81	case 2: return QE_CR_SUBBLOCK_UCCFAST3;
	82	case 3: return QE_CR_SUBBLOCK_UCCFAST4;
	83	case 4: return QE_CR_SUBBLOCK_UCCFAST5;
	84	case 5: return QE_CR_SUBBLOCK_UCCFAST6;
	85	case 6: return QE_CR_SUBBLOCK_UCCFAST7;
5af68af5	86	case 7: return QE_CR_SUBBLOCK_UCCFAST8;
98658538 LY	87	default: return QE_CR_SUBBLOCK_INVALID;
	88	}
	89	}
65482ccf	90	EXPORT_SYMBOL(ucc_fast_get_qe_cr_subblock);
98658538 LY	91
	92	void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf)
	93	{
	94	out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
	95	}
65482ccf	96	EXPORT_SYMBOL(ucc_fast_transmit_on_demand);
98658538 LY	97
	98	void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode)
	99	{
	100	struct ucc_fast *uf_regs;
	101	u32 gumr;
	102
	103	uf_regs = uccf->uf_regs;
	104
	105	/* Enable reception and/or transmission on this UCC. */
	106	gumr = in_be32(&uf_regs->gumr);
	107	if (mode & COMM_DIR_TX) {
	108	gumr \|= UCC_FAST_GUMR_ENT;
	109	uccf->enabled_tx = 1;
	110	}
	111	if (mode & COMM_DIR_RX) {
	112	gumr \|= UCC_FAST_GUMR_ENR;
	113	uccf->enabled_rx = 1;
	114	}
	115	out_be32(&uf_regs->gumr, gumr);
	116	}
65482ccf	117	EXPORT_SYMBOL(ucc_fast_enable);
98658538 LY	118
	119	void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode)
	120	{
	121	struct ucc_fast *uf_regs;
	122	u32 gumr;
	123
	124	uf_regs = uccf->uf_regs;
	125
	126	/* Disable reception and/or transmission on this UCC. */
	127	gumr = in_be32(&uf_regs->gumr);
	128	if (mode & COMM_DIR_TX) {
	129	gumr &= ~UCC_FAST_GUMR_ENT;
	130	uccf->enabled_tx = 0;
	131	}
	132	if (mode & COMM_DIR_RX) {
	133	gumr &= ~UCC_FAST_GUMR_ENR;
	134	uccf->enabled_rx = 0;
	135	}
	136	out_be32(&uf_regs->gumr, gumr);
	137	}
65482ccf	138	EXPORT_SYMBOL(ucc_fast_disable);
98658538 LY	139
	140	int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret)
	141	{
	142	struct ucc_fast_private *uccf;
	143	struct ucc_fast *uf_regs;
5af68af5	144	u32 gumr;
98658538 LY	145	int ret;
98658538 LY	146
98658538 LY	147	if (!uf_info)
	148	return -EINVAL;
	149
	150	/* check if the UCC port number is in range. */
	151	if ((uf_info->ucc_num < 0) \|\| (uf_info->ucc_num > UCC_MAX_NUM - 1)) {
5af68af5	152	printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
98658538 LY	153	return -EINVAL;
	154	}
	155
	156	/* Check that 'max_rx_buf_length' is properly aligned (4). */
	157	if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) {
5af68af5	158	printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__);
98658538 LY	159	return -EINVAL;
	160	}
	161
	162	/* Validate Virtual Fifo register values */
	163	if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) {
5af68af5	164	printk(KERN_ERR "%s: urfs is too small", __FUNCTION__);
98658538 LY	165	return -EINVAL;
	166	}
	167
	168	if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
5af68af5	169	printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__);
98658538 LY	170	return -EINVAL;
	171	}
	172
	173	if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
5af68af5	174	printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__);
98658538 LY	175	return -EINVAL;
	176	}
	177
	178	if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
5af68af5	179	printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__);
98658538 LY	180	return -EINVAL;
	181	}
	182
	183	if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
5af68af5	184	printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__);
98658538 LY	185	return -EINVAL;
	186	}
	187
	188	if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
5af68af5	189	printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__);
98658538 LY	190	return -EINVAL;
	191	}
	192
	193	if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
5af68af5	194	printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__);
98658538 LY	195	return -EINVAL;
	196	}
	197
f8485350	198	uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL);
98658538	199	if (!uccf) {
5af68af5	200	printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
98658538 LY	201	return -ENOMEM;
98658538 LY	202	}
98658538 LY	203
	204	/* Fill fast UCC structure */
	205	uccf->uf_info = uf_info;
	206	/* Set the PHY base address */
5af68af5	207	uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
98658538	208	if (uccf->uf_regs == NULL) {
5af68af5	209	printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
98658538 LY	210	return -ENOMEM;
	211	}
	212
	213	uccf->enabled_tx = 0;
	214	uccf->enabled_rx = 0;
	215	uccf->stopped_tx = 0;
	216	uccf->stopped_rx = 0;
	217	uf_regs = uccf->uf_regs;
	218	uccf->p_ucce = (u32 *) & (uf_regs->ucce);
	219	uccf->p_uccm = (u32 *) & (uf_regs->uccm);
d5b9049d MR	220	#ifdef CONFIG_UGETH_TX_ON_DEMAND
	221	uccf->p_utodr = (u16 *) & (uf_regs->utodr);
	222	#endif
98658538 LY	223	#ifdef STATISTICS
	224	uccf->tx_frames = 0;
	225	uccf->rx_frames = 0;
	226	uccf->rx_discarded = 0;
	227	#endif /* STATISTICS */
	228
	229	/* Init Guemr register */
	230	if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) {
5af68af5	231	printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
98658538 LY	232	ucc_fast_free(uccf);
	233	return ret;
	234	}
	235
	236	/* Set UCC to fast type */
	237	if ((ret = ucc_set_type(uf_info->ucc_num,
	238	(struct ucc_common *) (uf_regs),
	239	UCC_SPEED_TYPE_FAST))) {
5af68af5	240	printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
98658538 LY	241	ucc_fast_free(uccf);
	242	return ret;
	243	}
	244
	245	uccf->mrblr = uf_info->max_rx_buf_length;
	246
	247	/* Set GUMR */
	248	/* For more details see the hardware spec. */
5af68af5	249	gumr = uf_info->ttx_trx;
98658538 LY	250	if (uf_info->tci)
98658538 LY	251	gumr \|= UCC_FAST_GUMR_TCI;
98658538 LY	252	if (uf_info->cdp)
	253	gumr \|= UCC_FAST_GUMR_CDP;
	254	if (uf_info->ctsp)
	255	gumr \|= UCC_FAST_GUMR_CTSP;
	256	if (uf_info->cds)
	257	gumr \|= UCC_FAST_GUMR_CDS;
	258	if (uf_info->ctss)
	259	gumr \|= UCC_FAST_GUMR_CTSS;
	260	if (uf_info->txsy)
	261	gumr \|= UCC_FAST_GUMR_TXSY;
	262	if (uf_info->rsyn)
	263	gumr \|= UCC_FAST_GUMR_RSYN;
	264	gumr \|= uf_info->synl;
	265	if (uf_info->rtsm)
	266	gumr \|= UCC_FAST_GUMR_RTSM;
	267	gumr \|= uf_info->renc;
	268	if (uf_info->revd)
	269	gumr \|= UCC_FAST_GUMR_REVD;
	270	gumr \|= uf_info->tenc;
	271	gumr \|= uf_info->tcrc;
	272	gumr \|= uf_info->mode;
	273	out_be32(&uf_regs->gumr, gumr);
	274
	275	/* Allocate memory for Tx Virtual Fifo */
	276	uccf->ucc_fast_tx_virtual_fifo_base_offset =
	277	qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
4c35630c	278	if (IS_ERR_VALUE(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
5af68af5	279	printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
98658538 LY	280	uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
	281	ucc_fast_free(uccf);
	282	return -ENOMEM;
	283	}
	284
	285	/* Allocate memory for Rx Virtual Fifo */
	286	uccf->ucc_fast_rx_virtual_fifo_base_offset =
5af68af5	287	qe_muram_alloc(uf_info->urfs +
98658538 LY	288	UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
98658538 LY	289	UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
4c35630c	290	if (IS_ERR_VALUE(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
5af68af5	291	printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
98658538 LY	292	uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
	293	ucc_fast_free(uccf);
	294	return -ENOMEM;
	295	}
	296
	297	/* Set Virtual Fifo registers */
	298	out_be16(&uf_regs->urfs, uf_info->urfs);
	299	out_be16(&uf_regs->urfet, uf_info->urfet);
	300	out_be16(&uf_regs->urfset, uf_info->urfset);
	301	out_be16(&uf_regs->utfs, uf_info->utfs);
	302	out_be16(&uf_regs->utfet, uf_info->utfet);
	303	out_be16(&uf_regs->utftt, uf_info->utftt);
	304	/* utfb, urfb are offsets from MURAM base */
	305	out_be32(&uf_regs->utfb, uccf->ucc_fast_tx_virtual_fifo_base_offset);
	306	out_be32(&uf_regs->urfb, uccf->ucc_fast_rx_virtual_fifo_base_offset);
	307
	308	/* Mux clocking */
	309	/* Grant Support */
	310	ucc_set_qe_mux_grant(uf_info->ucc_num, uf_info->grant_support);
	311	/* Breakpoint Support */
	312	ucc_set_qe_mux_bkpt(uf_info->ucc_num, uf_info->brkpt_support);
	313	/* Set Tsa or NMSI mode. */
	314	ucc_set_qe_mux_tsa(uf_info->ucc_num, uf_info->tsa);
	315	/* If NMSI (not Tsa), set Tx and Rx clock. */
	316	if (!uf_info->tsa) {
	317	/* Rx clock routing */
5af68af5 TT	318	if ((uf_info->rx_clock != QE_CLK_NONE) &&
	319	ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock,
	320	COMM_DIR_RX)) {
	321	printk(KERN_ERR "%s: illegal value for RX clock",
	322	__FUNCTION__);
	323	ucc_fast_free(uccf);
	324	return -EINVAL;
98658538 LY	325	}
98658538 LY	326	/* Tx clock routing */
5af68af5 TT	327	if ((uf_info->tx_clock != QE_CLK_NONE) &&
	328	ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock,
	329	COMM_DIR_TX)) {
	330	printk(KERN_ERR "%s: illegal value for TX clock",
	331	__FUNCTION__);
	332	ucc_fast_free(uccf);
	333	return -EINVAL;
98658538 LY	334	}
	335	}
	336
	337	/* Set interrupt mask register at UCC level. */
	338	out_be32(&uf_regs->uccm, uf_info->uccm_mask);
	339
	340	/* First, clear anything pending at UCC level,
	341	* otherwise, old garbage may come through
5af68af5 TT	342	* as soon as the dam is opened. */
	343
	344	/* Writing '1' clears */
98658538 LY	345	out_be32(&uf_regs->ucce, 0xffffffff);
	346
	347	*uccf_ret = uccf;
	348	return 0;
	349	}
65482ccf	350	EXPORT_SYMBOL(ucc_fast_init);
98658538 LY	351
	352	void ucc_fast_free(struct ucc_fast_private * uccf)
	353	{
	354	if (!uccf)
	355	return;
	356
	357	if (uccf->ucc_fast_tx_virtual_fifo_base_offset)
	358	qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);
	359
	360	if (uccf->ucc_fast_rx_virtual_fifo_base_offset)
	361	qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
	362
	363	kfree(uccf);
	364	}
65482ccf	365	EXPORT_SYMBOL(ucc_fast_free);