Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
eed32001 KG |
2 | /* |
3 | * FSL SoC setup code | |
4 | * | |
5 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | |
6 | * | |
fba43665 VB |
7 | * 2006 (c) MontaVista Software, Inc. |
8 | * Vitaly Bordug <vbordug@ru.mvista.com> | |
eed32001 KG |
9 | */ |
10 | ||
eed32001 KG |
11 | #include <linux/stddef.h> |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/errno.h> | |
15 | #include <linux/major.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/irq.h> | |
4b16f8e2 | 18 | #include <linux/export.h> |
eed32001 KG |
19 | #include <linux/device.h> |
20 | #include <linux/platform_device.h> | |
c026c987 | 21 | #include <linux/of.h> |
0af666fa | 22 | #include <linux/of_platform.h> |
a9b14973 | 23 | #include <linux/phy.h> |
26f6cb99 | 24 | #include <linux/spi/spi.h> |
eed32001 | 25 | #include <linux/fsl_devices.h> |
fba43665 VB |
26 | #include <linux/fs_enet_pd.h> |
27 | #include <linux/fs_uart_pd.h> | |
7120438e | 28 | #include <linux/reboot.h> |
eed32001 | 29 | |
60063497 | 30 | #include <linux/atomic.h> |
eed32001 KG |
31 | #include <asm/io.h> |
32 | #include <asm/irq.h> | |
fba43665 | 33 | #include <asm/time.h> |
46c4c229 | 34 | #include <asm/machdep.h> |
eed32001 KG |
35 | #include <sysdev/fsl_soc.h> |
36 | #include <mm/mmu_decl.h> | |
fba43665 | 37 | #include <asm/cpm2.h> |
d173ea6b | 38 | #include <asm/fsl_hcalls.h> /* For the Freescale hypervisor */ |
eed32001 | 39 | |
d3465c92 | 40 | extern void init_fcc_ioports(struct fs_platform_info*); |
88bdc6f0 VB |
41 | extern void init_fec_ioports(struct fs_platform_info*); |
42 | extern void init_smc_ioports(struct fs_uart_platform_info*); | |
eed32001 KG |
43 | static phys_addr_t immrbase = -1; |
44 | ||
45 | phys_addr_t get_immrbase(void) | |
46 | { | |
47 | struct device_node *soc; | |
48 | ||
49 | if (immrbase != -1) | |
50 | return immrbase; | |
51 | ||
52 | soc = of_find_node_by_type(NULL, "soc"); | |
2fb07d77 | 53 | if (soc) { |
f9234736 | 54 | int size; |
6c7e072b | 55 | u32 naddr; |
8443cc14 | 56 | const __be32 *prop = of_get_property(soc, "#address-cells", &size); |
fba43665 | 57 | |
6c7e072b | 58 | if (prop && size == 4) |
8443cc14 | 59 | naddr = be32_to_cpup(prop); |
6c7e072b SW |
60 | else |
61 | naddr = 2; | |
62 | ||
63 | prop = of_get_property(soc, "ranges", &size); | |
fba43665 | 64 | if (prop) |
6c7e072b SW |
65 | immrbase = of_translate_address(soc, prop + naddr); |
66 | ||
eed32001 | 67 | of_node_put(soc); |
f9234736 | 68 | } |
eed32001 KG |
69 | |
70 | return immrbase; | |
71 | } | |
eed32001 | 72 | |
2fb07d77 | 73 | EXPORT_SYMBOL(get_immrbase); |
eed32001 | 74 | |
38664095 SW |
75 | u32 fsl_get_sys_freq(void) |
76 | { | |
5bda6c0e | 77 | static u32 sysfreq = -1; |
38664095 | 78 | struct device_node *soc; |
38664095 SW |
79 | |
80 | if (sysfreq != -1) | |
81 | return sysfreq; | |
82 | ||
83 | soc = of_find_node_by_type(NULL, "soc"); | |
84 | if (!soc) | |
85 | return -1; | |
86 | ||
5bda6c0e HK |
87 | of_property_read_u32(soc, "clock-frequency", &sysfreq); |
88 | if (sysfreq == -1 || !sysfreq) | |
89 | of_property_read_u32(soc, "bus-frequency", &sysfreq); | |
38664095 SW |
90 | |
91 | of_node_put(soc); | |
92 | return sysfreq; | |
93 | } | |
94 | EXPORT_SYMBOL(fsl_get_sys_freq); | |
95 | ||
ea16e83a | 96 | #if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) |
fba43665 | 97 | |
fba43665 VB |
98 | u32 get_brgfreq(void) |
99 | { | |
47a48a92 | 100 | static u32 brgfreq = -1; |
fba43665 VB |
101 | struct device_node *node; |
102 | ||
103 | if (brgfreq != -1) | |
104 | return brgfreq; | |
105 | ||
6d817aa7 | 106 | node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg"); |
fba43665 | 107 | if (node) { |
47a48a92 | 108 | of_property_read_u32(node, "clock-frequency", &brgfreq); |
6d817aa7 SW |
109 | of_node_put(node); |
110 | return brgfreq; | |
111 | } | |
fba43665 | 112 | |
6d817aa7 SW |
113 | /* Legacy device binding -- will go away when no users are left. */ |
114 | node = of_find_node_by_type(NULL, "cpm"); | |
59a0ea50 AV |
115 | if (!node) |
116 | node = of_find_compatible_node(NULL, NULL, "fsl,qe"); | |
117 | if (!node) | |
118 | node = of_find_node_by_type(NULL, "qe"); | |
119 | ||
6d817aa7 | 120 | if (node) { |
47a48a92 HK |
121 | of_property_read_u32(node, "brg-frequency", &brgfreq); |
122 | if (brgfreq == -1 || !brgfreq) | |
123 | if (!of_property_read_u32(node, "bus-frequency", | |
124 | &brgfreq)) | |
125 | brgfreq /= 2; | |
fba43665 | 126 | of_node_put(node); |
f9234736 | 127 | } |
fba43665 VB |
128 | |
129 | return brgfreq; | |
130 | } | |
131 | ||
132 | EXPORT_SYMBOL(get_brgfreq); | |
133 | ||
fba43665 VB |
134 | u32 get_baudrate(void) |
135 | { | |
0f236988 | 136 | static u32 fs_baudrate = -1; |
fba43665 VB |
137 | struct device_node *node; |
138 | ||
139 | if (fs_baudrate != -1) | |
140 | return fs_baudrate; | |
141 | ||
142 | node = of_find_node_by_type(NULL, "serial"); | |
143 | if (node) { | |
0f236988 | 144 | of_property_read_u32(node, "current-speed", &fs_baudrate); |
fba43665 | 145 | of_node_put(node); |
f9234736 | 146 | } |
fba43665 VB |
147 | |
148 | return fs_baudrate; | |
149 | } | |
150 | ||
151 | EXPORT_SYMBOL(get_baudrate); | |
152 | #endif /* CONFIG_CPM2 */ | |
153 | ||
5753c082 | 154 | #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx) |
e1c1575f KG |
155 | static __be32 __iomem *rstcr; |
156 | ||
7120438e AS |
157 | static int fsl_rstcr_restart(struct notifier_block *this, |
158 | unsigned long mode, void *cmd) | |
159 | { | |
160 | local_irq_disable(); | |
161 | /* set reset control register */ | |
162 | out_be32(rstcr, 0x2); /* HRESET_REQ */ | |
163 | ||
164 | return NOTIFY_DONE; | |
165 | } | |
166 | ||
e1c1575f KG |
167 | static int __init setup_rstcr(void) |
168 | { | |
169 | struct device_node *np; | |
4ea7c88b | 170 | |
7120438e AS |
171 | static struct notifier_block restart_handler = { |
172 | .notifier_call = fsl_rstcr_restart, | |
173 | .priority = 128, | |
174 | }; | |
175 | ||
4ea7c88b | 176 | for_each_node_by_name(np, "global-utilities") { |
4d57e351 | 177 | if (of_property_read_bool(np, "fsl,has-rstcr")) { |
4ea7c88b | 178 | rstcr = of_iomap(np, 0) + 0xb0; |
7120438e | 179 | if (!rstcr) { |
4ea7c88b MM |
180 | printk (KERN_ERR "Error: reset control " |
181 | "register not mapped!\n"); | |
7120438e AS |
182 | } else { |
183 | register_restart_handler(&restart_handler); | |
184 | } | |
4ea7c88b MM |
185 | break; |
186 | } | |
187 | } | |
188 | ||
4cdd641d | 189 | of_node_put(np); |
4ea7c88b | 190 | |
e1c1575f KG |
191 | return 0; |
192 | } | |
193 | ||
194 | arch_initcall(setup_rstcr); | |
195 | ||
e1c1575f | 196 | #endif |
6f90a8bd YS |
197 | |
198 | #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) | |
43c9f434 | 199 | struct platform_diu_data_ops diu_ops; |
6f90a8bd | 200 | EXPORT_SYMBOL(diu_ops); |
6f90a8bd | 201 | #endif |
d173ea6b | 202 | |
305bcf26 | 203 | #ifdef CONFIG_EPAPR_PARAVIRT |
d173ea6b TT |
204 | /* |
205 | * Restart the current partition | |
206 | * | |
207 | * This function should be assigned to the ppc_md.restart function pointer, | |
208 | * to initiate a partition restart when we're running under the Freescale | |
209 | * hypervisor. | |
210 | */ | |
95ec77c0 | 211 | void __noreturn fsl_hv_restart(char *cmd) |
d173ea6b TT |
212 | { |
213 | pr_info("hv restart\n"); | |
214 | fh_partition_restart(-1); | |
95ec77c0 | 215 | while (1) ; |
d173ea6b TT |
216 | } |
217 | ||
218 | /* | |
219 | * Halt the current partition | |
220 | * | |
9178ba29 | 221 | * This function should be assigned to the pm_power_off and ppc_md.halt |
d173ea6b TT |
222 | * function pointers, to shut down the partition when we're running under |
223 | * the Freescale hypervisor. | |
224 | */ | |
95ec77c0 | 225 | void __noreturn fsl_hv_halt(void) |
d173ea6b TT |
226 | { |
227 | pr_info("hv exit\n"); | |
228 | fh_partition_stop(-1); | |
95ec77c0 | 229 | while (1) ; |
d173ea6b | 230 | } |
305bcf26 | 231 | #endif |