Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
ba55bd74 ME |
2 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror |
3 | ||
1fbe9cf2 | 4 | ccflags-$(CONFIG_PPC64) := $(NO_MINIMAL_TOC) |
8555a002 | 5 | |
5af7a6f3 | 6 | mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o |
a7de7c74 | 7 | obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) |
36ca09be | 8 | obj-$(CONFIG_MPIC_TIMER) += mpic_timer.o |
a63b3bc7 | 9 | obj-$(CONFIG_FSL_MPIC_TIMER_WAKEUP) += fsl_mpic_timer_wakeup.o |
8626816e JH |
10 | mpic-msgr-obj-$(CONFIG_MPIC_MSGR) += mpic_msgr.o |
11 | obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) $(mpic-msgr-obj-y) | |
3a93261f | 12 | obj-$(CONFIG_PPC_EPAPR_HV_PIC) += ehv_pic.o |
34e36c15 | 13 | fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o |
7e302869 | 14 | obj-$(CONFIG_PPC_MSI_BITMAP) += msi_bitmap.o |
a7de7c74 | 15 | |
830825d6 | 16 | obj-$(CONFIG_PPC_MPC106) += grackle.o |
45d8e7aa | 17 | obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o |
0e826643 | 18 | obj-$(CONFIG_PPC_PMI) += pmi.o |
1beb6a7d | 19 | obj-$(CONFIG_U3_DART) += dart_iommu.o |
edf03c1e | 20 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o |
0a408164 | 21 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o fsl_mpic_err.o |
34e36c15 | 22 | obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) |
4ffd6952 | 23 | obj-$(CONFIG_FSL_PMC) += fsl_pmc.o |
d17799f9 | 24 | obj-$(CONFIG_FSL_CORENET_RCPM) += fsl_rcpm.o |
acaa7aa3 | 25 | obj-$(CONFIG_FSL_LBC) += fsl_lbc.o |
83ff9dcf | 26 | obj-$(CONFIG_FSL_GTM) += fsl_gtm.o |
6db92cc9 | 27 | obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o |
3d64de9c | 28 | obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o |
6ec4bedb | 29 | obj-$(CONFIG_FSL_RIO) += fsl_rio.o fsl_rmu.o |
2b9d7467 | 30 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o |
e1a3107b | 31 | mv64x60-$(CONFIG_PCI) += mv64x60_pci.o |
9b41fcb0 DF |
32 | obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \ |
33 | mv64x60_udbg.o | |
93ab4718 | 34 | obj-$(CONFIG_RTC_DRV_CMOS) += rtc_cmos_setup.o |
dbdf04c4 | 35 | obj-$(CONFIG_AXON_RAM) += axonram.o |
f63e115f | 36 | |
7d52c7b0 | 37 | obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o |
f63e115f | 38 | obj-$(CONFIG_PPC_I8259) += i8259.o |
b0bbad60 | 39 | obj-$(CONFIG_IPIC) += ipic.o |
4dc9783e | 40 | obj-$(CONFIG_XILINX_VIRTEX) += xilinx_intc.o |
64f16502 | 41 | obj-$(CONFIG_XILINX_PCI) += xilinx_pci.o |
22258fa4 | 42 | obj-$(CONFIG_OF_RTC) += of_rtc.o |
b0c110b4 | 43 | |
c374e00e | 44 | obj-$(CONFIG_CPM) += cpm_common.o |
ea16e83a | 45 | obj-$(CONFIG_CPM1) += cpm1.o |
b5677d84 | 46 | obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o |
5093bb96 | 47 | obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o |
4c3d514d | 48 | obj-$(CONFIG_PPC_DCR) += dcr.o |
f2a0bd37 | 49 | obj-$(CONFIG_UCODE_PATCH) += micropatch.o |
0b2cca80 | 50 | |
87c441e5 WD |
51 | obj-$(CONFIG_PPC_MPC512x) += mpc5xxx_clocks.o |
52 | obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o | |
53 | ||
0b2cca80 SW |
54 | ifeq ($(CONFIG_SUSPEND),y) |
55 | obj-$(CONFIG_6xx) += 6xx-suspend.o | |
56 | endif | |
0b05ac6e | 57 | |
ab814b93 BH |
58 | obj-$(CONFIG_PPC_SCOM) += scom.o |
59 | ||
30650239 AP |
60 | obj-$(CONFIG_PPC_EARLY_DEBUG_MEMCONS) += udbg_memcons.o |
61 | ||
0b05ac6e BH |
62 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror |
63 | ||
64 | obj-$(CONFIG_PPC_XICS) += xics/ | |
243e2511 | 65 | obj-$(CONFIG_PPC_XIVE) += xive/ |
44b24b74 MW |
66 | |
67 | obj-$(CONFIG_GE_FPGA) += ge/ |