Commit | Line | Data |
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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
0b2cca80 SW |
2 | /* |
3 | * Enter and leave sleep state on chips with 6xx-style HID0 | |
4 | * power management bits, which don't leave sleep state via reset. | |
5 | * | |
6 | * Author: Scott Wood <scottwood@freescale.com> | |
7 | * | |
8 | * Copyright (c) 2006-2007 Freescale Semiconductor, Inc. | |
0b2cca80 SW |
9 | */ |
10 | ||
11 | #include <asm/ppc_asm.h> | |
12 | #include <asm/reg.h> | |
13 | #include <asm/thread_info.h> | |
14 | #include <asm/asm-offsets.h> | |
15 | ||
16 | _GLOBAL(mpc6xx_enter_standby) | |
17 | mflr r4 | |
18 | ||
19 | mfspr r5, SPRN_HID0 | |
20 | rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP) | |
21 | oris r5, r5, HID0_SLEEP@h | |
22 | mtspr SPRN_HID0, r5 | |
23 | isync | |
24 | ||
25 | lis r5, ret_from_standby@h | |
26 | ori r5, r5, ret_from_standby@l | |
27 | mtlr r5 | |
28 | ||
f7354cca | 29 | lwz r6, TI_LOCAL_FLAGS(r2) |
0b2cca80 | 30 | ori r6, r6, _TLF_SLEEPING |
f7354cca | 31 | stw r6, TI_LOCAL_FLAGS(r2) |
0b2cca80 SW |
32 | |
33 | mfmsr r5 | |
34 | ori r5, r5, MSR_EE | |
35 | oris r5, r5, MSR_POW@h | |
36 | sync | |
37 | mtmsr r5 | |
38 | isync | |
39 | ||
40 | 1: b 1b | |
41 | ||
42 | ret_from_standby: | |
43 | mfspr r5, SPRN_HID0 | |
44 | rlwinm r5, r5, 0, ~HID0_SLEEP | |
45 | mtspr SPRN_HID0, r5 | |
46 | ||
47 | mtlr r4 | |
48 | blr |