Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
69a80d3f | 2 | * SMP support for pSeries machines. |
1da177e4 LT |
3 | * |
4 | * Dave Engebretsen, Peter Bergner, and | |
5 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
6 | * | |
7 | * Plus various changes from other IBM teams... | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
1da177e4 | 15 | |
1da177e4 LT |
16 | #include <linux/kernel.h> |
17 | #include <linux/module.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/smp.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/spinlock.h> | |
24 | #include <linux/cache.h> | |
25 | #include <linux/err.h> | |
26 | #include <linux/sysdev.h> | |
27 | #include <linux/cpu.h> | |
28 | ||
29 | #include <asm/ptrace.h> | |
30 | #include <asm/atomic.h> | |
31 | #include <asm/irq.h> | |
32 | #include <asm/page.h> | |
33 | #include <asm/pgtable.h> | |
34 | #include <asm/io.h> | |
35 | #include <asm/prom.h> | |
36 | #include <asm/smp.h> | |
37 | #include <asm/paca.h> | |
1da177e4 | 38 | #include <asm/machdep.h> |
1da177e4 | 39 | #include <asm/cputable.h> |
1ababe11 | 40 | #include <asm/firmware.h> |
1da177e4 LT |
41 | #include <asm/system.h> |
42 | #include <asm/rtas.h> | |
1da177e4 | 43 | #include <asm/pSeries_reconfig.h> |
bbeb3f4c | 44 | #include <asm/mpic.h> |
271c3f35 | 45 | #include <asm/vdso_datapage.h> |
8d089085 | 46 | #include <asm/cputhreads.h> |
1da177e4 | 47 | |
a1218720 | 48 | #include "plpar_wrappers.h" |
8feaeca2 | 49 | #include "pseries.h" |
d13f7208 | 50 | #include "xics.h" |
3aa565f5 | 51 | #include "offline_states.h" |
a1218720 | 52 | |
1da177e4 LT |
53 | |
54 | /* | |
6a75a6b8 MM |
55 | * The Primary thread of each non-boot processor was started from the OF client |
56 | * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop. | |
1da177e4 LT |
57 | */ |
58 | static cpumask_t of_spin_map; | |
59 | ||
1da177e4 LT |
60 | /** |
61 | * smp_startup_cpu() - start the given cpu | |
62 | * | |
63 | * At boot time, there is nothing to do for primary threads which were | |
64 | * started from Open Firmware. For anything else, call RTAS with the | |
65 | * appropriate start location. | |
66 | * | |
67 | * Returns: | |
68 | * 0 - failure | |
69 | * 1 - success | |
70 | */ | |
71 | static inline int __devinit smp_startup_cpu(unsigned int lcpu) | |
72 | { | |
73 | int status; | |
74 | unsigned long start_here = __pa((u32)*((unsigned long *) | |
f39b7a55 | 75 | generic_secondary_smp_init)); |
1da177e4 | 76 | unsigned int pcpu; |
1ed2fd2d | 77 | int start_cpu; |
1da177e4 LT |
78 | |
79 | if (cpu_isset(lcpu, of_spin_map)) | |
80 | /* Already started by OF and sitting in spin loop */ | |
81 | return 1; | |
82 | ||
83 | pcpu = get_hard_smp_processor_id(lcpu); | |
84 | ||
85 | /* Fixup atomic count: it exited inside IRQ handler. */ | |
b5e2fc1c | 86 | task_thread_info(paca[lcpu].__current)->preempt_count = 0; |
1da177e4 | 87 | |
3aa565f5 GS |
88 | if (get_cpu_current_state(lcpu) == CPU_STATE_INACTIVE) |
89 | goto out; | |
90 | ||
1ed2fd2d AB |
91 | /* |
92 | * If the RTAS start-cpu token does not exist then presume the | |
93 | * cpu is already spinning. | |
94 | */ | |
95 | start_cpu = rtas_token("start-cpu"); | |
96 | if (start_cpu == RTAS_UNKNOWN_SERVICE) | |
97 | return 1; | |
98 | ||
496b7a51 | 99 | status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, pcpu); |
1da177e4 LT |
100 | if (status != 0) { |
101 | printk(KERN_ERR "start-cpu failed: %i\n", status); | |
102 | return 0; | |
103 | } | |
1ed2fd2d | 104 | |
3aa565f5 | 105 | out: |
1da177e4 LT |
106 | return 1; |
107 | } | |
108 | ||
cebf589c | 109 | #ifdef CONFIG_XICS |
1da177e4 LT |
110 | static void __devinit smp_xics_setup_cpu(int cpu) |
111 | { | |
112 | if (cpu != boot_cpuid) | |
113 | xics_setup_cpu(); | |
114 | ||
1ababe11 | 115 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) |
1da177e4 LT |
116 | vpa_init(cpu); |
117 | ||
118 | cpu_clear(cpu, of_spin_map); | |
3aa565f5 GS |
119 | set_cpu_current_state(cpu, CPU_STATE_ONLINE); |
120 | set_default_offline_state(cpu); | |
1da177e4 | 121 | |
1da177e4 | 122 | } |
cebf589c | 123 | #endif /* CONFIG_XICS */ |
1da177e4 | 124 | |
1da177e4 LT |
125 | static void __devinit smp_pSeries_kick_cpu(int nr) |
126 | { | |
3aa565f5 GS |
127 | long rc; |
128 | unsigned long hcpuid; | |
1da177e4 LT |
129 | BUG_ON(nr < 0 || nr >= NR_CPUS); |
130 | ||
131 | if (!smp_startup_cpu(nr)) | |
132 | return; | |
133 | ||
134 | /* | |
135 | * The processor is currently spinning, waiting for the | |
136 | * cpu_start field to become non-zero After we set cpu_start, | |
137 | * the processor will continue on to secondary_start | |
138 | */ | |
139 | paca[nr].cpu_start = 1; | |
3aa565f5 GS |
140 | |
141 | set_preferred_offline_state(nr, CPU_STATE_ONLINE); | |
142 | ||
143 | if (get_cpu_current_state(nr) == CPU_STATE_INACTIVE) { | |
144 | hcpuid = get_hard_smp_processor_id(nr); | |
145 | rc = plpar_hcall_norets(H_PROD, hcpuid); | |
146 | if (rc != H_SUCCESS) | |
e9edb232 GS |
147 | printk(KERN_ERR "Error: Prod to wake up processor %d\ |
148 | Ret= %ld\n", nr, rc); | |
3aa565f5 | 149 | } |
1da177e4 LT |
150 | } |
151 | ||
152 | static int smp_pSeries_cpu_bootable(unsigned int nr) | |
153 | { | |
154 | /* Special case - we inhibit secondary thread startup | |
6a75a6b8 | 155 | * during boot if the user requests it. |
1da177e4 LT |
156 | */ |
157 | if (system_state < SYSTEM_RUNNING && | |
0231c290 | 158 | cpu_has_feature(CPU_FTR_SMT) && |
8d089085 | 159 | !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0) |
1da177e4 LT |
160 | return 0; |
161 | ||
162 | return 1; | |
163 | } | |
cebf589c | 164 | #ifdef CONFIG_MPIC |
1da177e4 LT |
165 | static struct smp_ops_t pSeries_mpic_smp_ops = { |
166 | .message_pass = smp_mpic_message_pass, | |
167 | .probe = smp_mpic_probe, | |
168 | .kick_cpu = smp_pSeries_kick_cpu, | |
169 | .setup_cpu = smp_mpic_setup_cpu, | |
170 | }; | |
cebf589c AB |
171 | #endif |
172 | #ifdef CONFIG_XICS | |
1da177e4 LT |
173 | static struct smp_ops_t pSeries_xics_smp_ops = { |
174 | .message_pass = smp_xics_message_pass, | |
175 | .probe = smp_xics_probe, | |
176 | .kick_cpu = smp_pSeries_kick_cpu, | |
177 | .setup_cpu = smp_xics_setup_cpu, | |
178 | .cpu_bootable = smp_pSeries_cpu_bootable, | |
179 | }; | |
cebf589c | 180 | #endif |
1da177e4 LT |
181 | |
182 | /* This is called very early */ | |
0ebfff14 | 183 | static void __init smp_init_pseries(void) |
1da177e4 LT |
184 | { |
185 | int i; | |
186 | ||
f7ebf352 | 187 | pr_debug(" -> smp_init_pSeries()\n"); |
1da177e4 | 188 | |
1da177e4 | 189 | /* Mark threads which are still spinning in hold loops. */ |
0231c290 AB |
190 | if (cpu_has_feature(CPU_FTR_SMT)) { |
191 | for_each_present_cpu(i) { | |
6a75a6b8 | 192 | if (cpu_thread_in_core(i) == 0) |
1da177e4 LT |
193 | cpu_set(i, of_spin_map); |
194 | } | |
0231c290 | 195 | } else { |
1da177e4 | 196 | of_spin_map = cpu_present_map; |
0231c290 | 197 | } |
1da177e4 LT |
198 | |
199 | cpu_clear(boot_cpuid, of_spin_map); | |
200 | ||
201 | /* Non-lpar has additional take/give timebase */ | |
202 | if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) { | |
c4007a2f BH |
203 | smp_ops->give_timebase = rtas_give_timebase; |
204 | smp_ops->take_timebase = rtas_take_timebase; | |
1da177e4 LT |
205 | } |
206 | ||
f7ebf352 | 207 | pr_debug(" <- smp_init_pSeries()\n"); |
1da177e4 LT |
208 | } |
209 | ||
0ebfff14 BH |
210 | #ifdef CONFIG_MPIC |
211 | void __init smp_init_pseries_mpic(void) | |
212 | { | |
213 | smp_ops = &pSeries_mpic_smp_ops; | |
214 | ||
215 | smp_init_pseries(); | |
216 | } | |
217 | #endif | |
218 | ||
219 | void __init smp_init_pseries_xics(void) | |
220 | { | |
221 | smp_ops = &pSeries_xics_smp_ops; | |
222 | ||
223 | smp_init_pseries(); | |
224 | } |