Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
033ef338 | 2 | * 64-bit pSeries and RS/6000 setup code. |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * Adapted from 'alpha' version by Gary Thomas | |
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
7 | * Modified by PPC64 Team, IBM Corp | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | /* | |
16 | * bootup setup stuff.. | |
17 | */ | |
18 | ||
62d60e9f | 19 | #include <linux/cpu.h> |
1da177e4 LT |
20 | #include <linux/errno.h> |
21 | #include <linux/sched.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/mm.h> | |
24 | #include <linux/stddef.h> | |
25 | #include <linux/unistd.h> | |
1da177e4 | 26 | #include <linux/user.h> |
1da177e4 LT |
27 | #include <linux/tty.h> |
28 | #include <linux/major.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/reboot.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/ioport.h> | |
33 | #include <linux/console.h> | |
34 | #include <linux/pci.h> | |
cebb2b15 | 35 | #include <linux/utsname.h> |
1da177e4 | 36 | #include <linux/adb.h> |
4b16f8e2 | 37 | #include <linux/export.h> |
1da177e4 LT |
38 | #include <linux/delay.h> |
39 | #include <linux/irq.h> | |
40 | #include <linux/seq_file.h> | |
41 | #include <linux/root_dev.h> | |
1cf3d8b3 | 42 | #include <linux/of.h> |
705a7b47 | 43 | #include <linux/of_pci.h> |
1da177e4 LT |
44 | |
45 | #include <asm/mmu.h> | |
46 | #include <asm/processor.h> | |
47 | #include <asm/io.h> | |
48 | #include <asm/pgtable.h> | |
49 | #include <asm/prom.h> | |
50 | #include <asm/rtas.h> | |
51 | #include <asm/pci-bridge.h> | |
52 | #include <asm/iommu.h> | |
53 | #include <asm/dma.h> | |
54 | #include <asm/machdep.h> | |
55 | #include <asm/irq.h> | |
56 | #include <asm/time.h> | |
57 | #include <asm/nvram.h> | |
180a3362 | 58 | #include <asm/pmc.h> |
0b05ac6e | 59 | #include <asm/xics.h> |
eac1e731 | 60 | #include <asm/xive.h> |
d387899f | 61 | #include <asm/ppc-pci.h> |
69a80d3f PM |
62 | #include <asm/i8259.h> |
63 | #include <asm/udbg.h> | |
2249ca9d | 64 | #include <asm/smp.h> |
577830b0 | 65 | #include <asm/firmware.h> |
bed59275 | 66 | #include <asm/eeh.h> |
bf99de36 | 67 | #include <asm/reg.h> |
212bebb4 | 68 | #include <asm/plpar_wrappers.h> |
d81d8258 | 69 | #include <asm/kexec.h> |
38e9d36b | 70 | #include <asm/isa-bridge.h> |
1da177e4 | 71 | |
577830b0 | 72 | #include "pseries.h" |
a1218720 | 73 | |
81f14997 RJ |
74 | int CMO_PrPSP = -1; |
75 | int CMO_SecPSP = -1; | |
e589a440 | 76 | unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K); |
d617a402 | 77 | EXPORT_SYMBOL(CMO_PageSize); |
1da177e4 | 78 | |
1da177e4 LT |
79 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
80 | ||
8446196a | 81 | static void pSeries_show_cpuinfo(struct seq_file *m) |
1da177e4 LT |
82 | { |
83 | struct device_node *root; | |
84 | const char *model = ""; | |
85 | ||
86 | root = of_find_node_by_path("/"); | |
87 | if (root) | |
e2eb6392 | 88 | model = of_get_property(root, "model", NULL); |
1da177e4 LT |
89 | seq_printf(m, "machine\t\t: CHRP %s\n", model); |
90 | of_node_put(root); | |
3a4c2601 AK |
91 | if (radix_enabled()) |
92 | seq_printf(m, "MMU\t\t: Radix\n"); | |
93 | else | |
94 | seq_printf(m, "MMU\t\t: Hash\n"); | |
1da177e4 LT |
95 | } |
96 | ||
97 | /* Initialize firmware assisted non-maskable interrupts if | |
98 | * the firmware supports this feature. | |
1da177e4 LT |
99 | */ |
100 | static void __init fwnmi_init(void) | |
101 | { | |
8c4f1f29 ME |
102 | unsigned long system_reset_addr, machine_check_addr; |
103 | ||
1da177e4 LT |
104 | int ibm_nmi_register = rtas_token("ibm,nmi-register"); |
105 | if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) | |
106 | return; | |
8c4f1f29 ME |
107 | |
108 | /* If the kernel's not linked at zero we point the firmware at low | |
109 | * addresses anyway, and use a trampoline to get to the real code. */ | |
110 | system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START; | |
111 | machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START; | |
112 | ||
113 | if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr, | |
114 | machine_check_addr)) | |
1da177e4 LT |
115 | fwnmi_active = 1; |
116 | } | |
117 | ||
bd0b9ac4 | 118 | static void pseries_8259_cascade(struct irq_desc *desc) |
b9e5b4e6 | 119 | { |
ec775d0e | 120 | struct irq_chip *chip = irq_desc_get_chip(desc); |
35a84c2f | 121 | unsigned int cascade_irq = i8259_irq(); |
79f26c26 | 122 | |
ef24ba70 | 123 | if (cascade_irq) |
7d12e780 | 124 | generic_handle_irq(cascade_irq); |
79f26c26 LB |
125 | |
126 | chip->irq_eoi(&desc->irq_data); | |
b9e5b4e6 BH |
127 | } |
128 | ||
30d6ad25 | 129 | static void __init pseries_setup_i8259_cascade(void) |
032ace7e ME |
130 | { |
131 | struct device_node *np, *old, *found = NULL; | |
30d6ad25 | 132 | unsigned int cascade; |
032ace7e ME |
133 | const u32 *addrp; |
134 | unsigned long intack = 0; | |
30d6ad25 | 135 | int naddr; |
032ace7e | 136 | |
30d6ad25 | 137 | for_each_node_by_type(np, "interrupt-controller") { |
032ace7e ME |
138 | if (of_device_is_compatible(np, "chrp,iic")) { |
139 | found = np; | |
140 | break; | |
141 | } | |
30d6ad25 ME |
142 | } |
143 | ||
032ace7e | 144 | if (found == NULL) { |
30d6ad25 | 145 | printk(KERN_DEBUG "pic: no ISA interrupt controller\n"); |
032ace7e ME |
146 | return; |
147 | } | |
30d6ad25 | 148 | |
032ace7e | 149 | cascade = irq_of_parse_and_map(found, 0); |
ef24ba70 | 150 | if (!cascade) { |
30d6ad25 | 151 | printk(KERN_ERR "pic: failed to map cascade interrupt"); |
032ace7e ME |
152 | return; |
153 | } | |
30d6ad25 | 154 | pr_debug("pic: cascade mapped to irq %d\n", cascade); |
032ace7e ME |
155 | |
156 | for (old = of_node_get(found); old != NULL ; old = np) { | |
157 | np = of_get_parent(old); | |
158 | of_node_put(old); | |
159 | if (np == NULL) | |
160 | break; | |
161 | if (strcmp(np->name, "pci") != 0) | |
162 | continue; | |
163 | addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL); | |
164 | if (addrp == NULL) | |
165 | continue; | |
166 | naddr = of_n_addr_cells(np); | |
167 | intack = addrp[naddr-1]; | |
168 | if (naddr > 1) | |
169 | intack |= ((unsigned long)addrp[naddr-2]) << 32; | |
170 | } | |
171 | if (intack) | |
30d6ad25 | 172 | printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); |
032ace7e ME |
173 | i8259_init(found, intack); |
174 | of_node_put(found); | |
ec775d0e | 175 | irq_set_chained_handler(cascade, pseries_8259_cascade); |
032ace7e ME |
176 | } |
177 | ||
e7da5dac | 178 | static void __init pseries_init_irq(void) |
032ace7e | 179 | { |
eac1e731 CLG |
180 | /* Try using a XIVE if available, otherwise use a XICS */ |
181 | if (!xive_spapr_init()) { | |
182 | xics_init(); | |
183 | pseries_setup_i8259_cascade(); | |
184 | } | |
032ace7e ME |
185 | } |
186 | ||
180a3362 ME |
187 | static void pseries_lpar_enable_pmcs(void) |
188 | { | |
189 | unsigned long set, reset; | |
190 | ||
180a3362 ME |
191 | set = 1UL << 63; |
192 | reset = 0; | |
193 | plpar_hcall_norets(H_PERFMON, set, reset); | |
180a3362 ME |
194 | } |
195 | ||
f5242e5a | 196 | static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data) |
2eb4afb6 | 197 | { |
f5242e5a | 198 | struct of_reconfig_data *rd = data; |
ea0f8acf GS |
199 | struct device_node *parent, *np = rd->dn; |
200 | struct pci_dn *pdn; | |
2eb4afb6 KG |
201 | int err = NOTIFY_OK; |
202 | ||
203 | switch (action) { | |
1cf3d8b3 | 204 | case OF_RECONFIG_ATTACH_NODE: |
ea0f8acf GS |
205 | parent = of_get_parent(np); |
206 | pdn = parent ? PCI_DN(parent) : NULL; | |
8cc7581c | 207 | if (pdn) |
d8f66f41 | 208 | pci_add_device_node_info(pdn->phb, np); |
ea0f8acf GS |
209 | |
210 | of_node_put(parent); | |
2eb4afb6 | 211 | break; |
590c7567 | 212 | case OF_RECONFIG_DETACH_NODE: |
ea0f8acf GS |
213 | pdn = PCI_DN(np); |
214 | if (pdn) | |
215 | list_del(&pdn->list); | |
590c7567 | 216 | break; |
2eb4afb6 KG |
217 | default: |
218 | err = NOTIFY_DONE; | |
219 | break; | |
220 | } | |
221 | return err; | |
222 | } | |
223 | ||
224 | static struct notifier_block pci_dn_reconfig_nb = { | |
225 | .notifier_call = pci_dn_reconfig_notifier, | |
226 | }; | |
227 | ||
af442a1b NA |
228 | struct kmem_cache *dtl_cache; |
229 | ||
abf917cd | 230 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE |
cf9efce0 PM |
231 | /* |
232 | * Allocate space for the dispatch trace log for all possible cpus | |
233 | * and register the buffers with the hypervisor. This is used for | |
234 | * computing time stolen by the hypervisor. | |
235 | */ | |
236 | static int alloc_dispatch_logs(void) | |
237 | { | |
238 | int cpu, ret; | |
239 | struct paca_struct *pp; | |
240 | struct dtl_entry *dtl; | |
241 | ||
242 | if (!firmware_has_feature(FW_FEATURE_SPLPAR)) | |
243 | return 0; | |
244 | ||
af442a1b | 245 | if (!dtl_cache) |
127493d5 | 246 | return 0; |
127493d5 | 247 | |
cf9efce0 PM |
248 | for_each_possible_cpu(cpu) { |
249 | pp = &paca[cpu]; | |
127493d5 | 250 | dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL); |
cf9efce0 PM |
251 | if (!dtl) { |
252 | pr_warn("Failed to allocate dispatch trace log for cpu %d\n", | |
253 | cpu); | |
254 | pr_warn("Stolen time statistics will be unreliable\n"); | |
255 | break; | |
256 | } | |
257 | ||
258 | pp->dtl_ridx = 0; | |
259 | pp->dispatch_log = dtl; | |
260 | pp->dispatch_log_end = dtl + N_DISPATCH_LOG; | |
261 | pp->dtl_curr = dtl; | |
262 | } | |
263 | ||
264 | /* Register the DTL for the current (boot) cpu */ | |
265 | dtl = get_paca()->dispatch_log; | |
266 | get_paca()->dtl_ridx = 0; | |
267 | get_paca()->dtl_curr = dtl; | |
268 | get_paca()->lppaca_ptr->dtl_idx = 0; | |
269 | ||
270 | /* hypervisor reads buffer length from this field */ | |
7ffcf8ec | 271 | dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES); |
cf9efce0 PM |
272 | ret = register_dtl(hard_smp_processor_id(), __pa(dtl)); |
273 | if (ret) | |
711ef84e AB |
274 | pr_err("WARNING: DTL registration of cpu %d (hw %d) failed " |
275 | "with %d\n", smp_processor_id(), | |
276 | hard_smp_processor_id(), ret); | |
cf9efce0 PM |
277 | get_paca()->lppaca_ptr->dtl_enable_mask = 2; |
278 | ||
279 | return 0; | |
280 | } | |
abf917cd | 281 | #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
af442a1b NA |
282 | static inline int alloc_dispatch_logs(void) |
283 | { | |
284 | return 0; | |
285 | } | |
abf917cd | 286 | #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ |
cf9efce0 | 287 | |
af442a1b NA |
288 | static int alloc_dispatch_log_kmem_cache(void) |
289 | { | |
290 | dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, | |
291 | DISPATCH_LOG_BYTES, 0, NULL); | |
292 | if (!dtl_cache) { | |
293 | pr_warn("Failed to create dispatch trace log buffer cache\n"); | |
294 | pr_warn("Stolen time statistics will be unreliable\n"); | |
295 | return 0; | |
296 | } | |
297 | ||
298 | return alloc_dispatch_logs(); | |
299 | } | |
8e83e905 | 300 | machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache); |
af442a1b | 301 | |
363edbe2 | 302 | static void pseries_lpar_idle(void) |
e179816c | 303 | { |
d8c6ad31 NP |
304 | /* |
305 | * Default handler to go into low thread priority and possibly | |
027dfac6 | 306 | * low power mode by ceding processor to hypervisor |
e179816c | 307 | */ |
d8c6ad31 NP |
308 | |
309 | /* Indicate to hypervisor that we are idle. */ | |
310 | get_lppaca()->idle = 1; | |
311 | ||
312 | /* | |
313 | * Yield the processor to the hypervisor. We return if | |
314 | * an external interrupt occurs (which are driven prior | |
315 | * to returning here) or if a prod occurs from another | |
316 | * processor. When returning here, external interrupts | |
317 | * are enabled. | |
318 | */ | |
319 | cede_processor(); | |
320 | ||
321 | get_lppaca()->idle = 0; | |
e179816c DD |
322 | } |
323 | ||
fc8effa4 IM |
324 | /* |
325 | * Enable relocation on during exceptions. This has partition wide scope and | |
326 | * may take a while to complete, if it takes longer than one second we will | |
327 | * just give up rather than wasting any more time on this - if that turns out | |
328 | * to ever be a problem in practice we can move this into a kernel thread to | |
329 | * finish off the process later in boot. | |
330 | */ | |
d3cbff1b | 331 | void pseries_enable_reloc_on_exc(void) |
fc8effa4 IM |
332 | { |
333 | long rc; | |
334 | unsigned int delay, total_delay = 0; | |
335 | ||
336 | while (1) { | |
337 | rc = enable_reloc_on_exceptions(); | |
d3cbff1b BH |
338 | if (!H_IS_LONG_BUSY(rc)) { |
339 | if (rc == H_P2) { | |
340 | pr_info("Relocation on exceptions not" | |
341 | " supported\n"); | |
342 | } else if (rc != H_SUCCESS) { | |
343 | pr_warn("Unable to enable relocation" | |
344 | " on exceptions: %ld\n", rc); | |
345 | } | |
346 | break; | |
347 | } | |
fc8effa4 IM |
348 | |
349 | delay = get_longbusy_msecs(rc); | |
350 | total_delay += delay; | |
351 | if (total_delay > 1000) { | |
352 | pr_warn("Warning: Giving up waiting to enable " | |
353 | "relocation on exceptions (%u msec)!\n", | |
354 | total_delay); | |
d3cbff1b | 355 | return; |
fc8effa4 IM |
356 | } |
357 | ||
358 | mdelay(delay); | |
359 | } | |
360 | } | |
d3cbff1b | 361 | EXPORT_SYMBOL(pseries_enable_reloc_on_exc); |
fc8effa4 | 362 | |
d3cbff1b | 363 | void pseries_disable_reloc_on_exc(void) |
cedddd81 IM |
364 | { |
365 | long rc; | |
366 | ||
367 | while (1) { | |
368 | rc = disable_reloc_on_exceptions(); | |
369 | if (!H_IS_LONG_BUSY(rc)) | |
d3cbff1b | 370 | break; |
cedddd81 IM |
371 | mdelay(get_longbusy_msecs(rc)); |
372 | } | |
d3cbff1b | 373 | if (rc != H_SUCCESS) |
f2c2cbcc JP |
374 | pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n", |
375 | rc); | |
cedddd81 | 376 | } |
d3cbff1b | 377 | EXPORT_SYMBOL(pseries_disable_reloc_on_exc); |
cedddd81 | 378 | |
da665885 | 379 | #ifdef CONFIG_KEXEC_CORE |
cedddd81 IM |
380 | static void pSeries_machine_kexec(struct kimage *image) |
381 | { | |
d3cbff1b BH |
382 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
383 | pseries_disable_reloc_on_exc(); | |
cedddd81 IM |
384 | |
385 | default_machine_kexec(image); | |
386 | } | |
387 | #endif | |
388 | ||
e844b1ee | 389 | #ifdef __LITTLE_ENDIAN__ |
d3cbff1b | 390 | void pseries_big_endian_exceptions(void) |
e844b1ee AB |
391 | { |
392 | long rc; | |
393 | ||
394 | while (1) { | |
395 | rc = enable_big_endian_exceptions(); | |
396 | if (!H_IS_LONG_BUSY(rc)) | |
d3cbff1b | 397 | break; |
e844b1ee AB |
398 | mdelay(get_longbusy_msecs(rc)); |
399 | } | |
d3cbff1b BH |
400 | |
401 | /* | |
402 | * At this point it is unlikely panic() will get anything | |
403 | * out to the user, since this is called very late in kexec | |
404 | * but at least this will stop us from continuing on further | |
405 | * and creating an even more difficult to debug situation. | |
406 | * | |
407 | * There is a known problem when kdump'ing, if cpus are offline | |
408 | * the above call will fail. Rather than panicking again, keep | |
409 | * going and hope the kdump kernel is also little endian, which | |
410 | * it usually is. | |
411 | */ | |
412 | if (rc && !kdump_in_progress()) | |
413 | panic("Could not enable big endian exceptions"); | |
e844b1ee AB |
414 | } |
415 | ||
d3cbff1b | 416 | void pseries_little_endian_exceptions(void) |
e844b1ee AB |
417 | { |
418 | long rc; | |
419 | ||
420 | while (1) { | |
421 | rc = enable_little_endian_exceptions(); | |
422 | if (!H_IS_LONG_BUSY(rc)) | |
d3cbff1b | 423 | break; |
e844b1ee AB |
424 | mdelay(get_longbusy_msecs(rc)); |
425 | } | |
d3cbff1b BH |
426 | if (rc) { |
427 | ppc_md.progress("H_SET_MODE LE exception fail", 0); | |
428 | panic("Could not enable little endian exceptions"); | |
429 | } | |
e844b1ee AB |
430 | } |
431 | #endif | |
432 | ||
bdc728a8 DA |
433 | static void __init find_and_init_phbs(void) |
434 | { | |
435 | struct device_node *node; | |
436 | struct pci_controller *phb; | |
437 | struct device_node *root = of_find_node_by_path("/"); | |
438 | ||
439 | for_each_child_of_node(root, node) { | |
440 | if (node->type == NULL || (strcmp(node->type, "pci") != 0 && | |
441 | strcmp(node->type, "pciex") != 0)) | |
442 | continue; | |
443 | ||
444 | phb = pcibios_alloc_controller(node); | |
445 | if (!phb) | |
446 | continue; | |
447 | rtas_setup_phb(phb); | |
448 | pci_process_bridge_OF_ranges(phb, node, 0); | |
449 | isa_bridge_find_early(phb); | |
38ae9ec4 | 450 | phb->controller_ops = pseries_pci_controller_ops; |
bdc728a8 DA |
451 | } |
452 | ||
453 | of_node_put(root); | |
bdc728a8 DA |
454 | |
455 | /* | |
456 | * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties | |
457 | * in chosen. | |
458 | */ | |
705a7b47 | 459 | of_pci_check_probe_only(); |
bdc728a8 DA |
460 | } |
461 | ||
8989d568 MN |
462 | static void pseries_setup_rfi_flush(void) |
463 | { | |
464 | struct h_cpu_char_result result; | |
465 | enum l1d_flush_type types; | |
466 | bool enable; | |
467 | long rc; | |
468 | ||
469 | /* Enable by default */ | |
470 | enable = true; | |
471 | ||
472 | rc = plpar_get_cpu_characteristics(&result); | |
473 | if (rc == H_SUCCESS) { | |
474 | types = L1D_FLUSH_NONE; | |
475 | ||
476 | if (result.character & H_CPU_CHAR_L1D_FLUSH_TRIG2) | |
477 | types |= L1D_FLUSH_MTTRIG; | |
478 | if (result.character & H_CPU_CHAR_L1D_FLUSH_ORI30) | |
479 | types |= L1D_FLUSH_ORI; | |
480 | ||
481 | /* Use fallback if nothing set in hcall */ | |
482 | if (types == L1D_FLUSH_NONE) | |
483 | types = L1D_FLUSH_FALLBACK; | |
484 | ||
582605a4 ME |
485 | if ((!(result.behaviour & H_CPU_BEHAV_L1D_FLUSH_PR)) || |
486 | (!(result.behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))) | |
8989d568 MN |
487 | enable = false; |
488 | } else { | |
489 | /* Default to fallback if case hcall is not available */ | |
490 | types = L1D_FLUSH_FALLBACK; | |
491 | } | |
492 | ||
493 | setup_rfi_flush(types, enable); | |
494 | } | |
495 | ||
fc5f6221 BL |
496 | #ifdef CONFIG_PCI_IOV |
497 | enum rtas_iov_fw_value_map { | |
498 | NUM_RES_PROPERTY = 0, /* Number of Resources */ | |
499 | LOW_INT = 1, /* Lowest 32 bits of Address */ | |
500 | START_OF_ENTRIES = 2, /* Always start of entry */ | |
501 | APERTURE_PROPERTY = 2, /* Start of entry+ to Aperture Size */ | |
502 | WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */ | |
503 | NEXT_ENTRY = 7 /* Go to next entry on array */ | |
504 | }; | |
505 | ||
506 | enum get_iov_fw_value_index { | |
507 | BAR_ADDRS = 1, /* Get Bar Address */ | |
508 | APERTURE_SIZE = 2, /* Get Aperture Size */ | |
509 | WDW_SIZE = 3 /* Get Window Size */ | |
510 | }; | |
511 | ||
512 | resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno, | |
513 | enum get_iov_fw_value_index value) | |
514 | { | |
515 | const int *indexes; | |
516 | struct device_node *dn = pci_device_to_OF_node(dev); | |
517 | int i, num_res, ret = 0; | |
518 | ||
519 | indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); | |
520 | if (!indexes) | |
521 | return 0; | |
522 | ||
523 | /* | |
524 | * First element in the array is the number of Bars | |
525 | * returned. Search through the list to find the matching | |
526 | * bar | |
527 | */ | |
528 | num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); | |
529 | if (resno >= num_res) | |
530 | return 0; /* or an errror */ | |
531 | ||
532 | i = START_OF_ENTRIES + NEXT_ENTRY * resno; | |
533 | switch (value) { | |
534 | case BAR_ADDRS: | |
535 | ret = of_read_number(&indexes[i], 2); | |
536 | break; | |
537 | case APERTURE_SIZE: | |
538 | ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); | |
539 | break; | |
540 | case WDW_SIZE: | |
541 | ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); | |
542 | break; | |
543 | } | |
544 | ||
545 | return ret; | |
546 | } | |
547 | ||
548 | void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes) | |
549 | { | |
550 | struct resource *res; | |
551 | resource_size_t base, size; | |
552 | int i, r, num_res; | |
553 | ||
554 | num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); | |
555 | num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS); | |
556 | for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; | |
557 | i += NEXT_ENTRY, r++) { | |
558 | res = &dev->resource[r + PCI_IOV_RESOURCES]; | |
559 | base = of_read_number(&indexes[i], 2); | |
560 | size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2); | |
561 | res->flags = pci_parse_of_flags(of_read_number | |
562 | (&indexes[i + LOW_INT], 1), 0); | |
563 | res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED); | |
564 | res->name = pci_name(dev); | |
565 | res->start = base; | |
566 | res->end = base + size - 1; | |
567 | } | |
568 | } | |
569 | ||
570 | void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes) | |
571 | { | |
572 | struct resource *res, *root, *conflict; | |
573 | resource_size_t base, size; | |
574 | int i, r, num_res; | |
575 | ||
576 | /* | |
577 | * First element in the array is the number of Bars | |
578 | * returned. Search through the list to find the matching | |
579 | * bars assign them from firmware into resources structure. | |
580 | */ | |
581 | num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1); | |
582 | for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS; | |
583 | i += NEXT_ENTRY, r++) { | |
584 | res = &dev->resource[r + PCI_IOV_RESOURCES]; | |
585 | base = of_read_number(&indexes[i], 2); | |
586 | size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2); | |
587 | res->name = pci_name(dev); | |
588 | res->start = base; | |
589 | res->end = base + size - 1; | |
590 | root = &iomem_resource; | |
591 | dev_dbg(&dev->dev, | |
592 | "pSeries IOV BAR %d: trying firmware assignment %pR\n", | |
593 | r + PCI_IOV_RESOURCES, res); | |
594 | conflict = request_resource_conflict(root, res); | |
595 | if (conflict) { | |
596 | dev_info(&dev->dev, | |
597 | "BAR %d: %pR conflicts with %s %pR\n", | |
598 | r + PCI_IOV_RESOURCES, res, | |
599 | conflict->name, conflict); | |
600 | res->flags |= IORESOURCE_UNSET; | |
601 | } | |
602 | } | |
603 | } | |
604 | ||
605 | static void pseries_pci_fixup_resources(struct pci_dev *pdev) | |
606 | { | |
607 | const int *indexes; | |
608 | struct device_node *dn = pci_device_to_OF_node(pdev); | |
609 | ||
610 | /*Firmware must support open sriov otherwise dont configure*/ | |
611 | indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); | |
612 | if (!indexes) | |
613 | return; | |
614 | /* Assign the addresses from device tree*/ | |
615 | of_pci_set_vf_bar_size(pdev, indexes); | |
616 | } | |
617 | ||
618 | static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) | |
619 | { | |
620 | const int *indexes; | |
621 | struct device_node *dn = pci_device_to_OF_node(pdev); | |
622 | ||
623 | if (!pdev->is_physfn || pdev->is_added) | |
624 | return; | |
625 | /*Firmware must support open sriov otherwise dont configure*/ | |
626 | indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL); | |
627 | if (!indexes) | |
628 | return; | |
629 | /* Assign the addresses from device tree*/ | |
630 | of_pci_parse_iov_addrs(pdev, indexes); | |
631 | } | |
632 | ||
633 | static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev, | |
634 | int resno) | |
635 | { | |
636 | const __be32 *reg; | |
637 | struct device_node *dn = pci_device_to_OF_node(pdev); | |
638 | ||
639 | /*Firmware must support open sriov otherwise report regular alignment*/ | |
640 | reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL); | |
641 | if (!reg) | |
642 | return pci_iov_resource_size(pdev, resno); | |
643 | ||
644 | if (!pdev->is_physfn) | |
645 | return 0; | |
646 | return pseries_get_iov_fw_value(pdev, | |
647 | resno - PCI_IOV_RESOURCES, | |
648 | APERTURE_SIZE); | |
649 | } | |
650 | #endif | |
651 | ||
0ebfff14 BH |
652 | static void __init pSeries_setup_arch(void) |
653 | { | |
b71d47c1 | 654 | set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); |
a934904d | 655 | |
0ebfff14 | 656 | /* Discover PIC type and setup ppc_md accordingly */ |
86425bed | 657 | smp_init_pseries(); |
e7da5dac | 658 | |
0ebfff14 | 659 | |
1da177e4 LT |
660 | /* openpic global configuration register (64-bit format). */ |
661 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | |
662 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | |
663 | ||
664 | /* init to some ~sane value until calibrate_delay() runs */ | |
665 | loops_per_jiffy = 50000000; | |
666 | ||
1da177e4 LT |
667 | fwnmi_init(); |
668 | ||
8989d568 MN |
669 | pseries_setup_rfi_flush(); |
670 | ||
446957ba | 671 | /* By default, only probe PCI (can be overridden by rtas_pci) */ |
673c9756 | 672 | pci_add_flags(PCI_PROBE_ONLY); |
3c13be01 | 673 | |
1da177e4 LT |
674 | /* Find and initialize PCI host bridges */ |
675 | init_pci_config_tokens(); | |
1da177e4 | 676 | find_and_init_phbs(); |
1cf3d8b3 | 677 | of_reconfig_notifier_register(&pci_dn_reconfig_nb); |
1da177e4 | 678 | |
1da177e4 LT |
679 | pSeries_nvram_init(); |
680 | ||
363edbe2 | 681 | if (firmware_has_feature(FW_FEATURE_LPAR)) { |
8d15a3e5 | 682 | vpa_init(boot_cpuid); |
363edbe2 | 683 | ppc_md.power_save = pseries_lpar_idle; |
180a3362 | 684 | ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; |
fc5f6221 BL |
685 | #ifdef CONFIG_PCI_IOV |
686 | ppc_md.pcibios_fixup_resources = | |
687 | pseries_pci_fixup_resources; | |
688 | ppc_md.pcibios_fixup_sriov = | |
689 | pseries_pci_fixup_iov_resources; | |
690 | ppc_md.pcibios_iov_resource_alignment = | |
691 | pseries_pci_iov_resource_alignment; | |
692 | #endif | |
363edbe2 VS |
693 | } else { |
694 | /* No special idle routine */ | |
180a3362 | 695 | ppc_md.enable_pmcs = power4_enable_pmcs; |
363edbe2 | 696 | } |
fc8effa4 | 697 | |
d82fb31a | 698 | ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; |
1da177e4 LT |
699 | } |
700 | ||
35adacd6 NP |
701 | static void pseries_panic(char *str) |
702 | { | |
703 | panic_flush_kmsg_end(); | |
704 | rtas_os_term(str); | |
705 | } | |
706 | ||
1da177e4 LT |
707 | static int __init pSeries_init_panel(void) |
708 | { | |
709 | /* Manually leave the kernel version on the panel. */ | |
983d8a6d | 710 | #ifdef __BIG_ENDIAN__ |
1da177e4 | 711 | ppc_md.progress("Linux ppc64\n", 0); |
983d8a6d TB |
712 | #else |
713 | ppc_md.progress("Linux ppc64le\n", 0); | |
714 | #endif | |
96b644bd | 715 | ppc_md.progress(init_utsname()->version, 0); |
1da177e4 LT |
716 | |
717 | return 0; | |
718 | } | |
f86d6b9b | 719 | machine_arch_initcall(pseries, pSeries_init_panel); |
1da177e4 | 720 | |
4474ef05 | 721 | static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx) |
cab0af98 | 722 | { |
76032de8 | 723 | return plpar_hcall_norets(H_SET_DABR, dabr); |
cab0af98 ME |
724 | } |
725 | ||
4474ef05 | 726 | static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx) |
76032de8 | 727 | { |
4474ef05 MN |
728 | /* Have to set at least one bit in the DABRX according to PAPR */ |
729 | if (dabrx == 0 && dabr == 0) | |
730 | dabrx = DABRX_USER; | |
731 | /* PAPR says we can only set kernel and user bits */ | |
cd144573 | 732 | dabrx &= DABRX_KERNEL | DABRX_USER; |
4474ef05 MN |
733 | |
734 | return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx); | |
76032de8 | 735 | } |
1da177e4 | 736 | |
bf99de36 MN |
737 | static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx) |
738 | { | |
739 | /* PAPR says we can't set HYP */ | |
740 | dawrx &= ~DAWRX_HYP; | |
741 | ||
742 | return plapr_set_watchpoint0(dawr, dawrx); | |
743 | } | |
744 | ||
e46de429 RJ |
745 | #define CMO_CHARACTERISTICS_TOKEN 44 |
746 | #define CMO_MAXLENGTH 1026 | |
747 | ||
9ee820fa BK |
748 | void pSeries_coalesce_init(void) |
749 | { | |
750 | struct hvcall_mpp_x_data mpp_x_data; | |
751 | ||
752 | if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data)) | |
753 | powerpc_firmware_features |= FW_FEATURE_XCMO; | |
754 | else | |
755 | powerpc_firmware_features &= ~FW_FEATURE_XCMO; | |
756 | } | |
757 | ||
e46de429 RJ |
758 | /** |
759 | * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, | |
760 | * handle that here. (Stolen from parse_system_parameter_string) | |
761 | */ | |
e51df2c1 | 762 | static void pSeries_cmo_feature_init(void) |
e46de429 RJ |
763 | { |
764 | char *ptr, *key, *value, *end; | |
765 | int call_status; | |
e589a440 | 766 | int page_order = IOMMU_PAGE_SHIFT_4K; |
e46de429 RJ |
767 | |
768 | pr_debug(" -> fw_cmo_feature_init()\n"); | |
769 | spin_lock(&rtas_data_buf_lock); | |
770 | memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); | |
771 | call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, | |
772 | NULL, | |
773 | CMO_CHARACTERISTICS_TOKEN, | |
774 | __pa(rtas_data_buf), | |
775 | RTAS_DATA_BUF_SIZE); | |
776 | ||
777 | if (call_status != 0) { | |
778 | spin_unlock(&rtas_data_buf_lock); | |
779 | pr_debug("CMO not available\n"); | |
780 | pr_debug(" <- fw_cmo_feature_init()\n"); | |
781 | return; | |
782 | } | |
783 | ||
784 | end = rtas_data_buf + CMO_MAXLENGTH - 2; | |
785 | ptr = rtas_data_buf + 2; /* step over strlen value */ | |
786 | key = value = ptr; | |
787 | ||
788 | while (*ptr && (ptr <= end)) { | |
789 | /* Separate the key and value by replacing '=' with '\0' and | |
790 | * point the value at the string after the '=' | |
791 | */ | |
792 | if (ptr[0] == '=') { | |
793 | ptr[0] = '\0'; | |
794 | value = ptr + 1; | |
795 | } else if (ptr[0] == '\0' || ptr[0] == ',') { | |
796 | /* Terminate the string containing the key/value pair */ | |
797 | ptr[0] = '\0'; | |
798 | ||
799 | if (key == value) { | |
800 | pr_debug("Malformed key/value pair\n"); | |
801 | /* Never found a '=', end processing */ | |
802 | break; | |
803 | } | |
804 | ||
81f14997 RJ |
805 | if (0 == strcmp(key, "CMOPageSize")) |
806 | page_order = simple_strtol(value, NULL, 10); | |
807 | else if (0 == strcmp(key, "PrPSP")) | |
808 | CMO_PrPSP = simple_strtol(value, NULL, 10); | |
e46de429 | 809 | else if (0 == strcmp(key, "SecPSP")) |
81f14997 | 810 | CMO_SecPSP = simple_strtol(value, NULL, 10); |
e46de429 RJ |
811 | value = key = ptr + 1; |
812 | } | |
813 | ptr++; | |
814 | } | |
815 | ||
81f14997 RJ |
816 | /* Page size is returned as the power of 2 of the page size, |
817 | * convert to the page size in bytes before returning | |
818 | */ | |
819 | CMO_PageSize = 1 << page_order; | |
820 | pr_debug("CMO_PageSize = %lu\n", CMO_PageSize); | |
821 | ||
822 | if (CMO_PrPSP != -1 || CMO_SecPSP != -1) { | |
e46de429 | 823 | pr_info("CMO enabled\n"); |
81f14997 RJ |
824 | pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
825 | CMO_SecPSP); | |
e46de429 | 826 | powerpc_firmware_features |= FW_FEATURE_CMO; |
9ee820fa | 827 | pSeries_coalesce_init(); |
e46de429 | 828 | } else |
81f14997 RJ |
829 | pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP, |
830 | CMO_SecPSP); | |
e46de429 RJ |
831 | spin_unlock(&rtas_data_buf_lock); |
832 | pr_debug(" <- fw_cmo_feature_init()\n"); | |
833 | } | |
834 | ||
1da177e4 LT |
835 | /* |
836 | * Early initialization. Relocation is on but do not reference unbolted pages | |
837 | */ | |
f2d57694 | 838 | static void __init pseries_init(void) |
1da177e4 | 839 | { |
f2d57694 | 840 | pr_debug(" -> pseries_init()\n"); |
1da177e4 | 841 | |
4d2bb3f5 | 842 | #ifdef CONFIG_HVC_CONSOLE |
57cfb814 | 843 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4d2bb3f5 BH |
844 | hvc_vio_init_early(); |
845 | #endif | |
06c88766 | 846 | if (firmware_has_feature(FW_FEATURE_XDABR)) |
76032de8 | 847 | ppc_md.set_dabr = pseries_set_xdabr; |
06c88766 MN |
848 | else if (firmware_has_feature(FW_FEATURE_DABR)) |
849 | ppc_md.set_dabr = pseries_set_dabr; | |
1da177e4 | 850 | |
bf99de36 MN |
851 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) |
852 | ppc_md.set_dawr = pseries_set_dawr; | |
853 | ||
e46de429 | 854 | pSeries_cmo_feature_init(); |
1da177e4 LT |
855 | iommu_init_early_pSeries(); |
856 | ||
f2d57694 | 857 | pr_debug(" <- pseries_init()\n"); |
1da177e4 LT |
858 | } |
859 | ||
9178ba29 AG |
860 | /** |
861 | * pseries_power_off - tell firmware about how to power off the system. | |
862 | * | |
863 | * This function calls either the power-off rtas token in normal cases | |
864 | * or the ibm,power-off-ups token (if present & requested) in case of | |
865 | * a power failure. If power-off token is used, power on will only be | |
866 | * possible with power button press. If ibm,power-off-ups token is used | |
867 | * it will allow auto poweron after power is restored. | |
868 | */ | |
869 | static void pseries_power_off(void) | |
870 | { | |
871 | int rc; | |
872 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); | |
873 | ||
874 | if (rtas_flash_term_hook) | |
875 | rtas_flash_term_hook(SYS_POWER_OFF); | |
876 | ||
877 | if (rtas_poweron_auto == 0 || | |
878 | rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) { | |
879 | rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1); | |
880 | printk(KERN_INFO "RTAS power-off returned %d\n", rc); | |
881 | } else { | |
882 | rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL); | |
883 | printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc); | |
884 | } | |
885 | for (;;); | |
886 | } | |
887 | ||
e8222502 BH |
888 | static int __init pSeries_probe(void) |
889 | { | |
406b0b6a | 890 | const char *dtype = of_get_property(of_root, "device_type", NULL); |
5773bbcd | 891 | |
e8222502 BH |
892 | if (dtype == NULL) |
893 | return 0; | |
894 | if (strcmp(dtype, "chrp")) | |
1da177e4 LT |
895 | return 0; |
896 | ||
133dda1e AB |
897 | /* Cell blades firmware claims to be chrp while it's not. Until this |
898 | * is fixed, we need to avoid those here. | |
899 | */ | |
406b0b6a BH |
900 | if (of_machine_is_compatible("IBM,CPBW-1.0") || |
901 | of_machine_is_compatible("IBM,CBEA")) | |
133dda1e AB |
902 | return 0; |
903 | ||
9178ba29 AG |
904 | pm_power_off = pseries_power_off; |
905 | ||
f7ebf352 ME |
906 | pr_debug("Machine is%s LPAR !\n", |
907 | (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not"); | |
57cfb814 | 908 | |
f2d57694 BH |
909 | pseries_init(); |
910 | ||
1da177e4 LT |
911 | return 1; |
912 | } | |
913 | ||
4267292b PM |
914 | static int pSeries_pci_probe_mode(struct pci_bus *bus) |
915 | { | |
57cfb814 | 916 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
4267292b PM |
917 | return PCI_PROBE_DEVTREE; |
918 | return PCI_PROBE_NORMAL; | |
919 | } | |
920 | ||
38ae9ec4 DA |
921 | struct pci_controller_ops pseries_pci_controller_ops = { |
922 | .probe_mode = pSeries_pci_probe_mode, | |
923 | }; | |
924 | ||
e8222502 BH |
925 | define_machine(pseries) { |
926 | .name = "pSeries", | |
1da177e4 LT |
927 | .probe = pSeries_probe, |
928 | .setup_arch = pSeries_setup_arch, | |
e7da5dac | 929 | .init_IRQ = pseries_init_irq, |
0dd194d0 | 930 | .show_cpuinfo = pSeries_show_cpuinfo, |
1da177e4 LT |
931 | .log_error = pSeries_log_error, |
932 | .pcibios_fixup = pSeries_final_fixup, | |
f4fcbbe9 | 933 | .restart = rtas_restart, |
f4fcbbe9 | 934 | .halt = rtas_halt, |
35adacd6 | 935 | .panic = pseries_panic, |
773bf9c4 AB |
936 | .get_boot_time = rtas_get_boot_time, |
937 | .get_rtc_time = rtas_get_rtc_time, | |
938 | .set_rtc_time = rtas_set_rtc_time, | |
10f7e7c1 | 939 | .calibrate_decr = generic_calibrate_decr, |
6566c6f1 | 940 | .progress = rtas_progress, |
1da177e4 LT |
941 | .system_reset_exception = pSeries_system_reset_exception, |
942 | .machine_check_exception = pSeries_machine_check_exception, | |
da665885 | 943 | #ifdef CONFIG_KEXEC_CORE |
cedddd81 | 944 | .machine_kexec = pSeries_machine_kexec, |
d739d2ca | 945 | .kexec_cpu_down = pseries_kexec_cpu_down, |
cedddd81 | 946 | #endif |
a5d86257 AB |
947 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
948 | .memory_block_size = pseries_memory_block_size, | |
949 | #endif | |
1da177e4 | 950 | }; |