[POWERPC] Fix iseries/smp.c for irq breakage
[linux-2.6-block.git] / arch / powerpc / platforms / pseries / setup.c
CommitLineData
1da177e4 1/*
033ef338 2 * 64-bit pSeries and RS/6000 setup code.
1da177e4
LT
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15/*
16 * bootup setup stuff..
17 */
18
19#undef DEBUG
20
62d60e9f 21#include <linux/cpu.h>
1da177e4
LT
22#include <linux/errno.h>
23#include <linux/sched.h>
24#include <linux/kernel.h>
25#include <linux/mm.h>
26#include <linux/stddef.h>
27#include <linux/unistd.h>
28#include <linux/slab.h>
29#include <linux/user.h>
30#include <linux/a.out.h>
31#include <linux/tty.h>
32#include <linux/major.h>
33#include <linux/interrupt.h>
34#include <linux/reboot.h>
35#include <linux/init.h>
36#include <linux/ioport.h>
37#include <linux/console.h>
38#include <linux/pci.h>
cebb2b15 39#include <linux/utsname.h>
1da177e4
LT
40#include <linux/adb.h>
41#include <linux/module.h>
42#include <linux/delay.h>
43#include <linux/irq.h>
44#include <linux/seq_file.h>
45#include <linux/root_dev.h>
46
47#include <asm/mmu.h>
48#include <asm/processor.h>
49#include <asm/io.h>
50#include <asm/pgtable.h>
51#include <asm/prom.h>
52#include <asm/rtas.h>
53#include <asm/pci-bridge.h>
54#include <asm/iommu.h>
55#include <asm/dma.h>
56#include <asm/machdep.h>
57#include <asm/irq.h>
3d1229d6 58#include <asm/kexec.h>
1da177e4
LT
59#include <asm/time.h>
60#include <asm/nvram.h>
007e8f51 61#include "xics.h"
180a3362 62#include <asm/pmc.h>
bbeb3f4c 63#include <asm/mpic.h>
d387899f 64#include <asm/ppc-pci.h>
69a80d3f
PM
65#include <asm/i8259.h>
66#include <asm/udbg.h>
2249ca9d 67#include <asm/smp.h>
1da177e4 68
a1218720 69#include "plpar_wrappers.h"
c902be71 70#include "ras.h"
1965746b 71#include "firmware.h"
a1218720 72
1da177e4
LT
73#ifdef DEBUG
74#define DBG(fmt...) udbg_printf(fmt)
75#else
76#define DBG(fmt...)
77#endif
78
0ebfff14
BH
79/* move those away to a .h */
80extern void smp_init_pseries_mpic(void);
81extern void smp_init_pseries_xics(void);
1da177e4 82extern void find_udbg_vterm(void);
1da177e4
LT
83
84int fwnmi_active; /* TRUE if an FWNMI handler is present */
85
fbd7740f
PM
86static void pseries_shared_idle_sleep(void);
87static void pseries_dedicated_idle_sleep(void);
62d60e9f 88
0ebfff14 89static struct device_node *pSeries_mpic_node;
1da177e4 90
8446196a 91static void pSeries_show_cpuinfo(struct seq_file *m)
1da177e4
LT
92{
93 struct device_node *root;
94 const char *model = "";
95
96 root = of_find_node_by_path("/");
97 if (root)
98 model = get_property(root, "model", NULL);
99 seq_printf(m, "machine\t\t: CHRP %s\n", model);
100 of_node_put(root);
101}
102
103/* Initialize firmware assisted non-maskable interrupts if
104 * the firmware supports this feature.
1da177e4
LT
105 */
106static void __init fwnmi_init(void)
107{
8c4f1f29
ME
108 unsigned long system_reset_addr, machine_check_addr;
109
1da177e4
LT
110 int ibm_nmi_register = rtas_token("ibm,nmi-register");
111 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
112 return;
8c4f1f29
ME
113
114 /* If the kernel's not linked at zero we point the firmware at low
115 * addresses anyway, and use a trampoline to get to the real code. */
116 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
117 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
118
119 if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
120 machine_check_addr))
1da177e4
LT
121 fwnmi_active = 1;
122}
123
7d12e780 124void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
b9e5b4e6 125{
7d12e780 126 unsigned int cascade_irq = i8259_irq(get_irq_regs());
0ebfff14 127 if (cascade_irq != NO_IRQ)
7d12e780 128 generic_handle_irq(cascade_irq);
0ebfff14 129 desc->chip->eoi(irq);
b9e5b4e6
BH
130}
131
0ebfff14 132static void __init pseries_mpic_init_IRQ(void)
1da177e4 133{
0ebfff14 134 struct device_node *np, *old, *cascade = NULL;
954a46e2 135 const unsigned int *addrp;
f9bd170a 136 unsigned long intack = 0;
954a46e2 137 const unsigned int *opprop;
1da177e4 138 unsigned long openpic_addr = 0;
0ebfff14
BH
139 unsigned int cascade_irq;
140 int naddr, n, i, opplen;
141 struct mpic *mpic;
1da177e4 142
0ebfff14
BH
143 np = of_find_node_by_path("/");
144 naddr = prom_n_addr_cells(np);
954a46e2 145 opprop = get_property(np, "platform-open-pic", &opplen);
1da177e4 146 if (opprop != 0) {
0ebfff14 147 openpic_addr = of_read_number(opprop, naddr);
1da177e4
LT
148 printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
149 }
0ebfff14 150 of_node_put(np);
1da177e4
LT
151
152 BUG_ON(openpic_addr == 0);
153
1da177e4 154 /* Setup the openpic driver */
0ebfff14
BH
155 mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
156 MPIC_PRIMARY,
157 16, 250, /* isu size, irq count */
158 " MPIC ");
159 BUG_ON(mpic == NULL);
160
161 /* Add ISUs */
162 opplen /= sizeof(u32);
163 for (n = 0, i = naddr; i < opplen; i += naddr, n++) {
164 unsigned long isuaddr = of_read_number(opprop + i, naddr);
165 mpic_assign_isu(mpic, n, isuaddr);
166 }
167
168 /* All ISUs are setup, complete initialization */
169 mpic_init(mpic);
170
171 /* Look for cascade */
172 for_each_node_by_type(np, "interrupt-controller")
173 if (device_is_compatible(np, "chrp,iic")) {
174 cascade = np;
175 break;
176 }
177 if (cascade == NULL)
178 return;
179
180 cascade_irq = irq_of_parse_and_map(cascade, 0);
181 if (cascade == NO_IRQ) {
586da2cc 182 printk(KERN_ERR "mpic: failed to map cascade interrupt");
0ebfff14
BH
183 return;
184 }
185
186 /* Check ACK type */
187 for (old = of_node_get(cascade); old != NULL ; old = np) {
188 np = of_get_parent(old);
189 of_node_put(old);
190 if (np == NULL)
191 break;
192 if (strcmp(np->name, "pci") != 0)
193 continue;
954a46e2 194 addrp = get_property(np, "8259-interrupt-acknowledge",
0ebfff14
BH
195 NULL);
196 if (addrp == NULL)
197 continue;
198 naddr = prom_n_addr_cells(np);
199 intack = addrp[naddr-1];
200 if (naddr > 1)
201 intack |= ((unsigned long)addrp[naddr-2]) << 32;
202 }
203 if (intack)
204 printk(KERN_DEBUG "mpic: PCI 8259 intack at 0x%016lx\n",
205 intack);
206 i8259_init(cascade, intack);
207 of_node_put(cascade);
208 set_irq_chained_handler(cascade_irq, pseries_8259_cascade);
1da177e4
LT
209}
210
180a3362
ME
211static void pseries_lpar_enable_pmcs(void)
212{
213 unsigned long set, reset;
214
180a3362
ME
215 set = 1UL << 63;
216 reset = 0;
217 plpar_hcall_norets(H_PERFMON, set, reset);
218
219 /* instruct hypervisor to maintain PMCs */
220 if (firmware_has_feature(FW_FEATURE_SPLPAR))
3356bb9f 221 get_lppaca()->pmcregs_in_use = 1;
180a3362
ME
222}
223
0ebfff14 224#ifdef CONFIG_KEXEC
f50d4cfc 225static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
0ebfff14
BH
226{
227 /* Don't risk a hypervisor call if we're crashing */
228 if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
2f6093c8 229 unsigned long addr;
0ebfff14 230
2f6093c8
MN
231 addr = __pa(get_slb_shadow());
232 if (unregister_slb_shadow(hard_smp_processor_id(), addr))
233 printk("SLB shadow buffer deregistration of "
234 "cpu %u (hw_cpu_id %d) failed\n",
235 smp_processor_id(),
236 hard_smp_processor_id());
237
238 addr = __pa(get_lppaca());
239 if (unregister_vpa(hard_smp_processor_id(), addr)) {
0ebfff14
BH
240 printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
241 "failed\n", smp_processor_id(),
242 hard_smp_processor_id());
243 }
244 }
f50d4cfc
ME
245}
246
247static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
248{
249 pseries_kexec_cpu_down(crash_shutdown, secondary);
250 mpic_teardown_this_cpu(secondary);
251}
252
253static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
254{
255 pseries_kexec_cpu_down(crash_shutdown, secondary);
0ebfff14
BH
256 xics_teardown_cpu(secondary);
257}
258#endif /* CONFIG_KEXEC */
259
260static void __init pseries_discover_pic(void)
261{
262 struct device_node *np;
954a46e2 263 const char *typep;
0ebfff14
BH
264
265 for (np = NULL; (np = of_find_node_by_name(np,
266 "interrupt-controller"));) {
954a46e2 267 typep = get_property(np, "compatible", NULL);
0ebfff14
BH
268 if (strstr(typep, "open-pic")) {
269 pSeries_mpic_node = of_node_get(np);
270 ppc_md.init_IRQ = pseries_mpic_init_IRQ;
271 ppc_md.get_irq = mpic_get_irq;
272#ifdef CONFIG_KEXEC
273 ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
274#endif
1da177e4 275#ifdef CONFIG_SMP
0ebfff14 276 smp_init_pseries_mpic();
1da177e4 277#endif
0ebfff14
BH
278 return;
279 } else if (strstr(typep, "ppc-xicp")) {
280 ppc_md.init_IRQ = xics_init_IRQ;
281#ifdef CONFIG_KEXEC
282 ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
283#endif
284#ifdef CONFIG_SMP
285 smp_init_pseries_xics();
286#endif
287 return;
288 }
289 }
290 printk(KERN_ERR "pSeries_discover_pic: failed to recognize"
291 " interrupt-controller\n");
292}
293
294static void __init pSeries_setup_arch(void)
295{
296 /* Discover PIC type and setup ppc_md accordingly */
297 pseries_discover_pic();
298
1da177e4
LT
299 /* openpic global configuration register (64-bit format). */
300 /* openpic Interrupt Source Unit pointer (64-bit format). */
301 /* python0 facility area (mmio) (64-bit format) REAL address. */
302
303 /* init to some ~sane value until calibrate_delay() runs */
304 loops_per_jiffy = 50000000;
305
306 if (ROOT_DEV == 0) {
307 printk("No ramdisk, default root is /dev/sda2\n");
308 ROOT_DEV = Root_SDA2;
309 }
310
311 fwnmi_init();
312
313 /* Find and initialize PCI host bridges */
314 init_pci_config_tokens();
1da177e4 315 find_and_init_phbs();
0160f53e 316 eeh_init();
1da177e4 317
1da177e4
LT
318 pSeries_nvram_init();
319
62d60e9f 320 /* Choose an idle loop */
1ababe11 321 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
8d15a3e5 322 vpa_init(boot_cpuid);
3356bb9f 323 if (get_lppaca()->shared_proc) {
4baaf0cf 324 printk(KERN_DEBUG "Using shared processor idle loop\n");
fbd7740f 325 ppc_md.power_save = pseries_shared_idle_sleep;
62d60e9f 326 } else {
4baaf0cf 327 printk(KERN_DEBUG "Using dedicated idle loop\n");
fbd7740f 328 ppc_md.power_save = pseries_dedicated_idle_sleep;
62d60e9f
ME
329 }
330 } else {
4baaf0cf 331 printk(KERN_DEBUG "Using default idle loop\n");
62d60e9f 332 }
180a3362 333
57cfb814 334 if (firmware_has_feature(FW_FEATURE_LPAR))
180a3362
ME
335 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
336 else
337 ppc_md.enable_pmcs = power4_enable_pmcs;
1da177e4
LT
338}
339
340static int __init pSeries_init_panel(void)
341{
342 /* Manually leave the kernel version on the panel. */
343 ppc_md.progress("Linux ppc64\n", 0);
96b644bd 344 ppc_md.progress(init_utsname()->version, 0);
1da177e4
LT
345
346 return 0;
347}
348arch_initcall(pSeries_init_panel);
349
1da177e4
LT
350static void pSeries_mach_cpu_die(void)
351{
352 local_irq_disable();
353 idle_task_exit();
b9e5b4e6 354 xics_teardown_cpu(0);
1da177e4
LT
355 rtas_stop_self();
356 /* Should never get here... */
357 BUG();
358 for(;;);
359}
360
cab0af98
ME
361static int pseries_set_dabr(unsigned long dabr)
362{
76032de8 363 return plpar_hcall_norets(H_SET_DABR, dabr);
cab0af98
ME
364}
365
76032de8
ME
366static int pseries_set_xdabr(unsigned long dabr)
367{
368 /* We want to catch accesses from kernel and userspace */
369 return plpar_hcall_norets(H_SET_XDABR, dabr,
370 H_DABRX_KERNEL | H_DABRX_USER);
371}
1da177e4
LT
372
373/*
374 * Early initialization. Relocation is on but do not reference unbolted pages
375 */
376static void __init pSeries_init_early(void)
377{
1da177e4
LT
378 DBG(" -> pSeries_init_early()\n");
379
380 fw_feature_init();
1da177e4 381
57cfb814 382 if (firmware_has_feature(FW_FEATURE_LPAR))
1da177e4 383 find_udbg_vterm();
1da177e4 384
76032de8 385 if (firmware_has_feature(FW_FEATURE_DABR))
cab0af98 386 ppc_md.set_dabr = pseries_set_dabr;
76032de8
ME
387 else if (firmware_has_feature(FW_FEATURE_XDABR))
388 ppc_md.set_dabr = pseries_set_xdabr;
1da177e4
LT
389
390 iommu_init_early_pSeries();
391
1da177e4
LT
392 DBG(" <- pSeries_init_early()\n");
393}
394
395
1da177e4
LT
396static int pSeries_check_legacy_ioport(unsigned int baseport)
397{
398 struct device_node *np;
399
400#define I8042_DATA_REG 0x60
401#define FDC_BASE 0x3f0
402
403
404 switch(baseport) {
405 case I8042_DATA_REG:
406 np = of_find_node_by_type(NULL, "8042");
407 if (np == NULL)
408 return -ENODEV;
409 of_node_put(np);
410 break;
411 case FDC_BASE:
412 np = of_find_node_by_type(NULL, "fdc");
413 if (np == NULL)
414 return -ENODEV;
415 of_node_put(np);
416 break;
417 }
418 return 0;
419}
420
421/*
422 * Called very early, MMU is off, device-tree isn't unflattened
423 */
1da177e4 424
e8222502
BH
425static int __init pSeries_probe_hypertas(unsigned long node,
426 const char *uname, int depth,
427 void *data)
1da177e4 428{
e8222502
BH
429 if (depth != 1 ||
430 (strcmp(uname, "rtas") != 0 && strcmp(uname, "rtas@0") != 0))
431 return 0;
432
433 if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL)
434 powerpc_firmware_features |= FW_FEATURE_LPAR;
435
7d0daae4
ME
436 if (firmware_has_feature(FW_FEATURE_LPAR))
437 hpte_init_lpar();
438 else
439 hpte_init_native();
440
e8222502
BH
441 return 1;
442}
443
444static int __init pSeries_probe(void)
445{
133dda1e 446 unsigned long root = of_get_flat_dt_root();
e8222502
BH
447 char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(),
448 "device_type", NULL);
449 if (dtype == NULL)
450 return 0;
451 if (strcmp(dtype, "chrp"))
1da177e4
LT
452 return 0;
453
133dda1e
AB
454 /* Cell blades firmware claims to be chrp while it's not. Until this
455 * is fixed, we need to avoid those here.
456 */
457 if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
458 of_flat_dt_is_compatible(root, "IBM,CBEA"))
459 return 0;
460
e8222502 461 DBG("pSeries detected, looking for LPAR capability...\n");
1da177e4 462
e8222502
BH
463 /* Now try to figure out if we are running on LPAR */
464 of_scan_flat_dt(pSeries_probe_hypertas, NULL);
465
466 DBG("Machine is%s LPAR !\n",
467 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
57cfb814 468
1da177e4
LT
469 return 1;
470}
471
e8222502 472
c66d5dd6
ME
473DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
474
fbd7740f 475static void pseries_dedicated_idle_sleep(void)
143a1dec 476{
050a0938 477 unsigned int cpu = smp_processor_id();
c66d5dd6 478 unsigned long start_snooze;
c66d5dd6 479
fbd7740f
PM
480 /*
481 * Indicate to the HV that we are idle. Now would be
482 * a good time to find other work to dispatch.
483 */
484 get_lppaca()->idle = 1;
050a0938 485
fbd7740f
PM
486 /*
487 * We come in with interrupts disabled, and need_resched()
488 * has been checked recently. If we should poll for a little
489 * while, do so.
490 */
0ddd3e7d 491 if (__get_cpu_var(smt_snooze_delay)) {
fbd7740f 492 start_snooze = get_tb() +
0ddd3e7d 493 __get_cpu_var(smt_snooze_delay) * tb_ticks_per_usec;
fbd7740f
PM
494 local_irq_enable();
495 set_thread_flag(TIF_POLLING_NRFLAG);
050a0938 496
fbd7740f
PM
497 while (get_tb() < start_snooze) {
498 if (need_resched() || cpu_is_offline(cpu))
499 goto out;
500 ppc64_runlatch_off();
501 HMT_low();
502 HMT_very_low();
503 }
504
505 HMT_medium();
506 clear_thread_flag(TIF_POLLING_NRFLAG);
507 smp_mb();
508 local_irq_disable();
509 if (need_resched() || cpu_is_offline(cpu))
510 goto out;
c66d5dd6 511 }
fbd7740f 512
0ddd3e7d 513 cede_processor();
fbd7740f
PM
514
515out:
516 HMT_medium();
517 get_lppaca()->idle = 0;
c66d5dd6
ME
518}
519
fbd7740f 520static void pseries_shared_idle_sleep(void)
c66d5dd6 521{
fbd7740f
PM
522 /*
523 * Indicate to the HV that we are idle. Now would be
524 * a good time to find other work to dispatch.
525 */
526 get_lppaca()->idle = 1;
050a0938 527
fbd7740f
PM
528 /*
529 * Yield the processor to the hypervisor. We return if
530 * an external interrupt occurs (which are driven prior
531 * to returning here) or if a prod occurs from another
532 * processor. When returning here, external interrupts
533 * are enabled.
534 */
535 cede_processor();
050a0938 536
fbd7740f 537 get_lppaca()->idle = 0;
c66d5dd6
ME
538}
539
4267292b
PM
540static int pSeries_pci_probe_mode(struct pci_bus *bus)
541{
57cfb814 542 if (firmware_has_feature(FW_FEATURE_LPAR))
4267292b
PM
543 return PCI_PROBE_DEVTREE;
544 return PCI_PROBE_NORMAL;
545}
546
e8222502
BH
547define_machine(pseries) {
548 .name = "pSeries",
1da177e4
LT
549 .probe = pSeries_probe,
550 .setup_arch = pSeries_setup_arch,
551 .init_early = pSeries_init_early,
0dd194d0 552 .show_cpuinfo = pSeries_show_cpuinfo,
1da177e4
LT
553 .log_error = pSeries_log_error,
554 .pcibios_fixup = pSeries_final_fixup,
4267292b 555 .pci_probe_mode = pSeries_pci_probe_mode,
dad32bbf 556 .irq_bus_setup = pSeries_irq_bus_setup,
f4fcbbe9
PM
557 .restart = rtas_restart,
558 .power_off = rtas_power_off,
559 .halt = rtas_halt,
1da177e4
LT
560 .panic = rtas_os_term,
561 .cpu_die = pSeries_mach_cpu_die,
773bf9c4
AB
562 .get_boot_time = rtas_get_boot_time,
563 .get_rtc_time = rtas_get_rtc_time,
564 .set_rtc_time = rtas_set_rtc_time,
10f7e7c1 565 .calibrate_decr = generic_calibrate_decr,
6566c6f1 566 .progress = rtas_progress,
1da177e4
LT
567 .check_legacy_ioport = pSeries_check_legacy_ioport,
568 .system_reset_exception = pSeries_system_reset_exception,
569 .machine_check_exception = pSeries_machine_check_exception,
c5e24354 570#ifdef CONFIG_KEXEC
3d1229d6
ME
571 .machine_kexec = default_machine_kexec,
572 .machine_kexec_prepare = default_machine_kexec_prepare,
cc532915 573 .machine_crash_shutdown = default_machine_crash_shutdown,
c5e24354 574#endif
1da177e4 575};