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9f0fd049 AP |
1 | /* |
2 | * This file implements an irqchip for OPAL events. Whenever there is | |
3 | * an interrupt that is handled by OPAL we get passed a list of events | |
4 | * that Linux needs to do something about. These basically look like | |
5 | * interrupts to Linux so we implement an irqchip to handle them. | |
6 | * | |
7 | * Copyright Alistair Popple, IBM Corporation 2014. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | #include <linux/bitops.h> | |
15 | #include <linux/irq.h> | |
16 | #include <linux/irqchip.h> | |
17 | #include <linux/irqdomain.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/kthread.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/irq_work.h> | |
26 | ||
27 | #include <asm/machdep.h> | |
28 | #include <asm/opal.h> | |
29 | ||
30 | #include "powernv.h" | |
31 | ||
32 | /* Maximum number of events supported by OPAL firmware */ | |
33 | #define MAX_NUM_EVENTS 64 | |
34 | ||
35 | struct opal_event_irqchip { | |
36 | struct irq_chip irqchip; | |
37 | struct irq_domain *domain; | |
38 | unsigned long mask; | |
39 | }; | |
40 | static struct opal_event_irqchip opal_event_irqchip; | |
41 | ||
42 | static unsigned int opal_irq_count; | |
43 | static unsigned int *opal_irqs; | |
44 | ||
45 | static void opal_handle_irq_work(struct irq_work *work); | |
46 | static __be64 last_outstanding_events; | |
47 | static struct irq_work opal_event_irq_work = { | |
48 | .func = opal_handle_irq_work, | |
49 | }; | |
50 | ||
51 | static void opal_event_mask(struct irq_data *d) | |
52 | { | |
53 | clear_bit(d->hwirq, &opal_event_irqchip.mask); | |
54 | } | |
55 | ||
56 | static void opal_event_unmask(struct irq_data *d) | |
57 | { | |
58 | set_bit(d->hwirq, &opal_event_irqchip.mask); | |
59 | ||
60 | opal_poll_events(&last_outstanding_events); | |
61 | if (last_outstanding_events & opal_event_irqchip.mask) | |
62 | /* Need to retrigger the interrupt */ | |
63 | irq_work_queue(&opal_event_irq_work); | |
64 | } | |
65 | ||
66 | static int opal_event_set_type(struct irq_data *d, unsigned int flow_type) | |
67 | { | |
68 | /* | |
69 | * For now we only support level triggered events. The irq | |
70 | * handler will be called continuously until the event has | |
71 | * been cleared in OPAL. | |
72 | */ | |
73 | if (flow_type != IRQ_TYPE_LEVEL_HIGH) | |
74 | return -EINVAL; | |
75 | ||
76 | return 0; | |
77 | } | |
78 | ||
79 | static struct opal_event_irqchip opal_event_irqchip = { | |
80 | .irqchip = { | |
81 | .name = "OPAL EVT", | |
82 | .irq_mask = opal_event_mask, | |
83 | .irq_unmask = opal_event_unmask, | |
84 | .irq_set_type = opal_event_set_type, | |
85 | }, | |
86 | .mask = 0, | |
87 | }; | |
88 | ||
89 | static int opal_event_map(struct irq_domain *d, unsigned int irq, | |
90 | irq_hw_number_t hwirq) | |
91 | { | |
92 | irq_set_chip_data(irq, &opal_event_irqchip); | |
93 | irq_set_chip_and_handler(irq, &opal_event_irqchip.irqchip, | |
94 | handle_level_irq); | |
95 | ||
96 | return 0; | |
97 | } | |
98 | ||
99 | void opal_handle_events(uint64_t events) | |
100 | { | |
101 | int virq, hwirq = 0; | |
102 | u64 mask = opal_event_irqchip.mask; | |
9f0fd049 AP |
103 | |
104 | if (!in_irq() && (events & mask)) { | |
105 | last_outstanding_events = events; | |
106 | irq_work_queue(&opal_event_irq_work); | |
107 | return; | |
108 | } | |
109 | ||
81f2f7ce | 110 | while (events & mask) { |
9f0fd049 | 111 | hwirq = fls64(events) - 1; |
81f2f7ce AP |
112 | if (BIT_ULL(hwirq) & mask) { |
113 | virq = irq_find_mapping(opal_event_irqchip.domain, | |
114 | hwirq); | |
115 | if (virq) | |
9f0fd049 | 116 | generic_handle_irq(virq); |
81f2f7ce | 117 | } |
9f0fd049 AP |
118 | events &= ~BIT_ULL(hwirq); |
119 | } | |
9f0fd049 AP |
120 | } |
121 | ||
122 | static irqreturn_t opal_interrupt(int irq, void *data) | |
123 | { | |
124 | __be64 events; | |
125 | ||
126 | opal_handle_interrupt(virq_to_hw(irq), &events); | |
127 | opal_handle_events(be64_to_cpu(events)); | |
128 | ||
129 | return IRQ_HANDLED; | |
130 | } | |
131 | ||
132 | static void opal_handle_irq_work(struct irq_work *work) | |
133 | { | |
134 | opal_handle_events(be64_to_cpu(last_outstanding_events)); | |
135 | } | |
136 | ||
ad3aedfb MZ |
137 | static int opal_event_match(struct irq_domain *h, struct device_node *node, |
138 | enum irq_domain_bus_token bus_token) | |
9f0fd049 AP |
139 | { |
140 | return h->of_node == node; | |
141 | } | |
142 | ||
143 | static int opal_event_xlate(struct irq_domain *h, struct device_node *np, | |
144 | const u32 *intspec, unsigned int intsize, | |
145 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | |
146 | { | |
147 | *out_hwirq = intspec[0]; | |
148 | *out_flags = IRQ_TYPE_LEVEL_HIGH; | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
153 | static const struct irq_domain_ops opal_event_domain_ops = { | |
154 | .match = opal_event_match, | |
155 | .map = opal_event_map, | |
156 | .xlate = opal_event_xlate, | |
157 | }; | |
158 | ||
159 | void opal_event_shutdown(void) | |
160 | { | |
161 | unsigned int i; | |
162 | ||
163 | /* First free interrupts, which will also mask them */ | |
164 | for (i = 0; i < opal_irq_count; i++) { | |
165 | if (opal_irqs[i]) | |
166 | free_irq(opal_irqs[i], NULL); | |
167 | opal_irqs[i] = 0; | |
168 | } | |
169 | } | |
170 | ||
171 | int __init opal_event_init(void) | |
172 | { | |
173 | struct device_node *dn, *opal_node; | |
174 | const __be32 *irqs; | |
175 | int i, irqlen, rc = 0; | |
176 | ||
177 | opal_node = of_find_node_by_path("/ibm,opal"); | |
178 | if (!opal_node) { | |
179 | pr_warn("opal: Node not found\n"); | |
180 | return -ENODEV; | |
181 | } | |
182 | ||
183 | /* If dn is NULL it means the domain won't be linked to a DT | |
184 | * node so therefore irq_of_parse_and_map(...) wont work. But | |
185 | * that shouldn't be problem because if we're running a | |
186 | * version of skiboot that doesn't have the dn then the | |
187 | * devices won't have the correct properties and will have to | |
188 | * fall back to the legacy method (opal_event_request(...)) | |
189 | * anyway. */ | |
190 | dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event"); | |
191 | opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS, | |
192 | &opal_event_domain_ops, &opal_event_irqchip); | |
193 | of_node_put(dn); | |
194 | if (!opal_event_irqchip.domain) { | |
195 | pr_warn("opal: Unable to create irq domain\n"); | |
196 | rc = -ENOMEM; | |
197 | goto out; | |
198 | } | |
199 | ||
200 | /* Get interrupt property */ | |
201 | irqs = of_get_property(opal_node, "opal-interrupts", &irqlen); | |
202 | opal_irq_count = irqs ? (irqlen / 4) : 0; | |
203 | pr_debug("Found %d interrupts reserved for OPAL\n", opal_irq_count); | |
204 | ||
205 | /* Install interrupt handlers */ | |
206 | opal_irqs = kcalloc(opal_irq_count, sizeof(*opal_irqs), GFP_KERNEL); | |
207 | for (i = 0; irqs && i < opal_irq_count; i++, irqs++) { | |
208 | unsigned int irq, virq; | |
209 | ||
210 | /* Get hardware and virtual IRQ */ | |
211 | irq = be32_to_cpup(irqs); | |
212 | virq = irq_create_mapping(NULL, irq); | |
213 | if (virq == NO_IRQ) { | |
214 | pr_warn("Failed to map irq 0x%x\n", irq); | |
215 | continue; | |
216 | } | |
217 | ||
218 | /* Install interrupt handler */ | |
219 | rc = request_irq(virq, opal_interrupt, 0, "opal", NULL); | |
220 | if (rc) { | |
221 | irq_dispose_mapping(virq); | |
222 | pr_warn("Error %d requesting irq %d (0x%x)\n", | |
223 | rc, virq, irq); | |
224 | continue; | |
225 | } | |
226 | ||
227 | /* Cache IRQ */ | |
228 | opal_irqs[i] = virq; | |
229 | } | |
230 | ||
231 | out: | |
232 | of_node_put(opal_node); | |
233 | return rc; | |
234 | } | |
02b6505c | 235 | machine_arch_initcall(powernv, opal_event_init); |
9f0fd049 AP |
236 | |
237 | /** | |
238 | * opal_event_request(unsigned int opal_event_nr) - Request an event | |
239 | * @opal_event_nr: the opal event number to request | |
240 | * | |
241 | * This routine can be used to find the linux virq number which can | |
242 | * then be passed to request_irq to assign a handler for a particular | |
243 | * opal event. This should only be used by legacy devices which don't | |
244 | * have proper device tree bindings. Most devices should use | |
245 | * irq_of_parse_and_map() instead. | |
246 | */ | |
247 | int opal_event_request(unsigned int opal_event_nr) | |
248 | { | |
02b6505c AP |
249 | if (WARN_ON_ONCE(!opal_event_irqchip.domain)) |
250 | return NO_IRQ; | |
251 | ||
9f0fd049 AP |
252 | return irq_create_mapping(opal_event_irqchip.domain, opal_event_nr); |
253 | } | |
254 | EXPORT_SYMBOL(opal_event_request); |