[linux-2.6-block.git] / arch / powerpc / platforms / powermac / udbg_scc.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * udbg for zilog scc ports as found on Apple PowerMacs
 *
 * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
 */
#include <linux/types.h>
#include <asm/udbg.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/pmac_feature.h>

extern u8 real_readb(volatile u8 __iomem  *addr);
extern void real_writeb(u8 data, volatile u8 __iomem *addr);

#define	SCC_TXRDY	4
#define SCC_RXRDY	1

static volatile u8 __iomem *sccc;
static volatile u8 __iomem *sccd;

static void udbg_scc_putc(char c)
{
	if (sccc) {
		while ((in_8(sccc) & SCC_TXRDY) == 0)
			;
		out_8(sccd,  c);
		if (c == '\n')
			udbg_scc_putc('\r');
	}
}

static int udbg_scc_getc_poll(void)
{
	if (sccc) {
		if ((in_8(sccc) & SCC_RXRDY) != 0)
			return in_8(sccd);
		else
			return -1;
	}
	return -1;
}

static int udbg_scc_getc(void)
{
	if (sccc) {
		while ((in_8(sccc) & SCC_RXRDY) == 0)
			;
		return in_8(sccd);
	}
	return -1;
}

static unsigned char scc_inittab[] = {
    13, 0,		/* set baud rate divisor */
    12, 0,
    14, 1,		/* baud rate gen enable, src=rtxc */
    11, 0x50,		/* clocks = br gen */
    5,  0xea,		/* tx 8 bits, assert DTR & RTS */
    4,  0x46,		/* x16 clock, 1 stop */
    3,  0xc1,		/* rx enable, 8 bits */
};

void udbg_scc_init(int force_scc)
{
	const u32 *reg;
	unsigned long addr;
	struct device_node *stdout = NULL, *escc = NULL, *macio = NULL;
	struct device_node *ch, *ch_def = NULL, *ch_a = NULL;
	const char *path;
	int i;

	escc = of_find_node_by_name(NULL, "escc");
	if (escc == NULL)
		goto bail;
	macio = of_get_parent(escc);
	if (macio == NULL)
		goto bail;
	path = of_get_property(of_chosen, "linux,stdout-path", NULL);
	if (path != NULL)
		stdout = of_find_node_by_path(path);
	for (ch = NULL; (ch = of_get_next_child(escc, ch)) != NULL;) {
		if (ch == stdout)
			ch_def = of_node_get(ch);
		if (of_node_name_eq(ch, "ch-a"))
			ch_a = of_node_get(ch);
	}
	if (ch_def == NULL && !force_scc)
		goto bail;

	ch = ch_def ? ch_def : ch_a;

	/* Get address within mac-io ASIC */
	reg = of_get_property(escc, "reg", NULL);
	if (reg == NULL)
		goto bail;
	addr = reg[0];

	/* Get address of mac-io PCI itself */
	reg = of_get_property(macio, "assigned-addresses", NULL);
	if (reg == NULL)
		goto bail;
	addr += reg[2];

	/* Lock the serial port */
	pmac_call_feature(PMAC_FTR_SCC_ENABLE, ch,
			  PMAC_SCC_ASYNC | PMAC_SCC_FLAG_XMON, 1);

	if (ch == ch_a)
		addr += 0x20;
	sccc = ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
	sccc += addr & ~PAGE_MASK;
	sccd = sccc + 0x10;

	mb();

	for (i = 20000; i != 0; --i)
		in_8(sccc);
	out_8(sccc, 0x09);		/* reset A or B side */
	out_8(sccc, 0xc0);

	/* If SCC was the OF output port, read the BRG value, else
	 * Setup for 38400 or 57600 8N1 depending on the machine
	 */
	if (ch_def != NULL) {
		out_8(sccc, 13);
		scc_inittab[1] = in_8(sccc);
		out_8(sccc, 12);
		scc_inittab[3] = in_8(sccc);
	} else if (of_machine_is_compatible("RackMac1,1")
		   || of_machine_is_compatible("RackMac1,2")
		   || of_machine_is_compatible("MacRISC4")) {
		/* Xserves and G5s default to 57600 */
		scc_inittab[1] = 0;
		scc_inittab[3] = 0;
	} else {
		/* Others default to 38400 */
		scc_inittab[1] = 0;
		scc_inittab[3] = 1;
	}

	for (i = 0; i < sizeof(scc_inittab); ++i)
		out_8(sccc, scc_inittab[i]);


	udbg_putc = udbg_scc_putc;
	udbg_getc = udbg_scc_getc;
	udbg_getc_poll = udbg_scc_getc_poll;

	udbg_puts("Hello World !\n");

 bail:
	of_node_put(macio);
	of_node_put(escc);
	of_node_put(stdout);
	of_node_put(ch_def);
	of_node_put(ch_a);
}

#ifdef CONFIG_PPC64
static void udbg_real_scc_putc(char c)
{
	while ((real_readb(sccc) & SCC_TXRDY) == 0)
		;
	real_writeb(c, sccd);
	if (c == '\n')
		udbg_real_scc_putc('\r');
}

void __init udbg_init_pmac_realmode(void)
{
	sccc = (volatile u8 __iomem *)0x80013020ul;
	sccd = (volatile u8 __iomem *)0x80013030ul;

	udbg_putc = udbg_real_scc_putc;
	udbg_getc = NULL;
	udbg_getc_poll = NULL;
}
#endif /* CONFIG_PPC64 */
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
7f853352	2	/*
411c9403	3	* udbg for zilog scc ports as found on Apple PowerMacs
7f853352 MM	4	*
7f853352 MM	5	* Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
7f853352	6	*/
7f853352	7	#include <linux/types.h>
188d2ce7	8	#include <asm/udbg.h>
7f853352	9	#include <asm/processor.h>
7f853352 MM	10	#include <asm/io.h>
	11	#include <asm/prom.h>
	12	#include <asm/pmac_feature.h>
	13
	14	extern u8 real_readb(volatile u8 __iomem *addr);
	15	extern void real_writeb(u8 data, volatile u8 __iomem *addr);
	16
	17	#define SCC_TXRDY 4
	18	#define SCC_RXRDY 1
	19
	20	static volatile u8 __iomem *sccc;
	21	static volatile u8 __iomem *sccd;
	22
51d3082f	23	static void udbg_scc_putc(char c)
7f853352 MM	24	{
	25	if (sccc) {
	26	while ((in_8(sccc) & SCC_TXRDY) == 0)
	27	;
	28	out_8(sccd, c);
	29	if (c == '\n')
	30	udbg_scc_putc('\r');
	31	}
	32	}
	33
	34	static int udbg_scc_getc_poll(void)
	35	{
	36	if (sccc) {
	37	if ((in_8(sccc) & SCC_RXRDY) != 0)
	38	return in_8(sccd);
	39	else
	40	return -1;
	41	}
	42	return -1;
	43	}
	44
bb6b9b28	45	static int udbg_scc_getc(void)
7f853352 MM	46	{
	47	if (sccc) {
	48	while ((in_8(sccc) & SCC_RXRDY) == 0)
	49	;
	50	return in_8(sccd);
	51	}
bb6b9b28	52	return -1;
7f853352 MM	53	}
	54
	55	static unsigned char scc_inittab[] = {
	56	13, 0, /* set baud rate divisor */
	57	12, 0,
	58	14, 1, /* baud rate gen enable, src=rtxc */
	59	11, 0x50, /* clocks = br gen */
	60	5, 0xea, /* tx 8 bits, assert DTR & RTS */
	61	4, 0x46, /* x16 clock, 1 stop */
	62	3, 0xc1, /* rx enable, 8 bits */
	63	};
	64
51d3082f	65	void udbg_scc_init(int force_scc)
7f853352	66	{
018a3d1d	67	const u32 *reg;
7f853352	68	unsigned long addr;
51d3082f BH	69	struct device_node stdout = NULL, escc = NULL, *macio = NULL;
51d3082f BH	70	struct device_node ch, ch_def = NULL, *ch_a = NULL;
018a3d1d	71	const char *path;
8921305c	72	int i;
7f853352	73
51d3082f BH	74	escc = of_find_node_by_name(NULL, "escc");
	75	if (escc == NULL)
	76	goto bail;
	77	macio = of_get_parent(escc);
	78	if (macio == NULL)
	79	goto bail;
e2eb6392	80	path = of_get_property(of_chosen, "linux,stdout-path", NULL);
51d3082f BH	81	if (path != NULL)
	82	stdout = of_find_node_by_path(path);
	83	for (ch = NULL; (ch = of_get_next_child(escc, ch)) != NULL;) {
	84	if (ch == stdout)
	85	ch_def = of_node_get(ch);
2c8e65b5	86	if (of_node_name_eq(ch, "ch-a"))
51d3082f BH	87	ch_a = of_node_get(ch);
	88	}
	89	if (ch_def == NULL && !force_scc)
	90	goto bail;
	91
	92	ch = ch_def ? ch_def : ch_a;
7f853352	93
7f853352	94	/* Get address within mac-io ASIC */
e2eb6392	95	reg = of_get_property(escc, "reg", NULL);
7f853352	96	if (reg == NULL)
51d3082f	97	goto bail;
7f853352	98	addr = reg[0];
51d3082f	99
7f853352	100	/* Get address of mac-io PCI itself */
e2eb6392	101	reg = of_get_property(macio, "assigned-addresses", NULL);
7f853352	102	if (reg == NULL)
51d3082f	103	goto bail;
7f853352	104	addr += reg[2];
51d3082f BH	105
	106	/* Lock the serial port */
	107	pmac_call_feature(PMAC_FTR_SCC_ENABLE, ch,
	108	PMAC_SCC_ASYNC \| PMAC_SCC_FLAG_XMON, 1);
	109
51d3082f BH	110	if (ch == ch_a)
51d3082f BH	111	addr += 0x20;
af308377	112	sccc = ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
7f853352 MM	113	sccc += addr & ~PAGE_MASK;
	114	sccd = sccc + 0x10;
	115
7f853352 MM	116	mb();
	117
	118	for (i = 20000; i != 0; --i)
8921305c	119	in_8(sccc);
7f853352 MM	120	out_8(sccc, 0x09); /* reset A or B side */
7f853352 MM	121	out_8(sccc, 0xc0);
2ec6ef10 BH	122
2ec6ef10 BH	123	/* If SCC was the OF output port, read the BRG value, else
f023bf0f	124	* Setup for 38400 or 57600 8N1 depending on the machine
2ec6ef10 BH	125	*/
	126	if (ch_def != NULL) {
	127	out_8(sccc, 13);
	128	scc_inittab[1] = in_8(sccc);
	129	out_8(sccc, 12);
	130	scc_inittab[3] = in_8(sccc);
71a157e8 GL	131	} else if (of_machine_is_compatible("RackMac1,1")
	132	\|\| of_machine_is_compatible("RackMac1,2")
	133	\|\| of_machine_is_compatible("MacRISC4")) {
f023bf0f BH	134	/* Xserves and G5s default to 57600 */
	135	scc_inittab[1] = 0;
	136	scc_inittab[3] = 0;
	137	} else {
	138	/* Others default to 38400 */
	139	scc_inittab[1] = 0;
	140	scc_inittab[3] = 1;
2ec6ef10 BH	141	}
2ec6ef10 BH	142
7f853352 MM	143	for (i = 0; i < sizeof(scc_inittab); ++i)
	144	out_8(sccc, scc_inittab[i]);
	145
2ec6ef10	146
c8f1c8be MM	147	udbg_putc = udbg_scc_putc;
	148	udbg_getc = udbg_scc_getc;
	149	udbg_getc_poll = udbg_scc_getc_poll;
7f853352 MM	150
7f853352 MM	151	udbg_puts("Hello World !\n");
51d3082f BH	152
	153	bail:
	154	of_node_put(macio);
	155	of_node_put(escc);
	156	of_node_put(stdout);
	157	of_node_put(ch_def);
	158	of_node_put(ch_a);
7f853352 MM	159	}
7f853352 MM	160
51d3082f BH	161	#ifdef CONFIG_PPC64
51d3082f BH	162	static void udbg_real_scc_putc(char c)
7f853352 MM	163	{
	164	while ((real_readb(sccc) & SCC_TXRDY) == 0)
	165	;
	166	real_writeb(c, sccd);
	167	if (c == '\n')
	168	udbg_real_scc_putc('\r');
	169	}
	170
296167ae	171	void __init udbg_init_pmac_realmode(void)
7f853352 MM	172	{
	173	sccc = (volatile u8 __iomem *)0x80013020ul;
	174	sccd = (volatile u8 __iomem *)0x80013030ul;
	175
c8f1c8be MM	176	udbg_putc = udbg_real_scc_putc;
	177	udbg_getc = NULL;
	178	udbg_getc_poll = NULL;
7f853352	179	}
51d3082f	180	#endif /* CONFIG_PPC64 */