Commit | Line | Data |
---|---|---|
14cf11af | 1 | /* |
35499c01 | 2 | * Powermac setup and early boot code plus other random bits. |
14cf11af PM |
3 | * |
4 | * PowerPC version | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
6 | * | |
7 | * Adapted for Power Macintosh by Paul Mackerras | |
35499c01 | 8 | * Copyright (C) 1996 Paul Mackerras (paulus@samba.org) |
14cf11af PM |
9 | * |
10 | * Derived from "arch/alpha/kernel/setup.c" | |
11 | * Copyright (C) 1995 Linus Torvalds | |
12 | * | |
13 | * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org) | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License | |
17 | * as published by the Free Software Foundation; either version | |
18 | * 2 of the License, or (at your option) any later version. | |
19 | * | |
20 | */ | |
21 | ||
22 | /* | |
23 | * bootup setup stuff.. | |
24 | */ | |
25 | ||
14cf11af PM |
26 | #include <linux/init.h> |
27 | #include <linux/errno.h> | |
28 | #include <linux/sched.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/mm.h> | |
31 | #include <linux/stddef.h> | |
32 | #include <linux/unistd.h> | |
33 | #include <linux/ptrace.h> | |
34 | #include <linux/slab.h> | |
35 | #include <linux/user.h> | |
36 | #include <linux/a.out.h> | |
37 | #include <linux/tty.h> | |
38 | #include <linux/string.h> | |
39 | #include <linux/delay.h> | |
40 | #include <linux/ioport.h> | |
41 | #include <linux/major.h> | |
42 | #include <linux/initrd.h> | |
43 | #include <linux/vt_kern.h> | |
44 | #include <linux/console.h> | |
14cf11af PM |
45 | #include <linux/pci.h> |
46 | #include <linux/adb.h> | |
47 | #include <linux/cuda.h> | |
48 | #include <linux/pmu.h> | |
49 | #include <linux/irq.h> | |
50 | #include <linux/seq_file.h> | |
51 | #include <linux/root_dev.h> | |
52 | #include <linux/bitops.h> | |
53 | #include <linux/suspend.h> | |
54 | ||
55 | #include <asm/reg.h> | |
56 | #include <asm/sections.h> | |
57 | #include <asm/prom.h> | |
58 | #include <asm/system.h> | |
59 | #include <asm/pgtable.h> | |
60 | #include <asm/io.h> | |
3d1229d6 | 61 | #include <asm/kexec.h> |
14cf11af PM |
62 | #include <asm/pci-bridge.h> |
63 | #include <asm/ohare.h> | |
64 | #include <asm/mediabay.h> | |
65 | #include <asm/machdep.h> | |
66 | #include <asm/dma.h> | |
14cf11af PM |
67 | #include <asm/cputable.h> |
68 | #include <asm/btext.h> | |
69 | #include <asm/pmac_feature.h> | |
70 | #include <asm/time.h> | |
71 | #include <asm/of_device.h> | |
7eebde70 | 72 | #include <asm/of_platform.h> |
14cf11af | 73 | #include <asm/mmu_context.h> |
35499c01 PM |
74 | #include <asm/iommu.h> |
75 | #include <asm/smu.h> | |
76 | #include <asm/pmc.h> | |
fbf1769d | 77 | #include <asm/lmb.h> |
51d3082f | 78 | #include <asm/udbg.h> |
14cf11af | 79 | |
3c3f42d6 | 80 | #include "pmac.h" |
14cf11af PM |
81 | |
82 | #undef SHOW_GATWICK_IRQS | |
83 | ||
14cf11af PM |
84 | int ppc_override_l2cr = 0; |
85 | int ppc_override_l2cr_value; | |
86 | int has_l2cache = 0; | |
87 | ||
d2515c80 | 88 | int pmac_newworld; |
9b6b563c | 89 | |
14cf11af PM |
90 | static int current_root_goodness = -1; |
91 | ||
35499c01 | 92 | extern struct machdep_calls pmac_md; |
14cf11af PM |
93 | |
94 | #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */ | |
95 | ||
35499c01 PM |
96 | #ifdef CONFIG_PPC64 |
97 | #include <asm/udbg.h> | |
98 | int sccdbg; | |
14cf11af PM |
99 | #endif |
100 | ||
35499c01 PM |
101 | extern void zs_kgdb_hook(int tty_num); |
102 | ||
14cf11af | 103 | sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; |
35499c01 PM |
104 | EXPORT_SYMBOL(sys_ctrler); |
105 | ||
106 | #ifdef CONFIG_PMAC_SMU | |
107 | unsigned long smu_cmdbuf_abs; | |
108 | EXPORT_SYMBOL(smu_cmdbuf_abs); | |
109 | #endif | |
14cf11af PM |
110 | |
111 | #ifdef CONFIG_SMP | |
112 | extern struct smp_ops_t psurge_smp_ops; | |
113 | extern struct smp_ops_t core99_smp_ops; | |
114 | #endif /* CONFIG_SMP */ | |
115 | ||
0dd194d0 | 116 | static void pmac_show_cpuinfo(struct seq_file *m) |
14cf11af PM |
117 | { |
118 | struct device_node *np; | |
018a3d1d | 119 | const char *pp; |
14cf11af | 120 | int plen; |
0dd194d0 PM |
121 | int mbmodel; |
122 | unsigned int mbflags; | |
14cf11af PM |
123 | char* mbname; |
124 | ||
0dd194d0 PM |
125 | mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, |
126 | PMAC_MB_INFO_MODEL, 0); | |
127 | mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, | |
128 | PMAC_MB_INFO_FLAGS, 0); | |
129 | if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME, | |
130 | (long) &mbname) != 0) | |
14cf11af PM |
131 | mbname = "Unknown"; |
132 | ||
133 | /* find motherboard type */ | |
134 | seq_printf(m, "machine\t\t: "); | |
0dd194d0 | 135 | np = of_find_node_by_path("/"); |
14cf11af | 136 | if (np != NULL) { |
e2eb6392 | 137 | pp = of_get_property(np, "model", NULL); |
14cf11af PM |
138 | if (pp != NULL) |
139 | seq_printf(m, "%s\n", pp); | |
140 | else | |
141 | seq_printf(m, "PowerMac\n"); | |
e2eb6392 | 142 | pp = of_get_property(np, "compatible", &plen); |
14cf11af PM |
143 | if (pp != NULL) { |
144 | seq_printf(m, "motherboard\t:"); | |
145 | while (plen > 0) { | |
146 | int l = strlen(pp) + 1; | |
147 | seq_printf(m, " %s", pp); | |
148 | plen -= l; | |
149 | pp += l; | |
150 | } | |
151 | seq_printf(m, "\n"); | |
152 | } | |
0dd194d0 | 153 | of_node_put(np); |
14cf11af PM |
154 | } else |
155 | seq_printf(m, "PowerMac\n"); | |
156 | ||
157 | /* print parsed model */ | |
158 | seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname); | |
159 | seq_printf(m, "pmac flags\t: %08x\n", mbflags); | |
160 | ||
161 | /* find l2 cache info */ | |
0dd194d0 PM |
162 | np = of_find_node_by_name(NULL, "l2-cache"); |
163 | if (np == NULL) | |
164 | np = of_find_node_by_type(NULL, "cache"); | |
165 | if (np != NULL) { | |
e2eb6392 SR |
166 | const unsigned int *ic = |
167 | of_get_property(np, "i-cache-size", NULL); | |
168 | const unsigned int *dc = | |
169 | of_get_property(np, "d-cache-size", NULL); | |
14cf11af PM |
170 | seq_printf(m, "L2 cache\t:"); |
171 | has_l2cache = 1; | |
e2eb6392 | 172 | if (of_get_property(np, "cache-unified", NULL) != 0 && dc) { |
14cf11af PM |
173 | seq_printf(m, " %dK unified", *dc / 1024); |
174 | } else { | |
175 | if (ic) | |
176 | seq_printf(m, " %dK instruction", *ic / 1024); | |
177 | if (dc) | |
178 | seq_printf(m, "%s %dK data", | |
179 | (ic? " +": ""), *dc / 1024); | |
180 | } | |
e2eb6392 | 181 | pp = of_get_property(np, "ram-type", NULL); |
14cf11af PM |
182 | if (pp) |
183 | seq_printf(m, " %s", pp); | |
184 | seq_printf(m, "\n"); | |
0dd194d0 | 185 | of_node_put(np); |
14cf11af PM |
186 | } |
187 | ||
188 | /* Indicate newworld/oldworld */ | |
189 | seq_printf(m, "pmac-generation\t: %s\n", | |
190 | pmac_newworld ? "NewWorld" : "OldWorld"); | |
14cf11af PM |
191 | } |
192 | ||
35499c01 PM |
193 | #ifndef CONFIG_ADB_CUDA |
194 | int find_via_cuda(void) | |
195 | { | |
30686ba6 SR |
196 | struct device_node *dn = of_find_node_by_name(NULL, "via-cuda"); |
197 | ||
198 | if (!dn) | |
35499c01 | 199 | return 0; |
30686ba6 | 200 | of_node_put(dn); |
35499c01 PM |
201 | printk("WARNING ! Your machine is CUDA-based but your kernel\n"); |
202 | printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n"); | |
203 | return 0; | |
204 | } | |
205 | #endif | |
14cf11af | 206 | |
35499c01 PM |
207 | #ifndef CONFIG_ADB_PMU |
208 | int find_via_pmu(void) | |
14cf11af | 209 | { |
30686ba6 SR |
210 | struct device_node *dn = of_find_node_by_name(NULL, "via-pmu"); |
211 | ||
212 | if (!dn) | |
35499c01 | 213 | return 0; |
30686ba6 | 214 | of_node_put(dn); |
35499c01 PM |
215 | printk("WARNING ! Your machine is PMU-based but your kernel\n"); |
216 | printk(" wasn't compiled with CONFIG_ADB_PMU option !\n"); | |
a575b807 | 217 | return 0; |
35499c01 PM |
218 | } |
219 | #endif | |
14cf11af | 220 | |
35499c01 PM |
221 | #ifndef CONFIG_PMAC_SMU |
222 | int smu_init(void) | |
223 | { | |
224 | /* should check and warn if SMU is present */ | |
225 | return 0; | |
226 | } | |
227 | #endif | |
14cf11af | 228 | |
35499c01 PM |
229 | #ifdef CONFIG_PPC32 |
230 | static volatile u32 *sysctrl_regs; | |
14cf11af | 231 | |
35499c01 PM |
232 | static void __init ohare_init(void) |
233 | { | |
30686ba6 SR |
234 | struct device_node *dn; |
235 | ||
14cf11af PM |
236 | /* this area has the CPU identification register |
237 | and some registers used by smp boards */ | |
238 | sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000); | |
14cf11af | 239 | |
35499c01 PM |
240 | /* |
241 | * Turn on the L2 cache. | |
242 | * We assume that we have a PSX memory controller iff | |
243 | * we have an ohare I/O controller. | |
244 | */ | |
30686ba6 SR |
245 | dn = of_find_node_by_name(NULL, "ohare"); |
246 | if (dn) { | |
247 | of_node_put(dn); | |
35499c01 PM |
248 | if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) { |
249 | if (sysctrl_regs[4] & 0x10) | |
250 | sysctrl_regs[4] |= 0x04000020; | |
251 | else | |
252 | sysctrl_regs[4] |= 0x04000000; | |
253 | if(has_l2cache) | |
254 | printk(KERN_INFO "Level 2 cache enabled\n"); | |
255 | } | |
256 | } | |
257 | } | |
14cf11af | 258 | |
35499c01 PM |
259 | static void __init l2cr_init(void) |
260 | { | |
14cf11af PM |
261 | /* Checks "l2cr-value" property in the registry */ |
262 | if (cpu_has_feature(CPU_FTR_L2CR)) { | |
1658ab66 | 263 | struct device_node *np = of_find_node_by_name(NULL, "cpus"); |
14cf11af | 264 | if (np == 0) |
1658ab66 | 265 | np = of_find_node_by_type(NULL, "cpu"); |
14cf11af | 266 | if (np != 0) { |
018a3d1d | 267 | const unsigned int *l2cr = |
e2eb6392 | 268 | of_get_property(np, "l2cr-value", NULL); |
14cf11af PM |
269 | if (l2cr != 0) { |
270 | ppc_override_l2cr = 1; | |
271 | ppc_override_l2cr_value = *l2cr; | |
272 | _set_L2CR(0); | |
273 | _set_L2CR(ppc_override_l2cr_value); | |
274 | } | |
1658ab66 | 275 | of_node_put(np); |
14cf11af PM |
276 | } |
277 | } | |
278 | ||
279 | if (ppc_override_l2cr) | |
35499c01 PM |
280 | printk(KERN_INFO "L2CR overridden (0x%x), " |
281 | "backside cache is %s\n", | |
282 | ppc_override_l2cr_value, | |
283 | (ppc_override_l2cr_value & 0x80000000) | |
14cf11af | 284 | ? "enabled" : "disabled"); |
35499c01 PM |
285 | } |
286 | #endif | |
287 | ||
ff38e7c8 | 288 | static void __init pmac_setup_arch(void) |
35499c01 | 289 | { |
a575b807 | 290 | struct device_node *cpu, *ic; |
018a3d1d | 291 | const int *fp; |
35499c01 PM |
292 | unsigned long pvr; |
293 | ||
294 | pvr = PVR_VER(mfspr(SPRN_PVR)); | |
295 | ||
296 | /* Set loops_per_jiffy to a half-way reasonable value, | |
297 | for use until calibrate_delay gets called. */ | |
298 | loops_per_jiffy = 50000000 / HZ; | |
299 | cpu = of_find_node_by_type(NULL, "cpu"); | |
300 | if (cpu != NULL) { | |
e2eb6392 | 301 | fp = of_get_property(cpu, "clock-frequency", NULL); |
35499c01 PM |
302 | if (fp != NULL) { |
303 | if (pvr >= 0x30 && pvr < 0x80) | |
304 | /* PPC970 etc. */ | |
305 | loops_per_jiffy = *fp / (3 * HZ); | |
306 | else if (pvr == 4 || pvr >= 8) | |
307 | /* 604, G3, G4 etc. */ | |
308 | loops_per_jiffy = *fp / HZ; | |
309 | else | |
310 | /* 601, 603, etc. */ | |
311 | loops_per_jiffy = *fp / (2 * HZ); | |
312 | } | |
313 | of_node_put(cpu); | |
314 | } | |
315 | ||
a575b807 | 316 | /* See if newworld or oldworld */ |
bfab1019 | 317 | for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; ) |
e2eb6392 | 318 | if (of_get_property(ic, "interrupt-controller", NULL)) |
bfab1019 | 319 | break; |
d2515c80 OH |
320 | if (ic) { |
321 | pmac_newworld = 1; | |
a575b807 | 322 | of_node_put(ic); |
d2515c80 | 323 | } |
a575b807 | 324 | |
35499c01 PM |
325 | /* Lookup PCI hosts */ |
326 | pmac_pci_init(); | |
327 | ||
328 | #ifdef CONFIG_PPC32 | |
329 | ohare_init(); | |
330 | l2cr_init(); | |
331 | #endif /* CONFIG_PPC32 */ | |
332 | ||
14cf11af PM |
333 | #ifdef CONFIG_KGDB |
334 | zs_kgdb_hook(0); | |
335 | #endif | |
336 | ||
14cf11af | 337 | find_via_cuda(); |
14cf11af | 338 | find_via_pmu(); |
35499c01 PM |
339 | smu_init(); |
340 | ||
91c33d28 | 341 | #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64) |
14cf11af PM |
342 | pmac_nvram_init(); |
343 | #endif | |
35499c01 PM |
344 | |
345 | #ifdef CONFIG_PPC32 | |
14cf11af PM |
346 | #ifdef CONFIG_BLK_DEV_INITRD |
347 | if (initrd_start) | |
348 | ROOT_DEV = Root_RAM0; | |
349 | else | |
350 | #endif | |
351 | ROOT_DEV = DEFAULT_ROOT_DEVICE; | |
35499c01 | 352 | #endif |
14cf11af PM |
353 | |
354 | #ifdef CONFIG_SMP | |
355 | /* Check for Core99 */ | |
30686ba6 SR |
356 | ic = of_find_node_by_name(NULL, "uni-n"); |
357 | if (!ic) | |
358 | ic = of_find_node_by_name(NULL, "u3"); | |
359 | if (!ic) | |
360 | ic = of_find_node_by_name(NULL, "u4"); | |
361 | if (ic) { | |
362 | of_node_put(ic); | |
7ed476d1 | 363 | smp_ops = &core99_smp_ops; |
30686ba6 | 364 | } |
35499c01 | 365 | #ifdef CONFIG_PPC32 |
c63c4faa PM |
366 | else { |
367 | /* | |
368 | * We have to set bits in cpu_possible_map here since the | |
369 | * secondary CPU(s) aren't in the device tree, and | |
370 | * setup_per_cpu_areas only allocates per-cpu data for | |
371 | * CPUs in the cpu_possible_map. | |
372 | */ | |
373 | int cpu; | |
374 | ||
375 | for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu) | |
376 | cpu_set(cpu, cpu_possible_map); | |
7ed476d1 | 377 | smp_ops = &psurge_smp_ops; |
c63c4faa | 378 | } |
35499c01 | 379 | #endif |
14cf11af | 380 | #endif /* CONFIG_SMP */ |
e8222502 BH |
381 | |
382 | #ifdef CONFIG_ADB | |
383 | if (strstr(cmd_line, "adb_sync")) { | |
384 | extern int __adb_probe_sync; | |
385 | __adb_probe_sync = 1; | |
386 | } | |
387 | #endif /* CONFIG_ADB */ | |
14cf11af PM |
388 | } |
389 | ||
9b6b563c PM |
390 | char *bootpath; |
391 | char *bootdevice; | |
14cf11af PM |
392 | void *boot_host; |
393 | int boot_target; | |
394 | int boot_part; | |
fd6e7d2d | 395 | static dev_t boot_dev; |
14cf11af PM |
396 | |
397 | #ifdef CONFIG_SCSI | |
405861a0 | 398 | void note_scsi_host(struct device_node *node, void *host) |
14cf11af PM |
399 | { |
400 | int l; | |
401 | char *p; | |
402 | ||
403 | l = strlen(node->full_name); | |
404 | if (bootpath != NULL && bootdevice != NULL | |
405 | && strncmp(node->full_name, bootdevice, l) == 0 | |
406 | && (bootdevice[l] == '/' || bootdevice[l] == 0)) { | |
407 | boot_host = host; | |
408 | /* | |
409 | * There's a bug in OF 1.0.5. (Why am I not surprised.) | |
410 | * If you pass a path like scsi/sd@1:0 to canon, it returns | |
411 | * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0 | |
412 | * That is, the scsi target number doesn't get preserved. | |
413 | * So we pick the target number out of bootpath and use that. | |
414 | */ | |
415 | p = strstr(bootpath, "/sd@"); | |
416 | if (p != NULL) { | |
417 | p += 4; | |
418 | boot_target = simple_strtoul(p, NULL, 10); | |
419 | p = strchr(p, ':'); | |
420 | if (p != NULL) | |
421 | boot_part = simple_strtoul(p + 1, NULL, 10); | |
422 | } | |
423 | } | |
424 | } | |
9b6b563c | 425 | EXPORT_SYMBOL(note_scsi_host); |
14cf11af PM |
426 | #endif |
427 | ||
428 | #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) | |
35499c01 | 429 | static dev_t __init find_ide_boot(void) |
14cf11af PM |
430 | { |
431 | char *p; | |
432 | int n; | |
433 | dev_t __init pmac_find_ide_boot(char *bootdevice, int n); | |
434 | ||
435 | if (bootdevice == NULL) | |
436 | return 0; | |
437 | p = strrchr(bootdevice, '/'); | |
438 | if (p == NULL) | |
439 | return 0; | |
440 | n = p - bootdevice; | |
441 | ||
442 | return pmac_find_ide_boot(bootdevice, n); | |
443 | } | |
444 | #endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */ | |
445 | ||
35499c01 | 446 | static void __init find_boot_device(void) |
14cf11af PM |
447 | { |
448 | #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) | |
449 | boot_dev = find_ide_boot(); | |
450 | #endif | |
451 | } | |
452 | ||
35499c01 PM |
453 | static int initializing = 1; |
454 | ||
14cf11af PM |
455 | static int pmac_late_init(void) |
456 | { | |
c5f226c7 TB |
457 | if (!machine_is(powermac)) |
458 | return -ENODEV; | |
459 | ||
14cf11af | 460 | initializing = 0; |
d9333afd JB |
461 | /* this is udbg (which is __init) and we can later use it during |
462 | * cpu hotplug (in smp_core99_kick_cpu) */ | |
463 | ppc_md.progress = NULL; | |
14cf11af PM |
464 | return 0; |
465 | } | |
466 | ||
467 | late_initcall(pmac_late_init); | |
468 | ||
d7418031 SR |
469 | /* |
470 | * This is __init_refok because we check for "initializing" before | |
471 | * touching any of the __init sensitive things and "initializing" | |
472 | * will be false after __init time. This can't be __init because it | |
473 | * can be called whenever a disk is first accessed. | |
474 | */ | |
475 | void __init_refok note_bootable_part(dev_t dev, int part, int goodness) | |
14cf11af PM |
476 | { |
477 | static int found_boot = 0; | |
478 | char *p; | |
479 | ||
480 | if (!initializing) | |
481 | return; | |
482 | if ((goodness <= current_root_goodness) && | |
483 | ROOT_DEV != DEFAULT_ROOT_DEVICE) | |
484 | return; | |
b8757b21 ABL |
485 | p = strstr(boot_command_line, "root="); |
486 | if (p != NULL && (p == boot_command_line || p[-1] == ' ')) | |
14cf11af PM |
487 | return; |
488 | ||
489 | if (!found_boot) { | |
490 | find_boot_device(); | |
491 | found_boot = 1; | |
492 | } | |
493 | if (!boot_dev || dev == boot_dev) { | |
494 | ROOT_DEV = dev + part; | |
495 | boot_dev = 0; | |
496 | current_root_goodness = goodness; | |
497 | } | |
498 | } | |
499 | ||
14cf11af | 500 | #ifdef CONFIG_ADB_CUDA |
35499c01 PM |
501 | static void cuda_restart(void) |
502 | { | |
14cf11af | 503 | struct adb_request req; |
14cf11af | 504 | |
35499c01 PM |
505 | cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM); |
506 | for (;;) | |
507 | cuda_poll(); | |
508 | } | |
509 | ||
510 | static void cuda_shutdown(void) | |
511 | { | |
512 | struct adb_request req; | |
513 | ||
514 | cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN); | |
515 | for (;;) | |
516 | cuda_poll(); | |
517 | } | |
518 | ||
519 | #else | |
520 | #define cuda_restart() | |
521 | #define cuda_shutdown() | |
522 | #endif | |
523 | ||
524 | #ifndef CONFIG_ADB_PMU | |
525 | #define pmu_restart() | |
526 | #define pmu_shutdown() | |
527 | #endif | |
528 | ||
529 | #ifndef CONFIG_PMAC_SMU | |
530 | #define smu_restart() | |
531 | #define smu_shutdown() | |
532 | #endif | |
533 | ||
534 | static void pmac_restart(char *cmd) | |
535 | { | |
14cf11af | 536 | switch (sys_ctrler) { |
14cf11af | 537 | case SYS_CTRLER_CUDA: |
35499c01 | 538 | cuda_restart(); |
14cf11af | 539 | break; |
14cf11af PM |
540 | case SYS_CTRLER_PMU: |
541 | pmu_restart(); | |
542 | break; | |
35499c01 PM |
543 | case SYS_CTRLER_SMU: |
544 | smu_restart(); | |
545 | break; | |
14cf11af PM |
546 | default: ; |
547 | } | |
548 | } | |
549 | ||
35499c01 | 550 | static void pmac_power_off(void) |
14cf11af | 551 | { |
14cf11af | 552 | switch (sys_ctrler) { |
14cf11af | 553 | case SYS_CTRLER_CUDA: |
35499c01 | 554 | cuda_shutdown(); |
14cf11af | 555 | break; |
14cf11af PM |
556 | case SYS_CTRLER_PMU: |
557 | pmu_shutdown(); | |
558 | break; | |
35499c01 PM |
559 | case SYS_CTRLER_SMU: |
560 | smu_shutdown(); | |
561 | break; | |
14cf11af PM |
562 | default: ; |
563 | } | |
564 | } | |
565 | ||
566 | static void | |
567 | pmac_halt(void) | |
568 | { | |
569 | pmac_power_off(); | |
570 | } | |
571 | ||
35499c01 PM |
572 | /* |
573 | * Early initialization. | |
574 | */ | |
575 | static void __init pmac_init_early(void) | |
576 | { | |
51d3082f BH |
577 | /* Enable early btext debug if requested */ |
578 | if (strstr(cmd_line, "btextdbg")) { | |
579 | udbg_adb_init_early(); | |
580 | register_early_udbg_console(); | |
35499c01 PM |
581 | } |
582 | ||
51d3082f BH |
583 | /* Probe motherboard chipset */ |
584 | pmac_feature_init(); | |
585 | ||
51d3082f BH |
586 | /* Initialize debug stuff */ |
587 | udbg_scc_init(!!strstr(cmd_line, "sccdbg")); | |
588 | udbg_adb_init(!!strstr(cmd_line, "btextdbg")); | |
589 | ||
590 | #ifdef CONFIG_PPC64 | |
1beb6a7d | 591 | iommu_init_early_dart(); |
35499c01 PM |
592 | #endif |
593 | } | |
594 | ||
35499c01 | 595 | static int __init pmac_declare_of_platform_devices(void) |
14cf11af | 596 | { |
a28d3af2 | 597 | struct device_node *np; |
14cf11af | 598 | |
e8222502 BH |
599 | if (machine_is(chrp)) |
600 | return -1; | |
601 | ||
602 | if (!machine_is(powermac)) | |
603 | return 0; | |
604 | ||
730745a5 | 605 | np = of_find_node_by_name(NULL, "valkyrie"); |
35499c01 PM |
606 | if (np) |
607 | of_platform_device_create(np, "valkyrie", NULL); | |
730745a5 | 608 | np = of_find_node_by_name(NULL, "platinum"); |
35499c01 PM |
609 | if (np) |
610 | of_platform_device_create(np, "platinum", NULL); | |
35499c01 PM |
611 | np = of_find_node_by_type(NULL, "smu"); |
612 | if (np) { | |
613 | of_platform_device_create(np, "smu", NULL); | |
614 | of_node_put(np); | |
615 | } | |
14cf11af PM |
616 | |
617 | return 0; | |
618 | } | |
619 | ||
620 | device_initcall(pmac_declare_of_platform_devices); | |
35499c01 PM |
621 | |
622 | /* | |
623 | * Called very early, MMU is off, device-tree isn't unflattened | |
624 | */ | |
e8222502 | 625 | static int __init pmac_probe(void) |
35499c01 | 626 | { |
e8222502 BH |
627 | unsigned long root = of_get_flat_dt_root(); |
628 | ||
629 | if (!of_flat_dt_is_compatible(root, "Power Macintosh") && | |
630 | !of_flat_dt_is_compatible(root, "MacRISC")) | |
35499c01 PM |
631 | return 0; |
632 | ||
e8222502 | 633 | #ifdef CONFIG_PPC64 |
35499c01 PM |
634 | /* |
635 | * On U3, the DART (iommu) must be allocated now since it | |
636 | * has an impact on htab_initialize (due to the large page it | |
637 | * occupies having to be broken up so the DART itself is not | |
638 | * part of the cacheable linar mapping | |
639 | */ | |
1beb6a7d | 640 | alloc_dart_table(); |
7d0daae4 ME |
641 | |
642 | hpte_init_native(); | |
35499c01 PM |
643 | #endif |
644 | ||
e8222502 BH |
645 | #ifdef CONFIG_PPC32 |
646 | /* isa_io_base gets set in pmac_pci_init */ | |
e8222502 BH |
647 | ISA_DMA_THRESHOLD = ~0L; |
648 | DMA_MODE_READ = 1; | |
649 | DMA_MODE_WRITE = 2; | |
650 | ||
651 | #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) | |
652 | #ifdef CONFIG_BLK_DEV_IDE_PMAC | |
653 | ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports; | |
654 | ppc_ide_md.default_io_base = pmac_ide_get_base; | |
655 | #endif /* CONFIG_BLK_DEV_IDE_PMAC */ | |
656 | #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */ | |
657 | ||
658 | #endif /* CONFIG_PPC32 */ | |
659 | ||
35499c01 PM |
660 | #ifdef CONFIG_PMAC_SMU |
661 | /* | |
662 | * SMU based G5s need some memory below 2Gb, at least the current | |
663 | * driver needs that. We have to allocate it now. We allocate 4k | |
664 | * (1 small page) for now. | |
665 | */ | |
666 | smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL); | |
667 | #endif /* CONFIG_PMAC_SMU */ | |
668 | ||
669 | return 1; | |
670 | } | |
671 | ||
672 | #ifdef CONFIG_PPC64 | |
51d3082f BH |
673 | /* Move that to pci.c */ |
674 | static int pmac_pci_probe_mode(struct pci_bus *bus) | |
35499c01 PM |
675 | { |
676 | struct device_node *node = bus->sysdata; | |
677 | ||
678 | /* We need to use normal PCI probing for the AGP bus, | |
1beb6a7d BH |
679 | * since the device for the AGP bridge isn't in the tree. |
680 | */ | |
55b61fec SR |
681 | if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") || |
682 | of_device_is_compatible(node, "u4-pcie"))) | |
35499c01 | 683 | return PCI_PROBE_NORMAL; |
35499c01 PM |
684 | return PCI_PROBE_DEVTREE; |
685 | } | |
d9333afd JB |
686 | |
687 | #ifdef CONFIG_HOTPLUG_CPU | |
688 | /* access per cpu vars from generic smp.c */ | |
689 | DECLARE_PER_CPU(int, cpu_state); | |
690 | ||
691 | static void pmac_cpu_die(void) | |
692 | { | |
693 | /* | |
694 | * turn off as much as possible, we'll be | |
695 | * kicked out as this will only be invoked | |
696 | * on core99 platforms for now ... | |
697 | */ | |
698 | ||
699 | printk(KERN_INFO "CPU#%d offline\n", smp_processor_id()); | |
700 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
701 | smp_wmb(); | |
702 | ||
703 | /* | |
704 | * during the path that leads here preemption is disabled, | |
705 | * reenable it now so that when coming up preempt count is | |
706 | * zero correctly | |
707 | */ | |
708 | preempt_enable(); | |
709 | ||
710 | /* | |
711 | * hard-disable interrupts for the non-NAP case, the NAP code | |
712 | * needs to re-enable interrupts (but soft-disables them) | |
713 | */ | |
714 | hard_irq_disable(); | |
715 | ||
716 | while (1) { | |
717 | /* let's not take timer interrupts too often ... */ | |
718 | set_dec(0x7fffffff); | |
719 | ||
720 | /* should always be true at this point */ | |
721 | if (cpu_has_feature(CPU_FTR_CAN_NAP)) | |
722 | power4_cpu_offline_powersave(); | |
723 | else { | |
724 | HMT_low(); | |
725 | HMT_very_low(); | |
726 | } | |
727 | } | |
728 | } | |
729 | #endif /* CONFIG_HOTPLUG_CPU */ | |
730 | ||
731 | #endif /* CONFIG_PPC64 */ | |
35499c01 | 732 | |
e8222502 BH |
733 | define_machine(powermac) { |
734 | .name = "PowerMac", | |
35499c01 PM |
735 | .probe = pmac_probe, |
736 | .setup_arch = pmac_setup_arch, | |
737 | .init_early = pmac_init_early, | |
738 | .show_cpuinfo = pmac_show_cpuinfo, | |
35499c01 | 739 | .init_IRQ = pmac_pic_init, |
cc5d0189 | 740 | .get_irq = NULL, /* changed later */ |
f90bb153 | 741 | .pci_irq_fixup = pmac_pci_irq_fixup, |
35499c01 PM |
742 | .restart = pmac_restart, |
743 | .power_off = pmac_power_off, | |
744 | .halt = pmac_halt, | |
745 | .time_init = pmac_time_init, | |
746 | .get_boot_time = pmac_get_boot_time, | |
747 | .set_rtc_time = pmac_set_rtc_time, | |
748 | .get_rtc_time = pmac_get_rtc_time, | |
749 | .calibrate_decr = pmac_calibrate_decr, | |
750 | .feature_call = pmac_do_feature_call, | |
be6b8439 | 751 | .progress = udbg_progress, |
35499c01 | 752 | #ifdef CONFIG_PPC64 |
51d3082f | 753 | .pci_probe_mode = pmac_pci_probe_mode, |
a0652fc9 | 754 | .power_save = power4_idle, |
35499c01 | 755 | .enable_pmcs = power4_enable_pmcs, |
3d1229d6 ME |
756 | #ifdef CONFIG_KEXEC |
757 | .machine_kexec = default_machine_kexec, | |
758 | .machine_kexec_prepare = default_machine_kexec_prepare, | |
cc532915 | 759 | .machine_crash_shutdown = default_machine_crash_shutdown, |
35499c01 | 760 | #endif |
3d1229d6 | 761 | #endif /* CONFIG_PPC64 */ |
35499c01 PM |
762 | #ifdef CONFIG_PPC32 |
763 | .pcibios_enable_device_hook = pmac_pci_enable_device_hook, | |
764 | .pcibios_after_init = pmac_pcibios_after_init, | |
765 | .phys_mem_access_prot = pci_phys_mem_access_prot, | |
766 | #endif | |
e8222502 | 767 | #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) |
d9333afd | 768 | .cpu_die = pmac_cpu_die, |
e8222502 | 769 | #endif |
35499c01 | 770 | }; |