Commit | Line | Data |
---|---|---|
14cf11af | 1 | /* |
35499c01 | 2 | * Powermac setup and early boot code plus other random bits. |
14cf11af PM |
3 | * |
4 | * PowerPC version | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
6 | * | |
7 | * Adapted for Power Macintosh by Paul Mackerras | |
35499c01 | 8 | * Copyright (C) 1996 Paul Mackerras (paulus@samba.org) |
14cf11af PM |
9 | * |
10 | * Derived from "arch/alpha/kernel/setup.c" | |
11 | * Copyright (C) 1995 Linus Torvalds | |
12 | * | |
13 | * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org) | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License | |
17 | * as published by the Free Software Foundation; either version | |
18 | * 2 of the License, or (at your option) any later version. | |
19 | * | |
20 | */ | |
21 | ||
22 | /* | |
23 | * bootup setup stuff.. | |
24 | */ | |
25 | ||
14cf11af PM |
26 | #include <linux/init.h> |
27 | #include <linux/errno.h> | |
28 | #include <linux/sched.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/mm.h> | |
31 | #include <linux/stddef.h> | |
32 | #include <linux/unistd.h> | |
33 | #include <linux/ptrace.h> | |
34 | #include <linux/slab.h> | |
35 | #include <linux/user.h> | |
36 | #include <linux/a.out.h> | |
37 | #include <linux/tty.h> | |
38 | #include <linux/string.h> | |
39 | #include <linux/delay.h> | |
40 | #include <linux/ioport.h> | |
41 | #include <linux/major.h> | |
42 | #include <linux/initrd.h> | |
43 | #include <linux/vt_kern.h> | |
44 | #include <linux/console.h> | |
45 | #include <linux/ide.h> | |
46 | #include <linux/pci.h> | |
47 | #include <linux/adb.h> | |
48 | #include <linux/cuda.h> | |
49 | #include <linux/pmu.h> | |
50 | #include <linux/irq.h> | |
51 | #include <linux/seq_file.h> | |
52 | #include <linux/root_dev.h> | |
53 | #include <linux/bitops.h> | |
54 | #include <linux/suspend.h> | |
55 | ||
56 | #include <asm/reg.h> | |
57 | #include <asm/sections.h> | |
58 | #include <asm/prom.h> | |
59 | #include <asm/system.h> | |
60 | #include <asm/pgtable.h> | |
61 | #include <asm/io.h> | |
3d1229d6 | 62 | #include <asm/kexec.h> |
14cf11af PM |
63 | #include <asm/pci-bridge.h> |
64 | #include <asm/ohare.h> | |
65 | #include <asm/mediabay.h> | |
66 | #include <asm/machdep.h> | |
67 | #include <asm/dma.h> | |
14cf11af PM |
68 | #include <asm/cputable.h> |
69 | #include <asm/btext.h> | |
70 | #include <asm/pmac_feature.h> | |
71 | #include <asm/time.h> | |
72 | #include <asm/of_device.h> | |
73 | #include <asm/mmu_context.h> | |
35499c01 PM |
74 | #include <asm/iommu.h> |
75 | #include <asm/smu.h> | |
76 | #include <asm/pmc.h> | |
fbf1769d | 77 | #include <asm/lmb.h> |
51d3082f | 78 | #include <asm/udbg.h> |
14cf11af | 79 | |
3c3f42d6 | 80 | #include "pmac.h" |
14cf11af PM |
81 | |
82 | #undef SHOW_GATWICK_IRQS | |
83 | ||
14cf11af PM |
84 | int ppc_override_l2cr = 0; |
85 | int ppc_override_l2cr_value; | |
86 | int has_l2cache = 0; | |
87 | ||
d2515c80 | 88 | int pmac_newworld; |
9b6b563c | 89 | |
14cf11af PM |
90 | static int current_root_goodness = -1; |
91 | ||
35499c01 | 92 | extern struct machdep_calls pmac_md; |
14cf11af PM |
93 | |
94 | #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */ | |
95 | ||
35499c01 PM |
96 | #ifdef CONFIG_PPC64 |
97 | #include <asm/udbg.h> | |
98 | int sccdbg; | |
14cf11af PM |
99 | #endif |
100 | ||
35499c01 PM |
101 | extern void zs_kgdb_hook(int tty_num); |
102 | ||
14cf11af | 103 | sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; |
35499c01 PM |
104 | EXPORT_SYMBOL(sys_ctrler); |
105 | ||
106 | #ifdef CONFIG_PMAC_SMU | |
107 | unsigned long smu_cmdbuf_abs; | |
108 | EXPORT_SYMBOL(smu_cmdbuf_abs); | |
109 | #endif | |
14cf11af PM |
110 | |
111 | #ifdef CONFIG_SMP | |
112 | extern struct smp_ops_t psurge_smp_ops; | |
113 | extern struct smp_ops_t core99_smp_ops; | |
114 | #endif /* CONFIG_SMP */ | |
115 | ||
0dd194d0 | 116 | static void pmac_show_cpuinfo(struct seq_file *m) |
14cf11af PM |
117 | { |
118 | struct device_node *np; | |
018a3d1d | 119 | const char *pp; |
14cf11af | 120 | int plen; |
0dd194d0 PM |
121 | int mbmodel; |
122 | unsigned int mbflags; | |
14cf11af PM |
123 | char* mbname; |
124 | ||
0dd194d0 PM |
125 | mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, |
126 | PMAC_MB_INFO_MODEL, 0); | |
127 | mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, | |
128 | PMAC_MB_INFO_FLAGS, 0); | |
129 | if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME, | |
130 | (long) &mbname) != 0) | |
14cf11af PM |
131 | mbname = "Unknown"; |
132 | ||
133 | /* find motherboard type */ | |
134 | seq_printf(m, "machine\t\t: "); | |
0dd194d0 | 135 | np = of_find_node_by_path("/"); |
14cf11af | 136 | if (np != NULL) { |
018a3d1d | 137 | pp = get_property(np, "model", NULL); |
14cf11af PM |
138 | if (pp != NULL) |
139 | seq_printf(m, "%s\n", pp); | |
140 | else | |
141 | seq_printf(m, "PowerMac\n"); | |
018a3d1d | 142 | pp = get_property(np, "compatible", &plen); |
14cf11af PM |
143 | if (pp != NULL) { |
144 | seq_printf(m, "motherboard\t:"); | |
145 | while (plen > 0) { | |
146 | int l = strlen(pp) + 1; | |
147 | seq_printf(m, " %s", pp); | |
148 | plen -= l; | |
149 | pp += l; | |
150 | } | |
151 | seq_printf(m, "\n"); | |
152 | } | |
0dd194d0 | 153 | of_node_put(np); |
14cf11af PM |
154 | } else |
155 | seq_printf(m, "PowerMac\n"); | |
156 | ||
157 | /* print parsed model */ | |
158 | seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname); | |
159 | seq_printf(m, "pmac flags\t: %08x\n", mbflags); | |
160 | ||
161 | /* find l2 cache info */ | |
0dd194d0 PM |
162 | np = of_find_node_by_name(NULL, "l2-cache"); |
163 | if (np == NULL) | |
164 | np = of_find_node_by_type(NULL, "cache"); | |
165 | if (np != NULL) { | |
018a3d1d JK |
166 | const unsigned int *ic = get_property(np, "i-cache-size", NULL); |
167 | const unsigned int *dc = get_property(np, "d-cache-size", NULL); | |
14cf11af PM |
168 | seq_printf(m, "L2 cache\t:"); |
169 | has_l2cache = 1; | |
170 | if (get_property(np, "cache-unified", NULL) != 0 && dc) { | |
171 | seq_printf(m, " %dK unified", *dc / 1024); | |
172 | } else { | |
173 | if (ic) | |
174 | seq_printf(m, " %dK instruction", *ic / 1024); | |
175 | if (dc) | |
176 | seq_printf(m, "%s %dK data", | |
177 | (ic? " +": ""), *dc / 1024); | |
178 | } | |
179 | pp = get_property(np, "ram-type", NULL); | |
180 | if (pp) | |
181 | seq_printf(m, " %s", pp); | |
182 | seq_printf(m, "\n"); | |
0dd194d0 | 183 | of_node_put(np); |
14cf11af PM |
184 | } |
185 | ||
186 | /* Indicate newworld/oldworld */ | |
187 | seq_printf(m, "pmac-generation\t: %s\n", | |
188 | pmac_newworld ? "NewWorld" : "OldWorld"); | |
14cf11af PM |
189 | } |
190 | ||
35499c01 PM |
191 | #ifndef CONFIG_ADB_CUDA |
192 | int find_via_cuda(void) | |
193 | { | |
194 | if (!find_devices("via-cuda")) | |
195 | return 0; | |
196 | printk("WARNING ! Your machine is CUDA-based but your kernel\n"); | |
197 | printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n"); | |
198 | return 0; | |
199 | } | |
200 | #endif | |
14cf11af | 201 | |
35499c01 PM |
202 | #ifndef CONFIG_ADB_PMU |
203 | int find_via_pmu(void) | |
14cf11af | 204 | { |
35499c01 PM |
205 | if (!find_devices("via-pmu")) |
206 | return 0; | |
207 | printk("WARNING ! Your machine is PMU-based but your kernel\n"); | |
208 | printk(" wasn't compiled with CONFIG_ADB_PMU option !\n"); | |
a575b807 | 209 | return 0; |
35499c01 PM |
210 | } |
211 | #endif | |
14cf11af | 212 | |
35499c01 PM |
213 | #ifndef CONFIG_PMAC_SMU |
214 | int smu_init(void) | |
215 | { | |
216 | /* should check and warn if SMU is present */ | |
217 | return 0; | |
218 | } | |
219 | #endif | |
14cf11af | 220 | |
35499c01 PM |
221 | #ifdef CONFIG_PPC32 |
222 | static volatile u32 *sysctrl_regs; | |
14cf11af | 223 | |
35499c01 PM |
224 | static void __init ohare_init(void) |
225 | { | |
14cf11af PM |
226 | /* this area has the CPU identification register |
227 | and some registers used by smp boards */ | |
228 | sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000); | |
14cf11af | 229 | |
35499c01 PM |
230 | /* |
231 | * Turn on the L2 cache. | |
232 | * We assume that we have a PSX memory controller iff | |
233 | * we have an ohare I/O controller. | |
234 | */ | |
235 | if (find_devices("ohare") != NULL) { | |
236 | if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) { | |
237 | if (sysctrl_regs[4] & 0x10) | |
238 | sysctrl_regs[4] |= 0x04000020; | |
239 | else | |
240 | sysctrl_regs[4] |= 0x04000000; | |
241 | if(has_l2cache) | |
242 | printk(KERN_INFO "Level 2 cache enabled\n"); | |
243 | } | |
244 | } | |
245 | } | |
14cf11af | 246 | |
35499c01 PM |
247 | static void __init l2cr_init(void) |
248 | { | |
14cf11af PM |
249 | /* Checks "l2cr-value" property in the registry */ |
250 | if (cpu_has_feature(CPU_FTR_L2CR)) { | |
251 | struct device_node *np = find_devices("cpus"); | |
252 | if (np == 0) | |
253 | np = find_type_devices("cpu"); | |
254 | if (np != 0) { | |
018a3d1d | 255 | const unsigned int *l2cr = |
14cf11af PM |
256 | get_property(np, "l2cr-value", NULL); |
257 | if (l2cr != 0) { | |
258 | ppc_override_l2cr = 1; | |
259 | ppc_override_l2cr_value = *l2cr; | |
260 | _set_L2CR(0); | |
261 | _set_L2CR(ppc_override_l2cr_value); | |
262 | } | |
263 | } | |
264 | } | |
265 | ||
266 | if (ppc_override_l2cr) | |
35499c01 PM |
267 | printk(KERN_INFO "L2CR overridden (0x%x), " |
268 | "backside cache is %s\n", | |
269 | ppc_override_l2cr_value, | |
270 | (ppc_override_l2cr_value & 0x80000000) | |
14cf11af | 271 | ? "enabled" : "disabled"); |
35499c01 PM |
272 | } |
273 | #endif | |
274 | ||
ff38e7c8 | 275 | static void __init pmac_setup_arch(void) |
35499c01 | 276 | { |
a575b807 | 277 | struct device_node *cpu, *ic; |
018a3d1d | 278 | const int *fp; |
35499c01 PM |
279 | unsigned long pvr; |
280 | ||
281 | pvr = PVR_VER(mfspr(SPRN_PVR)); | |
282 | ||
283 | /* Set loops_per_jiffy to a half-way reasonable value, | |
284 | for use until calibrate_delay gets called. */ | |
285 | loops_per_jiffy = 50000000 / HZ; | |
286 | cpu = of_find_node_by_type(NULL, "cpu"); | |
287 | if (cpu != NULL) { | |
018a3d1d | 288 | fp = get_property(cpu, "clock-frequency", NULL); |
35499c01 PM |
289 | if (fp != NULL) { |
290 | if (pvr >= 0x30 && pvr < 0x80) | |
291 | /* PPC970 etc. */ | |
292 | loops_per_jiffy = *fp / (3 * HZ); | |
293 | else if (pvr == 4 || pvr >= 8) | |
294 | /* 604, G3, G4 etc. */ | |
295 | loops_per_jiffy = *fp / HZ; | |
296 | else | |
297 | /* 601, 603, etc. */ | |
298 | loops_per_jiffy = *fp / (2 * HZ); | |
299 | } | |
300 | of_node_put(cpu); | |
301 | } | |
302 | ||
a575b807 | 303 | /* See if newworld or oldworld */ |
bfab1019 PM |
304 | for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; ) |
305 | if (get_property(ic, "interrupt-controller", NULL)) | |
306 | break; | |
d2515c80 OH |
307 | if (ic) { |
308 | pmac_newworld = 1; | |
a575b807 | 309 | of_node_put(ic); |
d2515c80 | 310 | } |
a575b807 | 311 | |
35499c01 PM |
312 | /* Lookup PCI hosts */ |
313 | pmac_pci_init(); | |
314 | ||
315 | #ifdef CONFIG_PPC32 | |
316 | ohare_init(); | |
317 | l2cr_init(); | |
318 | #endif /* CONFIG_PPC32 */ | |
319 | ||
14cf11af PM |
320 | #ifdef CONFIG_KGDB |
321 | zs_kgdb_hook(0); | |
322 | #endif | |
323 | ||
14cf11af | 324 | find_via_cuda(); |
14cf11af | 325 | find_via_pmu(); |
35499c01 PM |
326 | smu_init(); |
327 | ||
91c33d28 | 328 | #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64) |
14cf11af PM |
329 | pmac_nvram_init(); |
330 | #endif | |
35499c01 PM |
331 | |
332 | #ifdef CONFIG_PPC32 | |
14cf11af PM |
333 | #ifdef CONFIG_BLK_DEV_INITRD |
334 | if (initrd_start) | |
335 | ROOT_DEV = Root_RAM0; | |
336 | else | |
337 | #endif | |
338 | ROOT_DEV = DEFAULT_ROOT_DEVICE; | |
35499c01 | 339 | #endif |
14cf11af PM |
340 | |
341 | #ifdef CONFIG_SMP | |
342 | /* Check for Core99 */ | |
1beb6a7d | 343 | if (find_devices("uni-n") || find_devices("u3") || find_devices("u4")) |
7ed476d1 | 344 | smp_ops = &core99_smp_ops; |
35499c01 | 345 | #ifdef CONFIG_PPC32 |
14cf11af | 346 | else |
7ed476d1 | 347 | smp_ops = &psurge_smp_ops; |
35499c01 | 348 | #endif |
14cf11af | 349 | #endif /* CONFIG_SMP */ |
e8222502 BH |
350 | |
351 | #ifdef CONFIG_ADB | |
352 | if (strstr(cmd_line, "adb_sync")) { | |
353 | extern int __adb_probe_sync; | |
354 | __adb_probe_sync = 1; | |
355 | } | |
356 | #endif /* CONFIG_ADB */ | |
14cf11af PM |
357 | } |
358 | ||
9b6b563c PM |
359 | char *bootpath; |
360 | char *bootdevice; | |
14cf11af PM |
361 | void *boot_host; |
362 | int boot_target; | |
363 | int boot_part; | |
fd6e7d2d | 364 | static dev_t boot_dev; |
14cf11af PM |
365 | |
366 | #ifdef CONFIG_SCSI | |
35499c01 | 367 | void __init note_scsi_host(struct device_node *node, void *host) |
14cf11af PM |
368 | { |
369 | int l; | |
370 | char *p; | |
371 | ||
372 | l = strlen(node->full_name); | |
373 | if (bootpath != NULL && bootdevice != NULL | |
374 | && strncmp(node->full_name, bootdevice, l) == 0 | |
375 | && (bootdevice[l] == '/' || bootdevice[l] == 0)) { | |
376 | boot_host = host; | |
377 | /* | |
378 | * There's a bug in OF 1.0.5. (Why am I not surprised.) | |
379 | * If you pass a path like scsi/sd@1:0 to canon, it returns | |
380 | * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0 | |
381 | * That is, the scsi target number doesn't get preserved. | |
382 | * So we pick the target number out of bootpath and use that. | |
383 | */ | |
384 | p = strstr(bootpath, "/sd@"); | |
385 | if (p != NULL) { | |
386 | p += 4; | |
387 | boot_target = simple_strtoul(p, NULL, 10); | |
388 | p = strchr(p, ':'); | |
389 | if (p != NULL) | |
390 | boot_part = simple_strtoul(p + 1, NULL, 10); | |
391 | } | |
392 | } | |
393 | } | |
9b6b563c | 394 | EXPORT_SYMBOL(note_scsi_host); |
14cf11af PM |
395 | #endif |
396 | ||
397 | #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) | |
35499c01 | 398 | static dev_t __init find_ide_boot(void) |
14cf11af PM |
399 | { |
400 | char *p; | |
401 | int n; | |
402 | dev_t __init pmac_find_ide_boot(char *bootdevice, int n); | |
403 | ||
404 | if (bootdevice == NULL) | |
405 | return 0; | |
406 | p = strrchr(bootdevice, '/'); | |
407 | if (p == NULL) | |
408 | return 0; | |
409 | n = p - bootdevice; | |
410 | ||
411 | return pmac_find_ide_boot(bootdevice, n); | |
412 | } | |
413 | #endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */ | |
414 | ||
35499c01 | 415 | static void __init find_boot_device(void) |
14cf11af PM |
416 | { |
417 | #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC) | |
418 | boot_dev = find_ide_boot(); | |
419 | #endif | |
420 | } | |
421 | ||
14cf11af PM |
422 | /* TODO: Merge the suspend-to-ram with the common code !!! |
423 | * currently, this is a stub implementation for suspend-to-disk | |
424 | * only | |
425 | */ | |
426 | ||
427 | #ifdef CONFIG_SOFTWARE_SUSPEND | |
428 | ||
429 | static int pmac_pm_prepare(suspend_state_t state) | |
430 | { | |
431 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
432 | ||
433 | return 0; | |
434 | } | |
435 | ||
436 | static int pmac_pm_enter(suspend_state_t state) | |
437 | { | |
438 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
439 | ||
440 | /* Giveup the lazy FPU & vec so we don't have to back them | |
441 | * up from the low level code | |
442 | */ | |
443 | enable_kernel_fp(); | |
444 | ||
445 | #ifdef CONFIG_ALTIVEC | |
400d2212 | 446 | if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC) |
14cf11af PM |
447 | enable_kernel_altivec(); |
448 | #endif /* CONFIG_ALTIVEC */ | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
453 | static int pmac_pm_finish(suspend_state_t state) | |
454 | { | |
455 | printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state); | |
456 | ||
457 | /* Restore userland MMU context */ | |
6218a761 | 458 | set_context(current->active_mm->context.id, current->active_mm->pgd); |
14cf11af PM |
459 | |
460 | return 0; | |
461 | } | |
462 | ||
0fba3a1f JB |
463 | static int pmac_pm_valid(suspend_state_t state) |
464 | { | |
465 | switch (state) { | |
466 | case PM_SUSPEND_DISK: | |
467 | return 1; | |
468 | /* can't do any other states via generic mechanism yet */ | |
469 | default: | |
470 | return 0; | |
471 | } | |
472 | } | |
473 | ||
14cf11af PM |
474 | static struct pm_ops pmac_pm_ops = { |
475 | .pm_disk_mode = PM_DISK_SHUTDOWN, | |
476 | .prepare = pmac_pm_prepare, | |
477 | .enter = pmac_pm_enter, | |
478 | .finish = pmac_pm_finish, | |
0fba3a1f | 479 | .valid = pmac_pm_valid, |
14cf11af PM |
480 | }; |
481 | ||
482 | #endif /* CONFIG_SOFTWARE_SUSPEND */ | |
483 | ||
35499c01 PM |
484 | static int initializing = 1; |
485 | ||
14cf11af PM |
486 | static int pmac_late_init(void) |
487 | { | |
488 | initializing = 0; | |
489 | #ifdef CONFIG_SOFTWARE_SUSPEND | |
490 | pm_set_ops(&pmac_pm_ops); | |
491 | #endif /* CONFIG_SOFTWARE_SUSPEND */ | |
492 | return 0; | |
493 | } | |
494 | ||
495 | late_initcall(pmac_late_init); | |
496 | ||
497 | /* can't be __init - can be called whenever a disk is first accessed */ | |
35499c01 | 498 | void note_bootable_part(dev_t dev, int part, int goodness) |
14cf11af PM |
499 | { |
500 | static int found_boot = 0; | |
501 | char *p; | |
502 | ||
503 | if (!initializing) | |
504 | return; | |
505 | if ((goodness <= current_root_goodness) && | |
506 | ROOT_DEV != DEFAULT_ROOT_DEVICE) | |
507 | return; | |
508 | p = strstr(saved_command_line, "root="); | |
509 | if (p != NULL && (p == saved_command_line || p[-1] == ' ')) | |
510 | return; | |
511 | ||
512 | if (!found_boot) { | |
513 | find_boot_device(); | |
514 | found_boot = 1; | |
515 | } | |
516 | if (!boot_dev || dev == boot_dev) { | |
517 | ROOT_DEV = dev + part; | |
518 | boot_dev = 0; | |
519 | current_root_goodness = goodness; | |
520 | } | |
521 | } | |
522 | ||
14cf11af | 523 | #ifdef CONFIG_ADB_CUDA |
35499c01 PM |
524 | static void cuda_restart(void) |
525 | { | |
14cf11af | 526 | struct adb_request req; |
14cf11af | 527 | |
35499c01 PM |
528 | cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM); |
529 | for (;;) | |
530 | cuda_poll(); | |
531 | } | |
532 | ||
533 | static void cuda_shutdown(void) | |
534 | { | |
535 | struct adb_request req; | |
536 | ||
537 | cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN); | |
538 | for (;;) | |
539 | cuda_poll(); | |
540 | } | |
541 | ||
542 | #else | |
543 | #define cuda_restart() | |
544 | #define cuda_shutdown() | |
545 | #endif | |
546 | ||
547 | #ifndef CONFIG_ADB_PMU | |
548 | #define pmu_restart() | |
549 | #define pmu_shutdown() | |
550 | #endif | |
551 | ||
552 | #ifndef CONFIG_PMAC_SMU | |
553 | #define smu_restart() | |
554 | #define smu_shutdown() | |
555 | #endif | |
556 | ||
557 | static void pmac_restart(char *cmd) | |
558 | { | |
14cf11af | 559 | switch (sys_ctrler) { |
14cf11af | 560 | case SYS_CTRLER_CUDA: |
35499c01 | 561 | cuda_restart(); |
14cf11af | 562 | break; |
14cf11af PM |
563 | case SYS_CTRLER_PMU: |
564 | pmu_restart(); | |
565 | break; | |
35499c01 PM |
566 | case SYS_CTRLER_SMU: |
567 | smu_restart(); | |
568 | break; | |
14cf11af PM |
569 | default: ; |
570 | } | |
571 | } | |
572 | ||
35499c01 | 573 | static void pmac_power_off(void) |
14cf11af | 574 | { |
14cf11af | 575 | switch (sys_ctrler) { |
14cf11af | 576 | case SYS_CTRLER_CUDA: |
35499c01 | 577 | cuda_shutdown(); |
14cf11af | 578 | break; |
14cf11af PM |
579 | case SYS_CTRLER_PMU: |
580 | pmu_shutdown(); | |
581 | break; | |
35499c01 PM |
582 | case SYS_CTRLER_SMU: |
583 | smu_shutdown(); | |
584 | break; | |
14cf11af PM |
585 | default: ; |
586 | } | |
587 | } | |
588 | ||
589 | static void | |
590 | pmac_halt(void) | |
591 | { | |
592 | pmac_power_off(); | |
593 | } | |
594 | ||
35499c01 PM |
595 | /* |
596 | * Early initialization. | |
597 | */ | |
598 | static void __init pmac_init_early(void) | |
599 | { | |
51d3082f BH |
600 | /* Enable early btext debug if requested */ |
601 | if (strstr(cmd_line, "btextdbg")) { | |
602 | udbg_adb_init_early(); | |
603 | register_early_udbg_console(); | |
35499c01 PM |
604 | } |
605 | ||
51d3082f BH |
606 | /* Probe motherboard chipset */ |
607 | pmac_feature_init(); | |
608 | ||
51d3082f BH |
609 | /* Initialize debug stuff */ |
610 | udbg_scc_init(!!strstr(cmd_line, "sccdbg")); | |
611 | udbg_adb_init(!!strstr(cmd_line, "btextdbg")); | |
612 | ||
613 | #ifdef CONFIG_PPC64 | |
1beb6a7d | 614 | iommu_init_early_dart(); |
35499c01 PM |
615 | #endif |
616 | } | |
617 | ||
35499c01 PM |
618 | /* |
619 | * pmac has no legacy IO, anything calling this function has to | |
620 | * fail or bad things will happen | |
621 | */ | |
622 | static int pmac_check_legacy_ioport(unsigned int baseport) | |
623 | { | |
624 | return -ENODEV; | |
625 | } | |
626 | ||
627 | static int __init pmac_declare_of_platform_devices(void) | |
14cf11af | 628 | { |
a28d3af2 | 629 | struct device_node *np; |
14cf11af | 630 | |
e8222502 BH |
631 | if (machine_is(chrp)) |
632 | return -1; | |
633 | ||
634 | if (!machine_is(powermac)) | |
635 | return 0; | |
636 | ||
730745a5 | 637 | np = of_find_node_by_name(NULL, "valkyrie"); |
35499c01 PM |
638 | if (np) |
639 | of_platform_device_create(np, "valkyrie", NULL); | |
730745a5 | 640 | np = of_find_node_by_name(NULL, "platinum"); |
35499c01 PM |
641 | if (np) |
642 | of_platform_device_create(np, "platinum", NULL); | |
35499c01 PM |
643 | np = of_find_node_by_type(NULL, "smu"); |
644 | if (np) { | |
645 | of_platform_device_create(np, "smu", NULL); | |
646 | of_node_put(np); | |
647 | } | |
14cf11af PM |
648 | |
649 | return 0; | |
650 | } | |
651 | ||
652 | device_initcall(pmac_declare_of_platform_devices); | |
35499c01 PM |
653 | |
654 | /* | |
655 | * Called very early, MMU is off, device-tree isn't unflattened | |
656 | */ | |
e8222502 | 657 | static int __init pmac_probe(void) |
35499c01 | 658 | { |
e8222502 BH |
659 | unsigned long root = of_get_flat_dt_root(); |
660 | ||
661 | if (!of_flat_dt_is_compatible(root, "Power Macintosh") && | |
662 | !of_flat_dt_is_compatible(root, "MacRISC")) | |
35499c01 PM |
663 | return 0; |
664 | ||
e8222502 | 665 | #ifdef CONFIG_PPC64 |
35499c01 PM |
666 | /* |
667 | * On U3, the DART (iommu) must be allocated now since it | |
668 | * has an impact on htab_initialize (due to the large page it | |
669 | * occupies having to be broken up so the DART itself is not | |
670 | * part of the cacheable linar mapping | |
671 | */ | |
1beb6a7d | 672 | alloc_dart_table(); |
7d0daae4 ME |
673 | |
674 | hpte_init_native(); | |
35499c01 PM |
675 | #endif |
676 | ||
e8222502 BH |
677 | #ifdef CONFIG_PPC32 |
678 | /* isa_io_base gets set in pmac_pci_init */ | |
679 | isa_mem_base = PMAC_ISA_MEM_BASE; | |
680 | pci_dram_offset = PMAC_PCI_DRAM_OFFSET; | |
681 | ISA_DMA_THRESHOLD = ~0L; | |
682 | DMA_MODE_READ = 1; | |
683 | DMA_MODE_WRITE = 2; | |
684 | ||
685 | #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) | |
686 | #ifdef CONFIG_BLK_DEV_IDE_PMAC | |
687 | ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports; | |
688 | ppc_ide_md.default_io_base = pmac_ide_get_base; | |
689 | #endif /* CONFIG_BLK_DEV_IDE_PMAC */ | |
690 | #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */ | |
691 | ||
692 | #endif /* CONFIG_PPC32 */ | |
693 | ||
35499c01 PM |
694 | #ifdef CONFIG_PMAC_SMU |
695 | /* | |
696 | * SMU based G5s need some memory below 2Gb, at least the current | |
697 | * driver needs that. We have to allocate it now. We allocate 4k | |
698 | * (1 small page) for now. | |
699 | */ | |
700 | smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL); | |
701 | #endif /* CONFIG_PMAC_SMU */ | |
702 | ||
703 | return 1; | |
704 | } | |
705 | ||
706 | #ifdef CONFIG_PPC64 | |
51d3082f BH |
707 | /* Move that to pci.c */ |
708 | static int pmac_pci_probe_mode(struct pci_bus *bus) | |
35499c01 PM |
709 | { |
710 | struct device_node *node = bus->sysdata; | |
711 | ||
712 | /* We need to use normal PCI probing for the AGP bus, | |
1beb6a7d BH |
713 | * since the device for the AGP bridge isn't in the tree. |
714 | */ | |
715 | if (bus->self == NULL && (device_is_compatible(node, "u3-agp") || | |
716 | device_is_compatible(node, "u4-pcie"))) | |
35499c01 | 717 | return PCI_PROBE_NORMAL; |
35499c01 PM |
718 | return PCI_PROBE_DEVTREE; |
719 | } | |
720 | #endif | |
721 | ||
e8222502 BH |
722 | define_machine(powermac) { |
723 | .name = "PowerMac", | |
35499c01 PM |
724 | .probe = pmac_probe, |
725 | .setup_arch = pmac_setup_arch, | |
726 | .init_early = pmac_init_early, | |
727 | .show_cpuinfo = pmac_show_cpuinfo, | |
35499c01 | 728 | .init_IRQ = pmac_pic_init, |
cc5d0189 | 729 | .get_irq = NULL, /* changed later */ |
35499c01 PM |
730 | .pcibios_fixup = pmac_pcibios_fixup, |
731 | .restart = pmac_restart, | |
732 | .power_off = pmac_power_off, | |
733 | .halt = pmac_halt, | |
734 | .time_init = pmac_time_init, | |
735 | .get_boot_time = pmac_get_boot_time, | |
736 | .set_rtc_time = pmac_set_rtc_time, | |
737 | .get_rtc_time = pmac_get_rtc_time, | |
738 | .calibrate_decr = pmac_calibrate_decr, | |
739 | .feature_call = pmac_do_feature_call, | |
740 | .check_legacy_ioport = pmac_check_legacy_ioport, | |
be6b8439 | 741 | .progress = udbg_progress, |
35499c01 | 742 | #ifdef CONFIG_PPC64 |
51d3082f | 743 | .pci_probe_mode = pmac_pci_probe_mode, |
a0652fc9 | 744 | .power_save = power4_idle, |
35499c01 | 745 | .enable_pmcs = power4_enable_pmcs, |
3d1229d6 ME |
746 | #ifdef CONFIG_KEXEC |
747 | .machine_kexec = default_machine_kexec, | |
748 | .machine_kexec_prepare = default_machine_kexec_prepare, | |
cc532915 | 749 | .machine_crash_shutdown = default_machine_crash_shutdown, |
35499c01 | 750 | #endif |
3d1229d6 | 751 | #endif /* CONFIG_PPC64 */ |
35499c01 PM |
752 | #ifdef CONFIG_PPC32 |
753 | .pcibios_enable_device_hook = pmac_pci_enable_device_hook, | |
754 | .pcibios_after_init = pmac_pcibios_after_init, | |
755 | .phys_mem_access_prot = pci_phys_mem_access_prot, | |
756 | #endif | |
e8222502 BH |
757 | #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) |
758 | .cpu_die = generic_mach_cpu_die, | |
759 | #endif | |
35499c01 | 760 | }; |