[linux-block.git] / arch / powerpc / platforms / powermac / setup.c

/*
 *  Powermac setup and early boot code plus other random bits.
 *
 *  PowerPC version
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Adapted for Power Macintosh by Paul Mackerras
 *    Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
 *
 *  Derived from "arch/alpha/kernel/setup.c"
 *    Copyright (C) 1995 Linus Torvalds
 *
 *  Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

/*
 * bootup setup stuff..
 */

#include <linux/init.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/major.h>
#include <linux/initrd.h>
#include <linux/vt_kern.h>
#include <linux/console.h>
#include <linux/pci.h>
#include <linux/adb.h>
#include <linux/cuda.h>
#include <linux/pmu.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/bitops.h>
#include <linux/suspend.h>
#include <linux/of_device.h>
#include <linux/of_platform.h>
#include <linux/lmb.h>

#include <asm/reg.h>
#include <asm/sections.h>
#include <asm/prom.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/kexec.h>
#include <asm/pci-bridge.h>
#include <asm/ohare.h>
#include <asm/mediabay.h>
#include <asm/machdep.h>
#include <asm/dma.h>
#include <asm/cputable.h>
#include <asm/btext.h>
#include <asm/pmac_feature.h>
#include <asm/time.h>
#include <asm/mmu_context.h>
#include <asm/iommu.h>
#include <asm/smu.h>
#include <asm/pmc.h>
#include <asm/udbg.h>

#include "pmac.h"

#undef SHOW_GATWICK_IRQS

int ppc_override_l2cr = 0;
int ppc_override_l2cr_value;
int has_l2cache = 0;

int pmac_newworld;

static int current_root_goodness = -1;

extern struct machdep_calls pmac_md;

#define DEFAULT_ROOT_DEVICE Root_SDA1	/* sda1 - slightly silly choice */

#ifdef CONFIG_PPC64
int sccdbg;
#endif

sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
EXPORT_SYMBOL(sys_ctrler);

#ifdef CONFIG_PMAC_SMU
unsigned long smu_cmdbuf_abs;
EXPORT_SYMBOL(smu_cmdbuf_abs);
#endif

#ifdef CONFIG_SMP
extern struct smp_ops_t psurge_smp_ops;
extern struct smp_ops_t core99_smp_ops;
#endif /* CONFIG_SMP */

static void pmac_show_cpuinfo(struct seq_file *m)
{
	struct device_node *np;
	const char *pp;
	int plen;
	int mbmodel;
	unsigned int mbflags;
	char* mbname;

	mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
				    PMAC_MB_INFO_MODEL, 0);
	mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
				    PMAC_MB_INFO_FLAGS, 0);
	if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
			      (long) &mbname) != 0)
		mbname = "Unknown";

	/* find motherboard type */
	seq_printf(m, "machine\t\t: ");
	np = of_find_node_by_path("/");
	if (np != NULL) {
		pp = of_get_property(np, "model", NULL);
		if (pp != NULL)
			seq_printf(m, "%s\n", pp);
		else
			seq_printf(m, "PowerMac\n");
		pp = of_get_property(np, "compatible", &plen);
		if (pp != NULL) {
			seq_printf(m, "motherboard\t:");
			while (plen > 0) {
				int l = strlen(pp) + 1;
				seq_printf(m, " %s", pp);
				plen -= l;
				pp += l;
			}
			seq_printf(m, "\n");
		}
		of_node_put(np);
	} else
		seq_printf(m, "PowerMac\n");

	/* print parsed model */
	seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
	seq_printf(m, "pmac flags\t: %08x\n", mbflags);

	/* find l2 cache info */
	np = of_find_node_by_name(NULL, "l2-cache");
	if (np == NULL)
		np = of_find_node_by_type(NULL, "cache");
	if (np != NULL) {
		const unsigned int *ic =
			of_get_property(np, "i-cache-size", NULL);
		const unsigned int *dc =
			of_get_property(np, "d-cache-size", NULL);
		seq_printf(m, "L2 cache\t:");
		has_l2cache = 1;
		if (of_get_property(np, "cache-unified", NULL) != 0 && dc) {
			seq_printf(m, " %dK unified", *dc / 1024);
		} else {
			if (ic)
				seq_printf(m, " %dK instruction", *ic / 1024);
			if (dc)
				seq_printf(m, "%s %dK data",
					   (ic? " +": ""), *dc / 1024);
		}
		pp = of_get_property(np, "ram-type", NULL);
		if (pp)
			seq_printf(m, " %s", pp);
		seq_printf(m, "\n");
		of_node_put(np);
	}

	/* Indicate newworld/oldworld */
	seq_printf(m, "pmac-generation\t: %s\n",
		   pmac_newworld ? "NewWorld" : "OldWorld");
}

#ifndef CONFIG_ADB_CUDA
int find_via_cuda(void)
{
	struct device_node *dn = of_find_node_by_name(NULL, "via-cuda");

	if (!dn)
		return 0;
	of_node_put(dn);
	printk("WARNING ! Your machine is CUDA-based but your kernel\n");
	printk("          wasn't compiled with CONFIG_ADB_CUDA option !\n");
	return 0;
}
#endif

#ifndef CONFIG_ADB_PMU
int find_via_pmu(void)
{
	struct device_node *dn = of_find_node_by_name(NULL, "via-pmu");

	if (!dn)
		return 0;
	of_node_put(dn);
	printk("WARNING ! Your machine is PMU-based but your kernel\n");
	printk("          wasn't compiled with CONFIG_ADB_PMU option !\n");
	return 0;
}
#endif

#ifndef CONFIG_PMAC_SMU
int smu_init(void)
{
	/* should check and warn if SMU is present */
	return 0;
}
#endif

#ifdef CONFIG_PPC32
static volatile u32 *sysctrl_regs;

static void __init ohare_init(void)
{
	struct device_node *dn;

	/* this area has the CPU identification register
	   and some registers used by smp boards */
	sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);

	/*
	 * Turn on the L2 cache.
	 * We assume that we have a PSX memory controller iff
	 * we have an ohare I/O controller.
	 */
	dn = of_find_node_by_name(NULL, "ohare");
	if (dn) {
		of_node_put(dn);
		if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
			if (sysctrl_regs[4] & 0x10)
				sysctrl_regs[4] |= 0x04000020;
			else
				sysctrl_regs[4] |= 0x04000000;
			if(has_l2cache)
				printk(KERN_INFO "Level 2 cache enabled\n");
		}
	}
}

static void __init l2cr_init(void)
{
	/* Checks "l2cr-value" property in the registry */
	if (cpu_has_feature(CPU_FTR_L2CR)) {
		struct device_node *np = of_find_node_by_name(NULL, "cpus");
		if (np == 0)
			np = of_find_node_by_type(NULL, "cpu");
		if (np != 0) {
			const unsigned int *l2cr =
				of_get_property(np, "l2cr-value", NULL);
			if (l2cr != 0) {
				ppc_override_l2cr = 1;
				ppc_override_l2cr_value = *l2cr;
				_set_L2CR(0);
				_set_L2CR(ppc_override_l2cr_value);
			}
			of_node_put(np);
		}
	}

	if (ppc_override_l2cr)
		printk(KERN_INFO "L2CR overridden (0x%x), "
		       "backside cache is %s\n",
		       ppc_override_l2cr_value,
		       (ppc_override_l2cr_value & 0x80000000)
				? "enabled" : "disabled");
}
#endif

static void __init pmac_setup_arch(void)
{
	struct device_node *cpu, *ic;
	const int *fp;
	unsigned long pvr;

	pvr = PVR_VER(mfspr(SPRN_PVR));

	/* Set loops_per_jiffy to a half-way reasonable value,
	   for use until calibrate_delay gets called. */
	loops_per_jiffy = 50000000 / HZ;
	cpu = of_find_node_by_type(NULL, "cpu");
	if (cpu != NULL) {
		fp = of_get_property(cpu, "clock-frequency", NULL);
		if (fp != NULL) {
			if (pvr >= 0x30 && pvr < 0x80)
				/* PPC970 etc. */
				loops_per_jiffy = *fp / (3 * HZ);
			else if (pvr == 4 || pvr >= 8)
				/* 604, G3, G4 etc. */
				loops_per_jiffy = *fp / HZ;
			else
				/* 601, 603, etc. */
				loops_per_jiffy = *fp / (2 * HZ);
		}
		of_node_put(cpu);
	}

	/* See if newworld or oldworld */
	for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
		if (of_get_property(ic, "interrupt-controller", NULL))
			break;
	if (ic) {
		pmac_newworld = 1;
		of_node_put(ic);
	}

	/* Lookup PCI hosts */
	pmac_pci_init();

#ifdef CONFIG_PPC32
	ohare_init();
	l2cr_init();
#endif /* CONFIG_PPC32 */

	find_via_cuda();
	find_via_pmu();
	smu_init();

#if defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) || \
    defined(CONFIG_PPC64)
	pmac_nvram_init();
#endif

#ifdef CONFIG_PPC32
#ifdef CONFIG_BLK_DEV_INITRD
	if (initrd_start)
		ROOT_DEV = Root_RAM0;
	else
#endif
		ROOT_DEV = DEFAULT_ROOT_DEVICE;
#endif

#ifdef CONFIG_SMP
	/* Check for Core99 */
	ic = of_find_node_by_name(NULL, "uni-n");
	if (!ic)
		ic = of_find_node_by_name(NULL, "u3");
	if (!ic)
		ic = of_find_node_by_name(NULL, "u4");
	if (ic) {
		of_node_put(ic);
		smp_ops = &core99_smp_ops;
	}
#ifdef CONFIG_PPC32
	else {
		/*
		 * We have to set bits in cpu_possible_map here since the
		 * secondary CPU(s) aren't in the device tree, and
		 * setup_per_cpu_areas only allocates per-cpu data for
		 * CPUs in the cpu_possible_map.
		 */
		int cpu;

		for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
			cpu_set(cpu, cpu_possible_map);
		smp_ops = &psurge_smp_ops;
	}
#endif
#endif /* CONFIG_SMP */

#ifdef CONFIG_ADB
	if (strstr(cmd_line, "adb_sync")) {
		extern int __adb_probe_sync;
		__adb_probe_sync = 1;
	}
#endif /* CONFIG_ADB */
}

#ifdef CONFIG_SCSI
void note_scsi_host(struct device_node *node, void *host)
{
}
EXPORT_SYMBOL(note_scsi_host);
#endif

static int initializing = 1;

static int pmac_late_init(void)
{
	initializing = 0;
	/* this is udbg (which is __init) and we can later use it during
	 * cpu hotplug (in smp_core99_kick_cpu) */
	ppc_md.progress = NULL;
	return 0;
}
machine_late_initcall(powermac, pmac_late_init);

/*
 * This is __init_refok because we check for "initializing" before
 * touching any of the __init sensitive things and "initializing"
 * will be false after __init time. This can't be __init because it
 * can be called whenever a disk is first accessed.
 */
void __init_refok note_bootable_part(dev_t dev, int part, int goodness)
{
	char *p;

	if (!initializing)
		return;
	if ((goodness <= current_root_goodness) &&
	    ROOT_DEV != DEFAULT_ROOT_DEVICE)
		return;
	p = strstr(boot_command_line, "root=");
	if (p != NULL && (p == boot_command_line || p[-1] == ' '))
		return;

	ROOT_DEV = dev + part;
	current_root_goodness = goodness;
}

#ifdef CONFIG_ADB_CUDA
static void cuda_restart(void)
{
	struct adb_request req;

	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
	for (;;)
		cuda_poll();
}

static void cuda_shutdown(void)
{
	struct adb_request req;

	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
	for (;;)
		cuda_poll();
}

#else
#define cuda_restart()
#define cuda_shutdown()
#endif

#ifndef CONFIG_ADB_PMU
#define pmu_restart()
#define pmu_shutdown()
#endif

#ifndef CONFIG_PMAC_SMU
#define smu_restart()
#define smu_shutdown()
#endif

static void pmac_restart(char *cmd)
{
	switch (sys_ctrler) {
	case SYS_CTRLER_CUDA:
		cuda_restart();
		break;
	case SYS_CTRLER_PMU:
		pmu_restart();
		break;
	case SYS_CTRLER_SMU:
		smu_restart();
		break;
	default: ;
	}
}

static void pmac_power_off(void)
{
	switch (sys_ctrler) {
	case SYS_CTRLER_CUDA:
		cuda_shutdown();
		break;
	case SYS_CTRLER_PMU:
		pmu_shutdown();
		break;
	case SYS_CTRLER_SMU:
		smu_shutdown();
		break;
	default: ;
	}
}

static void
pmac_halt(void)
{
	pmac_power_off();
}

/* 
 * Early initialization.
 */
static void __init pmac_init_early(void)
{
	/* Enable early btext debug if requested */
	if (strstr(cmd_line, "btextdbg")) {
		udbg_adb_init_early();
		register_early_udbg_console();
	}

	/* Probe motherboard chipset */
	pmac_feature_init();

	/* Initialize debug stuff */
	udbg_scc_init(!!strstr(cmd_line, "sccdbg"));
	udbg_adb_init(!!strstr(cmd_line, "btextdbg"));

#ifdef CONFIG_PPC64
	iommu_init_early_dart();
#endif
}

static int __init pmac_declare_of_platform_devices(void)
{
	struct device_node *np;

	if (machine_is(chrp))
		return -1;

	np = of_find_node_by_name(NULL, "valkyrie");
	if (np)
		of_platform_device_create(np, "valkyrie", NULL);
	np = of_find_node_by_name(NULL, "platinum");
	if (np)
		of_platform_device_create(np, "platinum", NULL);
        np = of_find_node_by_type(NULL, "smu");
        if (np) {
		of_platform_device_create(np, "smu", NULL);
		of_node_put(np);
	}

	return 0;
}
machine_device_initcall(powermac, pmac_declare_of_platform_devices);

/*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
static int __init pmac_probe(void)
{
	unsigned long root = of_get_flat_dt_root();

	if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
	    !of_flat_dt_is_compatible(root, "MacRISC"))
		return 0;

#ifdef CONFIG_PPC64
	/*
	 * On U3, the DART (iommu) must be allocated now since it
	 * has an impact on htab_initialize (due to the large page it
	 * occupies having to be broken up so the DART itself is not
	 * part of the cacheable linar mapping
	 */
	alloc_dart_table();

	hpte_init_native();
#endif

#ifdef CONFIG_PPC32
	/* isa_io_base gets set in pmac_pci_init */
	ISA_DMA_THRESHOLD = ~0L;
	DMA_MODE_READ = 1;
	DMA_MODE_WRITE = 2;
#endif /* CONFIG_PPC32 */

#ifdef CONFIG_PMAC_SMU
	/*
	 * SMU based G5s need some memory below 2Gb, at least the current
	 * driver needs that. We have to allocate it now. We allocate 4k
	 * (1 small page) for now.
	 */
	smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
#endif /* CONFIG_PMAC_SMU */

	return 1;
}

#ifdef CONFIG_PPC64
/* Move that to pci.c */
static int pmac_pci_probe_mode(struct pci_bus *bus)
{
	struct device_node *node = bus->sysdata;

	/* We need to use normal PCI probing for the AGP bus,
	 * since the device for the AGP bridge isn't in the tree.
	 * Same for the PCIe host on U4 and the HT host bridge.
	 */
	if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") ||
				  of_device_is_compatible(node, "u4-pcie") ||
				  of_device_is_compatible(node, "u3-ht")))
		return PCI_PROBE_NORMAL;
	return PCI_PROBE_DEVTREE;
}

#ifdef CONFIG_HOTPLUG_CPU
/* access per cpu vars from generic smp.c */
DECLARE_PER_CPU(int, cpu_state);

static void pmac_cpu_die(void)
{
	/*
	 * turn off as much as possible, we'll be
	 * kicked out as this will only be invoked
	 * on core99 platforms for now ...
	 */

	printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
	__get_cpu_var(cpu_state) = CPU_DEAD;
	smp_wmb();

	/*
	 * during the path that leads here preemption is disabled,
	 * reenable it now so that when coming up preempt count is
	 * zero correctly
	 */
	preempt_enable();

	/*
	 * hard-disable interrupts for the non-NAP case, the NAP code
	 * needs to re-enable interrupts (but soft-disables them)
	 */
	hard_irq_disable();

	while (1) {
		/* let's not take timer interrupts too often ... */
		set_dec(0x7fffffff);

		/* should always be true at this point */
		if (cpu_has_feature(CPU_FTR_CAN_NAP))
			power4_cpu_offline_powersave();
		else {
			HMT_low();
			HMT_very_low();
		}
	}
}
#endif /* CONFIG_HOTPLUG_CPU */

#endif /* CONFIG_PPC64 */

define_machine(powermac) {
	.name			= "PowerMac",
	.probe			= pmac_probe,
	.setup_arch		= pmac_setup_arch,
	.init_early		= pmac_init_early,
	.show_cpuinfo		= pmac_show_cpuinfo,
	.init_IRQ		= pmac_pic_init,
	.get_irq		= NULL,	/* changed later */
	.pci_irq_fixup		= pmac_pci_irq_fixup,
	.restart		= pmac_restart,
	.power_off		= pmac_power_off,
	.halt			= pmac_halt,
	.time_init		= pmac_time_init,
	.get_boot_time		= pmac_get_boot_time,
	.set_rtc_time		= pmac_set_rtc_time,
	.get_rtc_time		= pmac_get_rtc_time,
	.calibrate_decr		= pmac_calibrate_decr,
	.feature_call		= pmac_do_feature_call,
	.progress		= udbg_progress,
#ifdef CONFIG_PPC64
	.pci_probe_mode		= pmac_pci_probe_mode,
	.power_save		= power4_idle,
	.enable_pmcs		= power4_enable_pmcs,
#ifdef CONFIG_KEXEC
	.machine_kexec		= default_machine_kexec,
	.machine_kexec_prepare	= default_machine_kexec_prepare,
	.machine_crash_shutdown	= default_machine_crash_shutdown,
#endif
#endif /* CONFIG_PPC64 */
#ifdef CONFIG_PPC32
	.pcibios_enable_device_hook = pmac_pci_enable_device_hook,
	.pcibios_after_init	= pmac_pcibios_after_init,
	.phys_mem_access_prot	= pci_phys_mem_access_prot,
#endif
#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
	.cpu_die		= pmac_cpu_die,
#endif
};
Commit	Line	Data
14cf11af	1	/*
35499c01	2	* Powermac setup and early boot code plus other random bits.
14cf11af PM	3	*
	4	* PowerPC version
	5	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	6	*
	7	* Adapted for Power Macintosh by Paul Mackerras
35499c01	8	* Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
14cf11af PM	9	*
	10	* Derived from "arch/alpha/kernel/setup.c"
	11	* Copyright (C) 1995 Linus Torvalds
	12	*
	13	* Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License
	17	* as published by the Free Software Foundation; either version
	18	* 2 of the License, or (at your option) any later version.
	19	*
	20	*/
	21
	22	/*
	23	* bootup setup stuff..
	24	*/
	25
14cf11af PM	26	#include <linux/init.h>
	27	#include <linux/errno.h>
	28	#include <linux/sched.h>
	29	#include <linux/kernel.h>
	30	#include <linux/mm.h>
	31	#include <linux/stddef.h>
	32	#include <linux/unistd.h>
	33	#include <linux/ptrace.h>
	34	#include <linux/slab.h>
	35	#include <linux/user.h>
	36	#include <linux/a.out.h>
	37	#include <linux/tty.h>
	38	#include <linux/string.h>
	39	#include <linux/delay.h>
	40	#include <linux/ioport.h>
	41	#include <linux/major.h>
	42	#include <linux/initrd.h>
	43	#include <linux/vt_kern.h>
	44	#include <linux/console.h>
14cf11af PM	45	#include <linux/pci.h>
	46	#include <linux/adb.h>
	47	#include <linux/cuda.h>
	48	#include <linux/pmu.h>
	49	#include <linux/irq.h>
	50	#include <linux/seq_file.h>
	51	#include <linux/root_dev.h>
	52	#include <linux/bitops.h>
	53	#include <linux/suspend.h>
5f867dc7 JL	54	#include <linux/of_device.h>
5f867dc7 JL	55	#include <linux/of_platform.h>
d9b2b2a2	56	#include <linux/lmb.h>
14cf11af PM	57
	58	#include <asm/reg.h>
	59	#include <asm/sections.h>
	60	#include <asm/prom.h>
	61	#include <asm/system.h>
	62	#include <asm/pgtable.h>
	63	#include <asm/io.h>
3d1229d6	64	#include <asm/kexec.h>
14cf11af PM	65	#include <asm/pci-bridge.h>
	66	#include <asm/ohare.h>
	67	#include <asm/mediabay.h>
	68	#include <asm/machdep.h>
	69	#include <asm/dma.h>
14cf11af PM	70	#include <asm/cputable.h>
	71	#include <asm/btext.h>
	72	#include <asm/pmac_feature.h>
	73	#include <asm/time.h>
14cf11af	74	#include <asm/mmu_context.h>
35499c01 PM	75	#include <asm/iommu.h>
	76	#include <asm/smu.h>
	77	#include <asm/pmc.h>
51d3082f	78	#include <asm/udbg.h>
14cf11af	79
3c3f42d6	80	#include "pmac.h"
14cf11af PM	81
	82	#undef SHOW_GATWICK_IRQS
	83
14cf11af PM	84	int ppc_override_l2cr = 0;
	85	int ppc_override_l2cr_value;
	86	int has_l2cache = 0;
	87
d2515c80	88	int pmac_newworld;
9b6b563c	89
14cf11af PM	90	static int current_root_goodness = -1;
14cf11af PM	91
35499c01	92	extern struct machdep_calls pmac_md;
14cf11af PM	93
	94	#define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
	95
35499c01	96	#ifdef CONFIG_PPC64
35499c01	97	int sccdbg;
14cf11af PM	98	#endif
	99
	100	sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
35499c01 PM	101	EXPORT_SYMBOL(sys_ctrler);
	102
	103	#ifdef CONFIG_PMAC_SMU
	104	unsigned long smu_cmdbuf_abs;
	105	EXPORT_SYMBOL(smu_cmdbuf_abs);
	106	#endif
14cf11af PM	107
	108	#ifdef CONFIG_SMP
	109	extern struct smp_ops_t psurge_smp_ops;
	110	extern struct smp_ops_t core99_smp_ops;
	111	#endif /* CONFIG_SMP */
	112
0dd194d0	113	static void pmac_show_cpuinfo(struct seq_file *m)
14cf11af PM	114	{
14cf11af PM	115	struct device_node *np;
018a3d1d	116	const char *pp;
14cf11af	117	int plen;
0dd194d0 PM	118	int mbmodel;
0dd194d0 PM	119	unsigned int mbflags;
14cf11af PM	120	char* mbname;
14cf11af PM	121
0dd194d0 PM	122	mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
	123	PMAC_MB_INFO_MODEL, 0);
	124	mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
	125	PMAC_MB_INFO_FLAGS, 0);
	126	if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
	127	(long) &mbname) != 0)
14cf11af PM	128	mbname = "Unknown";
	129
	130	/* find motherboard type */
	131	seq_printf(m, "machine\t\t: ");
0dd194d0	132	np = of_find_node_by_path("/");
14cf11af	133	if (np != NULL) {
e2eb6392	134	pp = of_get_property(np, "model", NULL);
14cf11af PM	135	if (pp != NULL)
	136	seq_printf(m, "%s\n", pp);
	137	else
	138	seq_printf(m, "PowerMac\n");
e2eb6392	139	pp = of_get_property(np, "compatible", &plen);
14cf11af PM	140	if (pp != NULL) {
	141	seq_printf(m, "motherboard\t:");
	142	while (plen > 0) {
	143	int l = strlen(pp) + 1;
	144	seq_printf(m, " %s", pp);
	145	plen -= l;
	146	pp += l;
	147	}
	148	seq_printf(m, "\n");
	149	}
0dd194d0	150	of_node_put(np);
14cf11af PM	151	} else
	152	seq_printf(m, "PowerMac\n");
	153
	154	/* print parsed model */
	155	seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
	156	seq_printf(m, "pmac flags\t: %08x\n", mbflags);
	157
	158	/* find l2 cache info */
0dd194d0 PM	159	np = of_find_node_by_name(NULL, "l2-cache");
	160	if (np == NULL)
	161	np = of_find_node_by_type(NULL, "cache");
	162	if (np != NULL) {
e2eb6392 SR	163	const unsigned int *ic =
	164	of_get_property(np, "i-cache-size", NULL);
	165	const unsigned int *dc =
	166	of_get_property(np, "d-cache-size", NULL);
14cf11af PM	167	seq_printf(m, "L2 cache\t:");
14cf11af PM	168	has_l2cache = 1;
e2eb6392	169	if (of_get_property(np, "cache-unified", NULL) != 0 && dc) {
14cf11af PM	170	seq_printf(m, " %dK unified", *dc / 1024);
	171	} else {
	172	if (ic)
	173	seq_printf(m, " %dK instruction", *ic / 1024);
	174	if (dc)
	175	seq_printf(m, "%s %dK data",
	176	(ic? " +": ""), *dc / 1024);
	177	}
e2eb6392	178	pp = of_get_property(np, "ram-type", NULL);
14cf11af PM	179	if (pp)
	180	seq_printf(m, " %s", pp);
	181	seq_printf(m, "\n");
0dd194d0	182	of_node_put(np);
14cf11af PM	183	}
	184
	185	/* Indicate newworld/oldworld */
	186	seq_printf(m, "pmac-generation\t: %s\n",
	187	pmac_newworld ? "NewWorld" : "OldWorld");
14cf11af PM	188	}
14cf11af PM	189
35499c01 PM	190	#ifndef CONFIG_ADB_CUDA
	191	int find_via_cuda(void)
	192	{
30686ba6 SR	193	struct device_node *dn = of_find_node_by_name(NULL, "via-cuda");
	194
	195	if (!dn)
35499c01	196	return 0;
30686ba6	197	of_node_put(dn);
35499c01 PM	198	printk("WARNING ! Your machine is CUDA-based but your kernel\n");
	199	printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n");
	200	return 0;
	201	}
	202	#endif
14cf11af	203
35499c01 PM	204	#ifndef CONFIG_ADB_PMU
35499c01 PM	205	int find_via_pmu(void)
14cf11af	206	{
30686ba6 SR	207	struct device_node *dn = of_find_node_by_name(NULL, "via-pmu");
	208
	209	if (!dn)
35499c01	210	return 0;
30686ba6	211	of_node_put(dn);
35499c01 PM	212	printk("WARNING ! Your machine is PMU-based but your kernel\n");
35499c01 PM	213	printk(" wasn't compiled with CONFIG_ADB_PMU option !\n");
a575b807	214	return 0;
35499c01 PM	215	}
35499c01 PM	216	#endif
14cf11af	217
35499c01 PM	218	#ifndef CONFIG_PMAC_SMU
	219	int smu_init(void)
	220	{
	221	/* should check and warn if SMU is present */
	222	return 0;
	223	}
	224	#endif
14cf11af	225
35499c01 PM	226	#ifdef CONFIG_PPC32
35499c01 PM	227	static volatile u32 *sysctrl_regs;
14cf11af	228
35499c01 PM	229	static void __init ohare_init(void)
35499c01 PM	230	{
30686ba6 SR	231	struct device_node *dn;
30686ba6 SR	232
14cf11af PM	233	/* this area has the CPU identification register
	234	and some registers used by smp boards */
	235	sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);
14cf11af	236
35499c01 PM	237	/*
	238	* Turn on the L2 cache.
	239	* We assume that we have a PSX memory controller iff
	240	* we have an ohare I/O controller.
	241	*/
30686ba6 SR	242	dn = of_find_node_by_name(NULL, "ohare");
	243	if (dn) {
	244	of_node_put(dn);
35499c01 PM	245	if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
	246	if (sysctrl_regs[4] & 0x10)
	247	sysctrl_regs[4] \|= 0x04000020;
	248	else
	249	sysctrl_regs[4] \|= 0x04000000;
	250	if(has_l2cache)
	251	printk(KERN_INFO "Level 2 cache enabled\n");
	252	}
	253	}
	254	}
14cf11af	255
35499c01 PM	256	static void __init l2cr_init(void)
35499c01 PM	257	{
14cf11af PM	258	/* Checks "l2cr-value" property in the registry */
14cf11af PM	259	if (cpu_has_feature(CPU_FTR_L2CR)) {
1658ab66	260	struct device_node *np = of_find_node_by_name(NULL, "cpus");
14cf11af	261	if (np == 0)
1658ab66	262	np = of_find_node_by_type(NULL, "cpu");
14cf11af	263	if (np != 0) {
018a3d1d	264	const unsigned int *l2cr =
e2eb6392	265	of_get_property(np, "l2cr-value", NULL);
14cf11af PM	266	if (l2cr != 0) {
	267	ppc_override_l2cr = 1;
	268	ppc_override_l2cr_value = *l2cr;
	269	_set_L2CR(0);
	270	_set_L2CR(ppc_override_l2cr_value);
	271	}
1658ab66	272	of_node_put(np);
14cf11af PM	273	}
	274	}
	275
	276	if (ppc_override_l2cr)
35499c01 PM	277	printk(KERN_INFO "L2CR overridden (0x%x), "
	278	"backside cache is %s\n",
	279	ppc_override_l2cr_value,
	280	(ppc_override_l2cr_value & 0x80000000)
14cf11af	281	? "enabled" : "disabled");
35499c01 PM	282	}
	283	#endif
	284
ff38e7c8	285	static void __init pmac_setup_arch(void)
35499c01	286	{
a575b807	287	struct device_node cpu, ic;
018a3d1d	288	const int *fp;
35499c01 PM	289	unsigned long pvr;
	290
	291	pvr = PVR_VER(mfspr(SPRN_PVR));
	292
	293	/* Set loops_per_jiffy to a half-way reasonable value,
	294	for use until calibrate_delay gets called. */
	295	loops_per_jiffy = 50000000 / HZ;
	296	cpu = of_find_node_by_type(NULL, "cpu");
	297	if (cpu != NULL) {
e2eb6392	298	fp = of_get_property(cpu, "clock-frequency", NULL);
35499c01 PM	299	if (fp != NULL) {
	300	if (pvr >= 0x30 && pvr < 0x80)
	301	/* PPC970 etc. */
	302	loops_per_jiffy = fp / (3 HZ);
	303	else if (pvr == 4 \|\| pvr >= 8)
	304	/* 604, G3, G4 etc. */
	305	loops_per_jiffy = *fp / HZ;
	306	else
	307	/* 601, 603, etc. */
	308	loops_per_jiffy = fp / (2 HZ);
	309	}
	310	of_node_put(cpu);
	311	}
	312
a575b807	313	/* See if newworld or oldworld */
bfab1019	314	for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
e2eb6392	315	if (of_get_property(ic, "interrupt-controller", NULL))
bfab1019	316	break;
d2515c80 OH	317	if (ic) {
d2515c80 OH	318	pmac_newworld = 1;
a575b807	319	of_node_put(ic);
d2515c80	320	}
a575b807	321
35499c01 PM	322	/* Lookup PCI hosts */
	323	pmac_pci_init();
	324
	325	#ifdef CONFIG_PPC32
	326	ohare_init();
	327	l2cr_init();
	328	#endif /* CONFIG_PPC32 */
	329
14cf11af	330	find_via_cuda();
14cf11af	331	find_via_pmu();
35499c01 PM	332	smu_init();
35499c01 PM	333
21e38dfe TB	334	#if defined(CONFIG_NVRAM) \|\| defined(CONFIG_NVRAM_MODULE) \|\| \
21e38dfe TB	335	defined(CONFIG_PPC64)
14cf11af PM	336	pmac_nvram_init();
14cf11af PM	337	#endif
35499c01 PM	338
35499c01 PM	339	#ifdef CONFIG_PPC32
14cf11af PM	340	#ifdef CONFIG_BLK_DEV_INITRD
	341	if (initrd_start)
	342	ROOT_DEV = Root_RAM0;
	343	else
	344	#endif
	345	ROOT_DEV = DEFAULT_ROOT_DEVICE;
35499c01	346	#endif
14cf11af PM	347
	348	#ifdef CONFIG_SMP
	349	/* Check for Core99 */
30686ba6 SR	350	ic = of_find_node_by_name(NULL, "uni-n");
	351	if (!ic)
	352	ic = of_find_node_by_name(NULL, "u3");
	353	if (!ic)
	354	ic = of_find_node_by_name(NULL, "u4");
	355	if (ic) {
	356	of_node_put(ic);
7ed476d1	357	smp_ops = &core99_smp_ops;
30686ba6	358	}
35499c01	359	#ifdef CONFIG_PPC32
c63c4faa PM	360	else {
	361	/*
	362	* We have to set bits in cpu_possible_map here since the
	363	* secondary CPU(s) aren't in the device tree, and
	364	* setup_per_cpu_areas only allocates per-cpu data for
	365	* CPUs in the cpu_possible_map.
	366	*/
	367	int cpu;
	368
	369	for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
	370	cpu_set(cpu, cpu_possible_map);
7ed476d1	371	smp_ops = &psurge_smp_ops;
c63c4faa	372	}
35499c01	373	#endif
14cf11af	374	#endif /* CONFIG_SMP */
e8222502 BH	375
	376	#ifdef CONFIG_ADB
	377	if (strstr(cmd_line, "adb_sync")) {
	378	extern int __adb_probe_sync;
	379	__adb_probe_sync = 1;
	380	}
	381	#endif /* CONFIG_ADB */
14cf11af PM	382	}
14cf11af PM	383
14cf11af	384	#ifdef CONFIG_SCSI
405861a0	385	void note_scsi_host(struct device_node node, void host)
14cf11af	386	{
14cf11af	387	}
9b6b563c	388	EXPORT_SYMBOL(note_scsi_host);
14cf11af PM	389	#endif
14cf11af PM	390
35499c01 PM	391	static int initializing = 1;
35499c01 PM	392
14cf11af PM	393	static int pmac_late_init(void)
	394	{
	395	initializing = 0;
d9333afd JB	396	/* this is udbg (which is __init) and we can later use it during
	397	* cpu hotplug (in smp_core99_kick_cpu) */
	398	ppc_md.progress = NULL;
14cf11af PM	399	return 0;
14cf11af PM	400	}
d518b717	401	machine_late_initcall(powermac, pmac_late_init);
14cf11af	402
d7418031 SR	403	/*
	404	* This is __init_refok because we check for "initializing" before
	405	* touching any of the __init sensitive things and "initializing"
	406	* will be false after __init time. This can't be __init because it
	407	* can be called whenever a disk is first accessed.
	408	*/
	409	void __init_refok note_bootable_part(dev_t dev, int part, int goodness)
14cf11af	410	{
14cf11af PM	411	char *p;
	412
	413	if (!initializing)
	414	return;
	415	if ((goodness <= current_root_goodness) &&
	416	ROOT_DEV != DEFAULT_ROOT_DEVICE)
	417	return;
b8757b21 ABL	418	p = strstr(boot_command_line, "root=");
b8757b21 ABL	419	if (p != NULL && (p == boot_command_line \|\| p[-1] == ' '))
14cf11af PM	420	return;
14cf11af PM	421
6ee0d9f7 PM	422	ROOT_DEV = dev + part;
6ee0d9f7 PM	423	current_root_goodness = goodness;
14cf11af PM	424	}
14cf11af PM	425
14cf11af	426	#ifdef CONFIG_ADB_CUDA
35499c01 PM	427	static void cuda_restart(void)
35499c01 PM	428	{
14cf11af	429	struct adb_request req;
14cf11af	430
35499c01 PM	431	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
	432	for (;;)
	433	cuda_poll();
	434	}
	435
	436	static void cuda_shutdown(void)
	437	{
	438	struct adb_request req;
	439
	440	cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
	441	for (;;)
	442	cuda_poll();
	443	}
	444
	445	#else
	446	#define cuda_restart()
	447	#define cuda_shutdown()
	448	#endif
	449
	450	#ifndef CONFIG_ADB_PMU
	451	#define pmu_restart()
	452	#define pmu_shutdown()
	453	#endif
	454
	455	#ifndef CONFIG_PMAC_SMU
	456	#define smu_restart()
	457	#define smu_shutdown()
	458	#endif
	459
	460	static void pmac_restart(char *cmd)
	461	{
14cf11af	462	switch (sys_ctrler) {
14cf11af	463	case SYS_CTRLER_CUDA:
35499c01	464	cuda_restart();
14cf11af	465	break;
14cf11af PM	466	case SYS_CTRLER_PMU:
	467	pmu_restart();
	468	break;
35499c01 PM	469	case SYS_CTRLER_SMU:
	470	smu_restart();
	471	break;
14cf11af PM	472	default: ;
	473	}
	474	}
	475
35499c01	476	static void pmac_power_off(void)
14cf11af	477	{
14cf11af	478	switch (sys_ctrler) {
14cf11af	479	case SYS_CTRLER_CUDA:
35499c01	480	cuda_shutdown();
14cf11af	481	break;
14cf11af PM	482	case SYS_CTRLER_PMU:
	483	pmu_shutdown();
	484	break;
35499c01 PM	485	case SYS_CTRLER_SMU:
	486	smu_shutdown();
	487	break;
14cf11af PM	488	default: ;
	489	}
	490	}
	491
	492	static void
	493	pmac_halt(void)
	494	{
	495	pmac_power_off();
	496	}
	497
35499c01 PM	498	/*
	499	* Early initialization.
	500	*/
	501	static void __init pmac_init_early(void)
	502	{
51d3082f BH	503	/* Enable early btext debug if requested */
	504	if (strstr(cmd_line, "btextdbg")) {
	505	udbg_adb_init_early();
	506	register_early_udbg_console();
35499c01 PM	507	}
35499c01 PM	508
51d3082f BH	509	/* Probe motherboard chipset */
	510	pmac_feature_init();
	511
51d3082f BH	512	/* Initialize debug stuff */
	513	udbg_scc_init(!!strstr(cmd_line, "sccdbg"));
	514	udbg_adb_init(!!strstr(cmd_line, "btextdbg"));
	515
	516	#ifdef CONFIG_PPC64
1beb6a7d	517	iommu_init_early_dart();
35499c01 PM	518	#endif
	519	}
	520
35499c01	521	static int __init pmac_declare_of_platform_devices(void)
14cf11af	522	{
a28d3af2	523	struct device_node *np;
14cf11af	524
e8222502 BH	525	if (machine_is(chrp))
	526	return -1;
	527
730745a5	528	np = of_find_node_by_name(NULL, "valkyrie");
35499c01 PM	529	if (np)
35499c01 PM	530	of_platform_device_create(np, "valkyrie", NULL);
730745a5	531	np = of_find_node_by_name(NULL, "platinum");
35499c01 PM	532	if (np)
35499c01 PM	533	of_platform_device_create(np, "platinum", NULL);
35499c01 PM	534	np = of_find_node_by_type(NULL, "smu");
	535	if (np) {
	536	of_platform_device_create(np, "smu", NULL);
	537	of_node_put(np);
	538	}
14cf11af PM	539
	540	return 0;
	541	}
d518b717	542	machine_device_initcall(powermac, pmac_declare_of_platform_devices);
35499c01 PM	543
	544	/*
	545	* Called very early, MMU is off, device-tree isn't unflattened
	546	*/
e8222502	547	static int __init pmac_probe(void)
35499c01	548	{
e8222502 BH	549	unsigned long root = of_get_flat_dt_root();
	550
	551	if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
	552	!of_flat_dt_is_compatible(root, "MacRISC"))
35499c01 PM	553	return 0;
35499c01 PM	554
e8222502	555	#ifdef CONFIG_PPC64
35499c01 PM	556	/*
	557	* On U3, the DART (iommu) must be allocated now since it
	558	* has an impact on htab_initialize (due to the large page it
	559	* occupies having to be broken up so the DART itself is not
	560	* part of the cacheable linar mapping
	561	*/
1beb6a7d	562	alloc_dart_table();
7d0daae4 ME	563
7d0daae4 ME	564	hpte_init_native();
35499c01 PM	565	#endif
35499c01 PM	566
e8222502 BH	567	#ifdef CONFIG_PPC32
e8222502 BH	568	/* isa_io_base gets set in pmac_pci_init */
e8222502 BH	569	ISA_DMA_THRESHOLD = ~0L;
	570	DMA_MODE_READ = 1;
	571	DMA_MODE_WRITE = 2;
e8222502 BH	572	#endif /* CONFIG_PPC32 */
e8222502 BH	573
35499c01 PM	574	#ifdef CONFIG_PMAC_SMU
	575	/*
	576	* SMU based G5s need some memory below 2Gb, at least the current
	577	* driver needs that. We have to allocate it now. We allocate 4k
	578	* (1 small page) for now.
	579	*/
	580	smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
	581	#endif /* CONFIG_PMAC_SMU */
	582
	583	return 1;
	584	}
	585
	586	#ifdef CONFIG_PPC64
51d3082f BH	587	/* Move that to pci.c */
51d3082f BH	588	static int pmac_pci_probe_mode(struct pci_bus *bus)
35499c01 PM	589	{
	590	struct device_node *node = bus->sysdata;
	591
	592	/* We need to use normal PCI probing for the AGP bus,
1beb6a7d	593	* since the device for the AGP bridge isn't in the tree.
444532d4	594	* Same for the PCIe host on U4 and the HT host bridge.
1beb6a7d	595	*/
55b61fec	596	if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") \|\|
444532d4 BH	597	of_device_is_compatible(node, "u4-pcie") \|\|
444532d4 BH	598	of_device_is_compatible(node, "u3-ht")))
35499c01	599	return PCI_PROBE_NORMAL;
35499c01 PM	600	return PCI_PROBE_DEVTREE;
35499c01 PM	601	}
d9333afd JB	602
	603	#ifdef CONFIG_HOTPLUG_CPU
	604	/* access per cpu vars from generic smp.c */
	605	DECLARE_PER_CPU(int, cpu_state);
	606
	607	static void pmac_cpu_die(void)
	608	{
	609	/*
	610	* turn off as much as possible, we'll be
	611	* kicked out as this will only be invoked
	612	* on core99 platforms for now ...
	613	*/
	614
	615	printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
	616	__get_cpu_var(cpu_state) = CPU_DEAD;
	617	smp_wmb();
	618
	619	/*
	620	* during the path that leads here preemption is disabled,
	621	* reenable it now so that when coming up preempt count is
	622	* zero correctly
	623	*/
	624	preempt_enable();
	625
	626	/*
	627	* hard-disable interrupts for the non-NAP case, the NAP code
	628	* needs to re-enable interrupts (but soft-disables them)
	629	*/
	630	hard_irq_disable();
	631
	632	while (1) {
	633	/* let's not take timer interrupts too often ... */
	634	set_dec(0x7fffffff);
	635
	636	/* should always be true at this point */
	637	if (cpu_has_feature(CPU_FTR_CAN_NAP))
	638	power4_cpu_offline_powersave();
	639	else {
	640	HMT_low();
	641	HMT_very_low();
	642	}
	643	}
	644	}
	645	#endif /* CONFIG_HOTPLUG_CPU */
	646
	647	#endif /* CONFIG_PPC64 */
35499c01	648
e8222502 BH	649	define_machine(powermac) {
e8222502 BH	650	.name = "PowerMac",
35499c01 PM	651	.probe = pmac_probe,
	652	.setup_arch = pmac_setup_arch,
	653	.init_early = pmac_init_early,
	654	.show_cpuinfo = pmac_show_cpuinfo,
35499c01	655	.init_IRQ = pmac_pic_init,
cc5d0189	656	.get_irq = NULL, /* changed later */
f90bb153	657	.pci_irq_fixup = pmac_pci_irq_fixup,
35499c01 PM	658	.restart = pmac_restart,
	659	.power_off = pmac_power_off,
	660	.halt = pmac_halt,
	661	.time_init = pmac_time_init,
	662	.get_boot_time = pmac_get_boot_time,
	663	.set_rtc_time = pmac_set_rtc_time,
	664	.get_rtc_time = pmac_get_rtc_time,
	665	.calibrate_decr = pmac_calibrate_decr,
	666	.feature_call = pmac_do_feature_call,
be6b8439	667	.progress = udbg_progress,
35499c01	668	#ifdef CONFIG_PPC64
51d3082f	669	.pci_probe_mode = pmac_pci_probe_mode,
a0652fc9	670	.power_save = power4_idle,
35499c01	671	.enable_pmcs = power4_enable_pmcs,
3d1229d6 ME	672	#ifdef CONFIG_KEXEC
	673	.machine_kexec = default_machine_kexec,
	674	.machine_kexec_prepare = default_machine_kexec_prepare,
cc532915	675	.machine_crash_shutdown = default_machine_crash_shutdown,
35499c01	676	#endif
3d1229d6	677	#endif /* CONFIG_PPC64 */
35499c01 PM	678	#ifdef CONFIG_PPC32
	679	.pcibios_enable_device_hook = pmac_pci_enable_device_hook,
	680	.pcibios_after_init = pmac_pcibios_after_init,
	681	.phys_mem_access_prot = pci_phys_mem_access_prot,
	682	#endif
e8222502	683	#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
d9333afd	684	.cpu_die = pmac_cpu_die,
e8222502	685	#endif
35499c01	686	};