Merge tag 'renesas-fixes-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / arch / powerpc / platforms / powermac / low_i2c.c
CommitLineData
14cf11af 1/*
730745a5 2 * arch/powerpc/platforms/powermac/low_i2c.c
14cf11af 3 *
730745a5 4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
14cf11af
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5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
730745a5
BH
11 * The linux i2c layer isn't completely suitable for our needs for various
12 * reasons ranging from too late initialisation to semantics not perfectly
13 * matching some requirements of the apple platform functions etc...
14 *
15 * This file thus provides a simple low level unified i2c interface for
16 * powermac that covers the various types of i2c busses used in Apple machines.
17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
027dfac6 18 * banging busses found on older chipsets in earlier machines if we ever need
730745a5
BH
19 * one of them.
20 *
21 * The drivers in this file are synchronous/blocking. In addition, the
22 * keywest one is fairly slow due to the use of msleep instead of interrupts
23 * as the interrupt is currently used by i2c-keywest. In the long run, we
24 * might want to get rid of those high-level interfaces to linux i2c layer
25 * either completely (converting all drivers) or replacing them all with a
26 * single stub driver on top of this one. Once done, the interrupt will be
27 * available for our use.
14cf11af
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28 */
29
30#undef DEBUG
730745a5 31#undef DEBUG_LOW
14cf11af 32
14cf11af
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33#include <linux/types.h>
34#include <linux/sched.h>
35#include <linux/init.h>
4b16f8e2 36#include <linux/export.h>
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37#include <linux/adb.h>
38#include <linux/pmu.h>
730745a5
BH
39#include <linux/delay.h>
40#include <linux/completion.h>
a28d3af2
BH
41#include <linux/platform_device.h>
42#include <linux/interrupt.h>
a28d3af2 43#include <linux/timer.h>
76a5b8bb 44#include <linux/mutex.h>
6dfa5ca3 45#include <linux/i2c.h>
5a0e3ad6 46#include <linux/slab.h>
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47#include <asm/keylargo.h>
48#include <asm/uninorth.h>
49#include <asm/io.h>
50#include <asm/prom.h>
51#include <asm/machdep.h>
730745a5 52#include <asm/smu.h>
5b9ca526 53#include <asm/pmac_pfunc.h>
14cf11af
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54#include <asm/pmac_low_i2c.h>
55
14cf11af
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56#ifdef DEBUG
57#define DBG(x...) do {\
51d3082f 58 printk(KERN_DEBUG "low_i2c:" x); \
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59 } while(0)
60#else
61#define DBG(x...)
62#endif
63
730745a5
BH
64#ifdef DEBUG_LOW
65#define DBG_LOW(x...) do {\
66 printk(KERN_DEBUG "low_i2c:" x); \
67 } while(0)
68#else
69#define DBG_LOW(x...)
70#endif
14cf11af 71
a28d3af2
BH
72
73static int pmac_i2c_force_poll = 1;
74
730745a5
BH
75/*
76 * A bus structure. Each bus in the system has such a structure associated.
14cf11af 77 */
730745a5 78struct pmac_i2c_bus
14cf11af 79{
730745a5
BH
80 struct list_head link;
81 struct device_node *controller;
82 struct device_node *busnode;
83 int type;
84 int flags;
6dfa5ca3 85 struct i2c_adapter adapter;
730745a5
BH
86 void *hostdata;
87 int channel; /* some hosts have multiple */
88 int mode; /* current mode */
76a5b8bb 89 struct mutex mutex;
730745a5
BH
90 int opened;
91 int polled; /* open mode */
a28d3af2 92 struct platform_device *platform_dev;
9e607f72 93 struct lock_class_key lock_key;
730745a5
BH
94
95 /* ops */
96 int (*open)(struct pmac_i2c_bus *bus);
97 void (*close)(struct pmac_i2c_bus *bus);
98 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
99 u32 subaddr, u8 *data, int len);
100};
14cf11af 101
730745a5 102static LIST_HEAD(pmac_i2c_busses);
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103
104/*
730745a5 105 * Keywest implementation
14cf11af
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106 */
107
730745a5
BH
108struct pmac_i2c_host_kw
109{
76a5b8bb 110 struct mutex mutex; /* Access mutex for use by
730745a5
BH
111 * i2c-keywest */
112 void __iomem *base; /* register base address */
113 int bsteps; /* register stepping */
114 int speed; /* speed */
a28d3af2
BH
115 int irq;
116 u8 *data;
117 unsigned len;
118 int state;
119 int rw;
120 int polled;
121 int result;
122 struct completion complete;
123 spinlock_t lock;
124 struct timer_list timeout_timer;
730745a5
BH
125};
126
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127/* Register indices */
128typedef enum {
129 reg_mode = 0,
130 reg_control,
131 reg_status,
132 reg_isr,
133 reg_ier,
134 reg_addr,
135 reg_subaddr,
136 reg_data
137} reg_t;
138
a28d3af2
BH
139/* The Tumbler audio equalizer can be really slow sometimes */
140#define KW_POLL_TIMEOUT (2*HZ)
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141
142/* Mode register */
143#define KW_I2C_MODE_100KHZ 0x00
144#define KW_I2C_MODE_50KHZ 0x01
145#define KW_I2C_MODE_25KHZ 0x02
146#define KW_I2C_MODE_DUMB 0x00
147#define KW_I2C_MODE_STANDARD 0x04
148#define KW_I2C_MODE_STANDARDSUB 0x08
149#define KW_I2C_MODE_COMBINED 0x0C
150#define KW_I2C_MODE_MODE_MASK 0x0C
151#define KW_I2C_MODE_CHAN_MASK 0xF0
152
153/* Control register */
154#define KW_I2C_CTL_AAK 0x01
155#define KW_I2C_CTL_XADDR 0x02
156#define KW_I2C_CTL_STOP 0x04
157#define KW_I2C_CTL_START 0x08
158
159/* Status register */
160#define KW_I2C_STAT_BUSY 0x01
161#define KW_I2C_STAT_LAST_AAK 0x02
162#define KW_I2C_STAT_LAST_RW 0x04
163#define KW_I2C_STAT_SDA 0x08
164#define KW_I2C_STAT_SCL 0x10
165
166/* IER & ISR registers */
167#define KW_I2C_IRQ_DATA 0x01
168#define KW_I2C_IRQ_ADDR 0x02
169#define KW_I2C_IRQ_STOP 0x04
170#define KW_I2C_IRQ_START 0x08
171#define KW_I2C_IRQ_MASK 0x0F
172
173/* State machine states */
174enum {
175 state_idle,
176 state_addr,
177 state_read,
178 state_write,
179 state_stop,
180 state_dead
181};
182
183#define WRONG_STATE(name) do {\
a28d3af2
BH
184 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
185 "(isr: %02x)\n", \
186 name, __kw_state_names[host->state], isr); \
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187 } while(0)
188
189static const char *__kw_state_names[] = {
190 "state_idle",
191 "state_addr",
192 "state_read",
193 "state_write",
194 "state_stop",
195 "state_dead"
196};
197
a28d3af2 198static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
14cf11af
PM
199{
200 return readb(host->base + (((unsigned int)reg) << host->bsteps));
201}
202
a28d3af2
BH
203static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
204 reg_t reg, u8 val)
14cf11af
PM
205{
206 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
a28d3af2 207 (void)__kw_read_reg(host, reg_subaddr);
14cf11af
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208}
209
a28d3af2
BH
210#define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
211#define kw_read_reg(reg) __kw_read_reg(host, reg)
14cf11af 212
a28d3af2 213static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
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214{
215 int i, j;
216 u8 isr;
217
730745a5 218 for (i = 0; i < 1000; i++) {
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219 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
220 if (isr != 0)
221 return isr;
222
223 /* This code is used with the timebase frozen, we cannot rely
730745a5
BH
224 * on udelay nor schedule when in polled mode !
225 * For now, just use a bogus loop....
14cf11af 226 */
a28d3af2
BH
227 if (host->polled) {
228 for (j = 1; j < 100000; j++)
730745a5
BH
229 mb();
230 } else
231 msleep(1);
14cf11af
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232 }
233 return isr;
234}
235
60162e49
BH
236static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
237{
238 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
239 host->state = state_stop;
240 host->result = result;
241}
242
243
a28d3af2 244static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
14cf11af
PM
245{
246 u8 ack;
247
730745a5 248 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
a28d3af2
BH
249 __kw_state_names[host->state], isr);
250
251 if (host->state == state_idle) {
252 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
253 " interrupt, ignoring\n");
254 kw_write_reg(reg_isr, isr);
255 return;
256 }
14cf11af
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257
258 if (isr == 0) {
60162e49
BH
259 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
260 " on keywest !\n");
a28d3af2 261 if (host->state != state_stop) {
60162e49
BH
262 kw_i2c_do_stop(host, -EIO);
263 return;
14cf11af 264 }
60162e49
BH
265 ack = kw_read_reg(reg_status);
266 if (ack & KW_I2C_STAT_BUSY)
267 kw_write_reg(reg_status, 0);
268 host->state = state_idle;
269 kw_write_reg(reg_ier, 0x00);
270 if (!host->polled)
271 complete(&host->complete);
a28d3af2 272 return;
14cf11af
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273 }
274
275 if (isr & KW_I2C_IRQ_ADDR) {
276 ack = kw_read_reg(reg_status);
a28d3af2 277 if (host->state != state_addr) {
14cf11af 278 WRONG_STATE("KW_I2C_IRQ_ADDR");
60162e49 279 kw_i2c_do_stop(host, -EIO);
14cf11af 280 }
730745a5 281 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
60162e49 282 host->result = -ENXIO;
a28d3af2 283 host->state = state_stop;
60162e49 284 DBG_LOW("KW: NAK on address\n");
14cf11af 285 } else {
60162e49
BH
286 if (host->len == 0)
287 kw_i2c_do_stop(host, 0);
288 else if (host->rw) {
a28d3af2
BH
289 host->state = state_read;
290 if (host->len > 1)
730745a5
BH
291 kw_write_reg(reg_control,
292 KW_I2C_CTL_AAK);
14cf11af 293 } else {
a28d3af2
BH
294 host->state = state_write;
295 kw_write_reg(reg_data, *(host->data++));
296 host->len--;
14cf11af
PM
297 }
298 }
299 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
300 }
301
302 if (isr & KW_I2C_IRQ_DATA) {
a28d3af2
BH
303 if (host->state == state_read) {
304 *(host->data++) = kw_read_reg(reg_data);
305 host->len--;
14cf11af 306 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
a28d3af2
BH
307 if (host->len == 0)
308 host->state = state_stop;
309 else if (host->len == 1)
14cf11af 310 kw_write_reg(reg_control, 0);
a28d3af2 311 } else if (host->state == state_write) {
14cf11af
PM
312 ack = kw_read_reg(reg_status);
313 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
730745a5 314 DBG_LOW("KW: nack on data write\n");
60162e49
BH
315 host->result = -EFBIG;
316 host->state = state_stop;
a28d3af2
BH
317 } else if (host->len) {
318 kw_write_reg(reg_data, *(host->data++));
319 host->len--;
60162e49
BH
320 } else
321 kw_i2c_do_stop(host, 0);
14cf11af 322 } else {
14cf11af 323 WRONG_STATE("KW_I2C_IRQ_DATA");
60162e49
BH
324 if (host->state != state_stop)
325 kw_i2c_do_stop(host, -EIO);
14cf11af 326 }
60162e49 327 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
14cf11af
PM
328 }
329
330 if (isr & KW_I2C_IRQ_STOP) {
331 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
a28d3af2 332 if (host->state != state_stop) {
14cf11af 333 WRONG_STATE("KW_I2C_IRQ_STOP");
a28d3af2 334 host->result = -EIO;
14cf11af 335 }
a28d3af2
BH
336 host->state = state_idle;
337 if (!host->polled)
338 complete(&host->complete);
14cf11af
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339 }
340
60162e49 341 /* Below should only happen in manual mode which we don't use ... */
14cf11af
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342 if (isr & KW_I2C_IRQ_START)
343 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
344
a28d3af2
BH
345}
346
347/* Interrupt handler */
7d12e780 348static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
a28d3af2
BH
349{
350 struct pmac_i2c_host_kw *host = dev_id;
351 unsigned long flags;
352
353 spin_lock_irqsave(&host->lock, flags);
354 del_timer(&host->timeout_timer);
355 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
356 if (host->state != state_idle) {
357 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
358 add_timer(&host->timeout_timer);
359 }
360 spin_unlock_irqrestore(&host->lock, flags);
361 return IRQ_HANDLED;
362}
363
e99e88a9 364static void kw_i2c_timeout(struct timer_list *t)
a28d3af2 365{
e99e88a9 366 struct pmac_i2c_host_kw *host = from_timer(host, t, timeout_timer);
a28d3af2
BH
367 unsigned long flags;
368
369 spin_lock_irqsave(&host->lock, flags);
3027691e
BH
370
371 /*
372 * If the timer is pending, that means we raced with the
373 * irq, in which case we just return
374 */
375 if (timer_pending(&host->timeout_timer))
376 goto skip;
377
a28d3af2
BH
378 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
379 if (host->state != state_idle) {
380 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
381 add_timer(&host->timeout_timer);
382 }
3027691e 383 skip:
a28d3af2 384 spin_unlock_irqrestore(&host->lock, flags);
14cf11af
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385}
386
730745a5 387static int kw_i2c_open(struct pmac_i2c_bus *bus)
14cf11af 388{
730745a5 389 struct pmac_i2c_host_kw *host = bus->hostdata;
76a5b8bb 390 mutex_lock(&host->mutex);
730745a5
BH
391 return 0;
392}
393
394static void kw_i2c_close(struct pmac_i2c_bus *bus)
395{
396 struct pmac_i2c_host_kw *host = bus->hostdata;
76a5b8bb 397 mutex_unlock(&host->mutex);
730745a5
BH
398}
399
400static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
401 u32 subaddr, u8 *data, int len)
402{
403 struct pmac_i2c_host_kw *host = bus->hostdata;
14cf11af 404 u8 mode_reg = host->speed;
ef24ba70 405 int use_irq = host->irq && !bus->polled;
14cf11af
PM
406
407 /* Setup mode & subaddress if any */
730745a5
BH
408 switch(bus->mode) {
409 case pmac_i2c_mode_dumb:
14cf11af 410 return -EINVAL;
730745a5 411 case pmac_i2c_mode_std:
14cf11af 412 mode_reg |= KW_I2C_MODE_STANDARD;
730745a5
BH
413 if (subsize != 0)
414 return -EINVAL;
14cf11af 415 break;
730745a5 416 case pmac_i2c_mode_stdsub:
14cf11af 417 mode_reg |= KW_I2C_MODE_STANDARDSUB;
730745a5
BH
418 if (subsize != 1)
419 return -EINVAL;
14cf11af 420 break;
730745a5 421 case pmac_i2c_mode_combined:
14cf11af 422 mode_reg |= KW_I2C_MODE_COMBINED;
730745a5
BH
423 if (subsize != 1)
424 return -EINVAL;
14cf11af
PM
425 break;
426 }
427
428 /* Setup channel & clear pending irqs */
429 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
730745a5 430 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
14cf11af
PM
431 kw_write_reg(reg_status, 0);
432
730745a5
BH
433 /* Set up address and r/w bit, strip possible stale bus number from
434 * address top bits
435 */
436 kw_write_reg(reg_addr, addrdir & 0xff);
14cf11af
PM
437
438 /* Set up the sub address */
439 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
440 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
441 kw_write_reg(reg_subaddr, subaddr);
442
a28d3af2
BH
443 /* Prepare for async operations */
444 host->data = data;
445 host->len = len;
446 host->state = state_addr;
447 host->result = 0;
448 host->rw = (addrdir & 1);
449 host->polled = bus->polled;
450
451 /* Enable interrupt if not using polled mode and interrupt is
452 * available
453 */
454 if (use_irq) {
455 /* Clear completion */
16735d02 456 reinit_completion(&host->complete);
a28d3af2
BH
457 /* Ack stale interrupts */
458 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
459 /* Arm timeout */
460 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
461 add_timer(&host->timeout_timer);
462 /* Enable emission */
463 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
464 }
465
466 /* Start sending address */
14cf11af
PM
467 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
468
a28d3af2
BH
469 /* Wait for completion */
470 if (use_irq)
471 wait_for_completion(&host->complete);
472 else {
473 while(host->state != state_idle) {
474 unsigned long flags;
475
476 u8 isr = kw_i2c_wait_interrupt(host);
477 spin_lock_irqsave(&host->lock, flags);
478 kw_i2c_handle_interrupt(host, isr);
479 spin_unlock_irqrestore(&host->lock, flags);
480 }
14cf11af
PM
481 }
482
a28d3af2
BH
483 /* Disable emission */
484 kw_write_reg(reg_ier, 0);
485
486 return host->result;
14cf11af
PM
487}
488
730745a5 489static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
14cf11af 490{
730745a5 491 struct pmac_i2c_host_kw *host;
018a3d1d
JK
492 const u32 *psteps, *prate, *addrp;
493 u32 steps;
14cf11af 494
a0828cf5 495 host = kzalloc(sizeof(*host), GFP_KERNEL);
14cf11af 496 if (host == NULL) {
b7c670d6
RH
497 printk(KERN_ERR "low_i2c: Can't allocate host for %pOF\n",
498 np);
730745a5 499 return NULL;
14cf11af 500 }
14cf11af 501
51d3082f
BH
502 /* Apple is kind enough to provide a valid AAPL,address property
503 * on all i2c keywest nodes so far ... we would have to fallback
504 * to macio parsing if that wasn't the case
505 */
e2eb6392 506 addrp = of_get_property(np, "AAPL,address", NULL);
51d3082f 507 if (addrp == NULL) {
b7c670d6
RH
508 printk(KERN_ERR "low_i2c: Can't find address for %pOF\n",
509 np);
730745a5
BH
510 kfree(host);
511 return NULL;
51d3082f 512 }
76a5b8bb 513 mutex_init(&host->mutex);
a28d3af2
BH
514 init_completion(&host->complete);
515 spin_lock_init(&host->lock);
e99e88a9 516 timer_setup(&host->timeout_timer, kw_i2c_timeout, 0);
a28d3af2 517
e2eb6392 518 psteps = of_get_property(np, "AAPL,address-step", NULL);
14cf11af
PM
519 steps = psteps ? (*psteps) : 0x10;
520 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
521 steps >>= 1;
14cf11af 522 /* Select interface rate */
51d3082f 523 host->speed = KW_I2C_MODE_25KHZ;
e2eb6392 524 prate = of_get_property(np, "AAPL,i2c-rate", NULL);
14cf11af
PM
525 if (prate) switch(*prate) {
526 case 100:
527 host->speed = KW_I2C_MODE_100KHZ;
528 break;
529 case 50:
530 host->speed = KW_I2C_MODE_50KHZ;
531 break;
532 case 25:
533 host->speed = KW_I2C_MODE_25KHZ;
534 break;
535 }
0ebfff14 536 host->irq = irq_of_parse_and_map(np, 0);
ef24ba70 537 if (!host->irq)
0ebfff14 538 printk(KERN_WARNING
b7c670d6
RH
539 "low_i2c: Failed to map interrupt for %pOF\n",
540 np);
14cf11af 541
51d3082f 542 host->base = ioremap((*addrp), 0x1000);
a28d3af2 543 if (host->base == NULL) {
b7c670d6
RH
544 printk(KERN_ERR "low_i2c: Can't map registers for %pOF\n",
545 np);
a28d3af2
BH
546 kfree(host);
547 return NULL;
548 }
549
60162e49 550 /* Make sure IRQ is disabled */
a28d3af2
BH
551 kw_write_reg(reg_ier, 0);
552
ba461f09 553 /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
11a50873
BH
554 * want that interrupt disabled between the 2 passes of driver
555 * suspend or we'll have issues running the pfuncs
556 */
ba461f09
IC
557 if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
558 "keywest i2c", host))
ef24ba70 559 host->irq = 0;
a28d3af2 560
b7c670d6
RH
561 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %pOF\n",
562 *addrp, host->irq, np);
730745a5
BH
563
564 return host;
14cf11af
PM
565}
566
730745a5
BH
567
568static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
569 struct device_node *controller,
570 struct device_node *busnode,
571 int channel)
572{
573 struct pmac_i2c_bus *bus;
574
575 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
576 if (bus == NULL)
577 return;
578
579 bus->controller = of_node_get(controller);
580 bus->busnode = of_node_get(busnode);
581 bus->type = pmac_i2c_bus_keywest;
582 bus->hostdata = host;
583 bus->channel = channel;
584 bus->mode = pmac_i2c_mode_std;
585 bus->open = kw_i2c_open;
586 bus->close = kw_i2c_close;
587 bus->xfer = kw_i2c_xfer;
76a5b8bb 588 mutex_init(&bus->mutex);
9e607f72 589 lockdep_set_class(&bus->mutex, &bus->lock_key);
730745a5
BH
590 if (controller == busnode)
591 bus->flags = pmac_i2c_multibus;
592 list_add(&bus->link, &pmac_i2c_busses);
593
594 printk(KERN_INFO " channel %d bus %s\n", channel,
595 (controller == busnode) ? "<multibus>" : busnode->full_name);
596}
597
598static void __init kw_i2c_probe(void)
599{
600 struct device_node *np, *child, *parent;
601
602 /* Probe keywest-i2c busses */
dc2e4258 603 for_each_compatible_node(np, "i2c","keywest-i2c") {
730745a5 604 struct pmac_i2c_host_kw *host;
213972e9 605 int multibus;
730745a5
BH
606
607 /* Found one, init a host structure */
608 host = kw_i2c_host_init(np);
609 if (host == NULL)
610 continue;
611
612 /* Now check if we have a multibus setup (old style) or if we
613 * have proper bus nodes. Note that the "new" way (proper bus
614 * nodes) might cause us to not create some busses that are
615 * kept hidden in the device-tree. In the future, we might
616 * want to work around that by creating busses without a node
617 * but not for now
618 */
619 child = of_get_next_child(np, NULL);
2c8e65b5 620 multibus = !of_node_name_eq(child, "i2c-bus");
730745a5
BH
621 of_node_put(child);
622
623 /* For a multibus setup, we get the bus count based on the
624 * parent type
625 */
626 if (multibus) {
213972e9 627 int chans, i;
628
730745a5
BH
629 parent = of_get_parent(np);
630 if (parent == NULL)
631 continue;
632 chans = parent->name[0] == 'u' ? 2 : 1;
633 for (i = 0; i < chans; i++)
634 kw_i2c_add(host, np, np, i);
635 } else {
636 for (child = NULL;
637 (child = of_get_next_child(np, child)) != NULL;) {
e2eb6392 638 const u32 *reg = of_get_property(child,
018a3d1d 639 "reg", NULL);
730745a5
BH
640 if (reg == NULL)
641 continue;
642 kw_i2c_add(host, np, child, *reg);
643 }
644 }
645 }
646}
647
648
14cf11af
PM
649/*
650 *
651 * PMU implementation
652 *
653 */
654
14cf11af
PM
655#ifdef CONFIG_ADB_PMU
656
730745a5
BH
657/*
658 * i2c command block to the PMU
659 */
660struct pmu_i2c_hdr {
661 u8 bus;
662 u8 mode;
663 u8 bus2;
664 u8 address;
665 u8 sub_addr;
666 u8 comb_addr;
667 u8 count;
668 u8 data[];
669};
670
671static void pmu_i2c_complete(struct adb_request *req)
14cf11af 672{
730745a5 673 complete(req->arg);
14cf11af
PM
674}
675
730745a5
BH
676static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
677 u32 subaddr, u8 *data, int len)
14cf11af 678{
730745a5
BH
679 struct adb_request *req = bus->hostdata;
680 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
681 struct completion comp;
682 int read = addrdir & 1;
683 int retry;
684 int rc = 0;
14cf11af 685
730745a5
BH
686 /* For now, limit ourselves to 16 bytes transfers */
687 if (len > 16)
688 return -EINVAL;
689
690 init_completion(&comp);
691
692 for (retry = 0; retry < 16; retry++) {
693 memset(req, 0, sizeof(struct adb_request));
694 hdr->bus = bus->channel;
695 hdr->count = len;
696
697 switch(bus->mode) {
698 case pmac_i2c_mode_std:
699 if (subsize != 0)
700 return -EINVAL;
701 hdr->address = addrdir;
702 hdr->mode = PMU_I2C_MODE_SIMPLE;
703 break;
704 case pmac_i2c_mode_stdsub:
705 case pmac_i2c_mode_combined:
706 if (subsize != 1)
707 return -EINVAL;
708 hdr->address = addrdir & 0xfe;
709 hdr->comb_addr = addrdir;
710 hdr->sub_addr = subaddr;
711 if (bus->mode == pmac_i2c_mode_stdsub)
712 hdr->mode = PMU_I2C_MODE_STDSUB;
713 else
714 hdr->mode = PMU_I2C_MODE_COMBINED;
715 break;
716 default:
717 return -EINVAL;
718 }
719
16735d02 720 reinit_completion(&comp);
730745a5
BH
721 req->data[0] = PMU_I2C_CMD;
722 req->reply[0] = 0xff;
723 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
724 req->done = pmu_i2c_complete;
725 req->arg = &comp;
a28d3af2 726 if (!read && len) {
730745a5
BH
727 memcpy(hdr->data, data, len);
728 req->nbytes += len;
729 }
730 rc = pmu_queue_request(req);
731 if (rc)
732 return rc;
733 wait_for_completion(&comp);
734 if (req->reply[0] == PMU_I2C_STATUS_OK)
735 break;
736 msleep(15);
14cf11af 737 }
730745a5
BH
738 if (req->reply[0] != PMU_I2C_STATUS_OK)
739 return -EIO;
14cf11af 740
730745a5
BH
741 for (retry = 0; retry < 16; retry++) {
742 memset(req, 0, sizeof(struct adb_request));
743
744 /* I know that looks like a lot, slow as hell, but darwin
745 * does it so let's be on the safe side for now
746 */
747 msleep(15);
748
749 hdr->bus = PMU_I2C_BUS_STATUS;
750
16735d02 751 reinit_completion(&comp);
730745a5
BH
752 req->data[0] = PMU_I2C_CMD;
753 req->reply[0] = 0xff;
754 req->nbytes = 2;
755 req->done = pmu_i2c_complete;
756 req->arg = &comp;
757 rc = pmu_queue_request(req);
758 if (rc)
759 return rc;
760 wait_for_completion(&comp);
761
762 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
763 return 0;
764 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
765 int rlen = req->reply_len - 1;
766
767 if (rlen != len) {
768 printk(KERN_WARNING "low_i2c: PMU returned %d"
769 " bytes, expected %d !\n", rlen, len);
770 return -EIO;
771 }
a28d3af2
BH
772 if (len)
773 memcpy(data, &req->reply[1], len);
730745a5
BH
774 return 0;
775 }
776 }
777 return -EIO;
778}
779
780static void __init pmu_i2c_probe(void)
781{
782 struct pmac_i2c_bus *bus;
783 struct device_node *busnode;
784 int channel, sz;
785
786 if (!pmu_present())
787 return;
788
789 /* There might or might not be a "pmu-i2c" node, we use that
790 * or via-pmu itself, whatever we find. I haven't seen a machine
791 * with separate bus nodes, so we assume a multibus setup
792 */
793 busnode = of_find_node_by_name(NULL, "pmu-i2c");
794 if (busnode == NULL)
795 busnode = of_find_node_by_name(NULL, "via-pmu");
796 if (busnode == NULL)
797 return;
798
b7c670d6 799 printk(KERN_INFO "PMU i2c %pOF\n", busnode);
730745a5
BH
800
801 /*
802 * We add bus 1 and 2 only for now, bus 0 is "special"
803 */
804 for (channel = 1; channel <= 2; channel++) {
805 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
806 bus = kzalloc(sz, GFP_KERNEL);
807 if (bus == NULL)
808 return;
809
810 bus->controller = busnode;
811 bus->busnode = busnode;
812 bus->type = pmac_i2c_bus_pmu;
813 bus->channel = channel;
814 bus->mode = pmac_i2c_mode_std;
815 bus->hostdata = bus + 1;
816 bus->xfer = pmu_i2c_xfer;
76a5b8bb 817 mutex_init(&bus->mutex);
9e607f72 818 lockdep_set_class(&bus->mutex, &bus->lock_key);
730745a5
BH
819 bus->flags = pmac_i2c_multibus;
820 list_add(&bus->link, &pmac_i2c_busses);
821
822 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
823 }
14cf11af
PM
824}
825
826#endif /* CONFIG_ADB_PMU */
827
730745a5
BH
828
829/*
830 *
831 * SMU implementation
832 *
833 */
834
835#ifdef CONFIG_PMAC_SMU
836
837static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
14cf11af 838{
730745a5
BH
839 complete(misc);
840}
14cf11af 841
730745a5
BH
842static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
843 u32 subaddr, u8 *data, int len)
844{
845 struct smu_i2c_cmd *cmd = bus->hostdata;
846 struct completion comp;
847 int read = addrdir & 1;
848 int rc = 0;
849
a28d3af2
BH
850 if ((read && len > SMU_I2C_READ_MAX) ||
851 ((!read) && len > SMU_I2C_WRITE_MAX))
852 return -EINVAL;
853
730745a5
BH
854 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
855 cmd->info.bus = bus->channel;
856 cmd->info.devaddr = addrdir;
857 cmd->info.datalen = len;
858
859 switch(bus->mode) {
860 case pmac_i2c_mode_std:
861 if (subsize != 0)
862 return -EINVAL;
863 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
864 break;
865 case pmac_i2c_mode_stdsub:
866 case pmac_i2c_mode_combined:
867 if (subsize > 3 || subsize < 1)
868 return -EINVAL;
869 cmd->info.sublen = subsize;
870 /* that's big-endian only but heh ! */
871 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
872 subsize);
873 if (bus->mode == pmac_i2c_mode_stdsub)
874 cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
875 else
876 cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
877 break;
878 default:
879 return -EINVAL;
14cf11af 880 }
a28d3af2 881 if (!read && len)
730745a5
BH
882 memcpy(cmd->info.data, data, len);
883
884 init_completion(&comp);
885 cmd->done = smu_i2c_complete;
886 cmd->misc = &comp;
887 rc = smu_queue_i2c(cmd);
888 if (rc < 0)
889 return rc;
890 wait_for_completion(&comp);
891 rc = cmd->status;
892
a28d3af2 893 if (read && len)
730745a5
BH
894 memcpy(data, cmd->info.data, len);
895 return rc < 0 ? rc : 0;
896}
14cf11af 897
730745a5
BH
898static void __init smu_i2c_probe(void)
899{
900 struct device_node *controller, *busnode;
901 struct pmac_i2c_bus *bus;
018a3d1d 902 const u32 *reg;
730745a5
BH
903 int sz;
904
905 if (!smu_present())
906 return;
907
a28d3af2 908 controller = of_find_node_by_name(NULL, "smu-i2c-control");
730745a5
BH
909 if (controller == NULL)
910 controller = of_find_node_by_name(NULL, "smu");
911 if (controller == NULL)
912 return;
913
b7c670d6 914 printk(KERN_INFO "SMU i2c %pOF\n", controller);
730745a5
BH
915
916 /* Look for childs, note that they might not be of the right
25985edc 917 * type as older device trees mix i2c busses and other things
730745a5
BH
918 * at the same level
919 */
e5480bdc
RH
920 for_each_child_of_node(controller, busnode) {
921 if (!of_node_is_type(busnode, "i2c") &&
922 !of_node_is_type(busnode, "i2c-bus"))
730745a5 923 continue;
e2eb6392 924 reg = of_get_property(busnode, "reg", NULL);
730745a5
BH
925 if (reg == NULL)
926 continue;
927
928 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
929 bus = kzalloc(sz, GFP_KERNEL);
930 if (bus == NULL)
931 return;
932
933 bus->controller = controller;
934 bus->busnode = of_node_get(busnode);
935 bus->type = pmac_i2c_bus_smu;
936 bus->channel = *reg;
937 bus->mode = pmac_i2c_mode_std;
938 bus->hostdata = bus + 1;
939 bus->xfer = smu_i2c_xfer;
76a5b8bb 940 mutex_init(&bus->mutex);
9e607f72 941 lockdep_set_class(&bus->mutex, &bus->lock_key);
730745a5
BH
942 bus->flags = 0;
943 list_add(&bus->link, &pmac_i2c_busses);
944
b7c670d6
RH
945 printk(KERN_INFO " channel %x bus %pOF\n",
946 bus->channel, busnode);
730745a5
BH
947 }
948}
949
950#endif /* CONFIG_PMAC_SMU */
951
952/*
953 *
954 * Core code
955 *
956 */
957
958
959struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
960{
961 struct device_node *p = of_node_get(node);
962 struct device_node *prev = NULL;
963 struct pmac_i2c_bus *bus;
964
965 while(p) {
966 list_for_each_entry(bus, &pmac_i2c_busses, link) {
967 if (p == bus->busnode) {
968 if (prev && bus->flags & pmac_i2c_multibus) {
018a3d1d 969 const u32 *reg;
e2eb6392
SR
970 reg = of_get_property(prev, "reg",
971 NULL);
730745a5
BH
972 if (!reg)
973 continue;
974 if (((*reg) >> 8) != bus->channel)
975 continue;
976 }
977 of_node_put(p);
978 of_node_put(prev);
979 return bus;
980 }
981 }
982 of_node_put(prev);
983 prev = p;
984 p = of_get_parent(p);
985 }
986 return NULL;
987}
988EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
989
990u8 pmac_i2c_get_dev_addr(struct device_node *device)
991{
e2eb6392 992 const u32 *reg = of_get_property(device, "reg", NULL);
730745a5
BH
993
994 if (reg == NULL)
995 return 0;
996
997 return (*reg) & 0xff;
998}
999EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
1000
1001struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
1002{
1003 return bus->controller;
1004}
1005EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
1006
1007struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
1008{
1009 return bus->busnode;
1010}
1011EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1012
1013int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1014{
1015 return bus->type;
1016}
1017EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1018
1019int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1020{
1021 return bus->flags;
1022}
1023EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
14cf11af 1024
a28d3af2
BH
1025int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1026{
1027 return bus->channel;
1028}
1029EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1030
1031
730745a5
BH
1032struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1033{
6dfa5ca3 1034 return &bus->adapter;
730745a5
BH
1035}
1036EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1037
a28d3af2
BH
1038struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1039{
1040 struct pmac_i2c_bus *bus;
1041
1042 list_for_each_entry(bus, &pmac_i2c_busses, link)
6dfa5ca3 1043 if (&bus->adapter == adapter)
a28d3af2
BH
1044 return bus;
1045 return NULL;
1046}
1047EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1048
1d0bd717 1049int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
730745a5
BH
1050{
1051 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1052
1053 if (bus == NULL)
1054 return 0;
6dfa5ca3 1055 return (&bus->adapter == adapter);
730745a5
BH
1056}
1057EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
14cf11af
PM
1058
1059int pmac_low_i2c_lock(struct device_node *np)
1060{
730745a5 1061 struct pmac_i2c_bus *bus, *found = NULL;
14cf11af 1062
730745a5
BH
1063 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1064 if (np == bus->controller) {
1065 found = bus;
1066 break;
1067 }
1068 }
1069 if (!found)
14cf11af 1070 return -ENODEV;
730745a5 1071 return pmac_i2c_open(bus, 0);
14cf11af 1072}
730745a5 1073EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
14cf11af
PM
1074
1075int pmac_low_i2c_unlock(struct device_node *np)
1076{
730745a5 1077 struct pmac_i2c_bus *bus, *found = NULL;
14cf11af 1078
730745a5
BH
1079 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1080 if (np == bus->controller) {
1081 found = bus;
1082 break;
1083 }
1084 }
1085 if (!found)
14cf11af 1086 return -ENODEV;
730745a5 1087 pmac_i2c_close(bus);
14cf11af
PM
1088 return 0;
1089}
730745a5 1090EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
14cf11af
PM
1091
1092
730745a5 1093int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
14cf11af 1094{
730745a5
BH
1095 int rc;
1096
76a5b8bb 1097 mutex_lock(&bus->mutex);
a28d3af2 1098 bus->polled = polled || pmac_i2c_force_poll;
730745a5
BH
1099 bus->opened = 1;
1100 bus->mode = pmac_i2c_mode_std;
1101 if (bus->open && (rc = bus->open(bus)) != 0) {
1102 bus->opened = 0;
76a5b8bb 1103 mutex_unlock(&bus->mutex);
730745a5
BH
1104 return rc;
1105 }
1106 return 0;
1107}
1108EXPORT_SYMBOL_GPL(pmac_i2c_open);
14cf11af 1109
730745a5
BH
1110void pmac_i2c_close(struct pmac_i2c_bus *bus)
1111{
1112 WARN_ON(!bus->opened);
1113 if (bus->close)
1114 bus->close(bus);
1115 bus->opened = 0;
76a5b8bb 1116 mutex_unlock(&bus->mutex);
730745a5
BH
1117}
1118EXPORT_SYMBOL_GPL(pmac_i2c_close);
14cf11af 1119
730745a5
BH
1120int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1121{
1122 WARN_ON(!bus->opened);
14cf11af 1123
730745a5
BH
1124 /* Report me if you see the error below as there might be a new
1125 * "combined4" mode that I need to implement for the SMU bus
1126 */
1127 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1128 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
b7c670d6 1129 " bus %pOF !\n", mode, bus->busnode);
730745a5
BH
1130 return -EINVAL;
1131 }
1132 bus->mode = mode;
14cf11af
PM
1133
1134 return 0;
1135}
730745a5 1136EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
14cf11af 1137
730745a5
BH
1138int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1139 u32 subaddr, u8 *data, int len)
14cf11af 1140{
730745a5 1141 int rc;
14cf11af 1142
730745a5 1143 WARN_ON(!bus->opened);
14cf11af 1144
730745a5 1145 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
b7c670d6
RH
1146 " %d bytes, bus %pOF\n", bus->channel, addrdir, bus->mode, subsize,
1147 subaddr, len, bus->busnode);
14cf11af 1148
730745a5
BH
1149 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1150
1151#ifdef DEBUG
1152 if (rc)
1153 DBG("xfer error %d\n", rc);
1154#endif
1155 return rc;
14cf11af 1156}
730745a5 1157EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
14cf11af 1158
5b9ca526
BH
1159/* some quirks for platform function decoding */
1160enum {
1161 pmac_i2c_quirk_invmask = 0x00000001u,
5a47d749 1162 pmac_i2c_quirk_skip = 0x00000002u,
5b9ca526
BH
1163};
1164
1165static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1166 int quirks))
1167{
1168 struct pmac_i2c_bus *bus;
1169 struct device_node *np;
1170 static struct whitelist_ent {
1171 char *name;
1172 char *compatible;
1173 int quirks;
1174 } whitelist[] = {
1175 /* XXX Study device-tree's & apple drivers are get the quirks
1176 * right !
1177 */
5a47d749
BH
1178 /* Workaround: It seems that running the clockspreading
1179 * properties on the eMac will cause lockups during boot.
1180 * The machine seems to work fine without that. So for now,
1181 * let's make sure i2c-hwclock doesn't match about "imic"
1182 * clocks and we'll figure out if we really need to do
1183 * something special about those later.
1184 */
1185 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1186 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
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BH
1187 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1188 { "i2c-cpu-voltage", NULL, 0},
1189 { "temp-monitor", NULL, 0 },
1190 { "supply-monitor", NULL, 0 },
1191 { NULL, NULL, 0 },
1192 };
1193
3cc97bea 1194 /* Only some devices need to have platform functions instantiated
5b9ca526
BH
1195 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1196 * on Xserve, if we ever do a driver for them, will use their own
1197 * platform function instance
1198 */
1199 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1200 for (np = NULL;
1201 (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1202 struct whitelist_ent *p;
1203 /* If multibus, check if device is on that bus */
1204 if (bus->flags & pmac_i2c_multibus)
1205 if (bus != pmac_i2c_find_bus(np))
1206 continue;
1207 for (p = whitelist; p->name != NULL; p++) {
2c8e65b5 1208 if (!of_node_name_eq(np, p->name))
5b9ca526
BH
1209 continue;
1210 if (p->compatible &&
55b61fec 1211 !of_device_is_compatible(np, p->compatible))
5b9ca526 1212 continue;
5a47d749
BH
1213 if (p->quirks & pmac_i2c_quirk_skip)
1214 break;
5b9ca526
BH
1215 callback(np, p->quirks);
1216 break;
1217 }
1218 }
1219 }
1220}
1221
1222#define MAX_I2C_DATA 64
1223
1224struct pmac_i2c_pf_inst
1225{
1226 struct pmac_i2c_bus *bus;
1227 u8 addr;
1228 u8 buffer[MAX_I2C_DATA];
1229 u8 scratch[MAX_I2C_DATA];
1230 int bytes;
1231 int quirks;
1232};
1233
1234static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1235{
1236 struct pmac_i2c_pf_inst *inst;
1237 struct pmac_i2c_bus *bus;
1238
1239 bus = pmac_i2c_find_bus(func->node);
1240 if (bus == NULL) {
b7c670d6
RH
1241 printk(KERN_ERR "low_i2c: Can't find bus for %pOF (pfunc)\n",
1242 func->node);
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BH
1243 return NULL;
1244 }
1245 if (pmac_i2c_open(bus, 0)) {
b7c670d6
RH
1246 printk(KERN_ERR "low_i2c: Can't open i2c bus for %pOF (pfunc)\n",
1247 func->node);
5b9ca526
BH
1248 return NULL;
1249 }
1250
1251 /* XXX might need GFP_ATOMIC when called during the suspend process,
1252 * but then, there are already lots of issues with suspending when
1253 * near OOM that need to be resolved, the allocator itself should
1254 * probably make GFP_NOIO implicit during suspend
1255 */
1256 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1257 if (inst == NULL) {
1258 pmac_i2c_close(bus);
1259 return NULL;
1260 }
1261 inst->bus = bus;
1262 inst->addr = pmac_i2c_get_dev_addr(func->node);
1263 inst->quirks = (int)(long)func->driver_data;
1264 return inst;
1265}
1266
1267static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1268{
1269 struct pmac_i2c_pf_inst *inst = instdata;
1270
1271 if (inst == NULL)
1272 return;
1273 pmac_i2c_close(inst->bus);
213972e9 1274 kfree(inst);
5b9ca526
BH
1275}
1276
1277static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1278{
1279 struct pmac_i2c_pf_inst *inst = instdata;
1280
1281 inst->bytes = len;
1282 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1283 inst->buffer, len);
1284}
1285
1286static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1287{
1288 struct pmac_i2c_pf_inst *inst = instdata;
1289
1290 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1291 (u8 *)data, len);
1292}
1293
1294/* This function is used to do the masking & OR'ing for the "rmw" type
1295 * callbacks. Ze should apply the mask and OR in the values in the
1296 * buffer before writing back. The problem is that it seems that
1297 * various darwin drivers implement the mask/or differently, thus
1298 * we need to check the quirks first
1299 */
1300static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1301 u32 len, const u8 *mask, const u8 *val)
1302{
1303 int i;
1304
1305 if (inst->quirks & pmac_i2c_quirk_invmask) {
1306 for (i = 0; i < len; i ++)
1307 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1308 } else {
1309 for (i = 0; i < len; i ++)
1310 inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1311 | (val[i] & mask[i]);
1312 }
1313}
1314
1315static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1316 u32 totallen, const u8 *maskdata,
1317 const u8 *valuedata)
1318{
1319 struct pmac_i2c_pf_inst *inst = instdata;
1320
1321 if (masklen > inst->bytes || valuelen > inst->bytes ||
1322 totallen > inst->bytes || valuelen > masklen)
1323 return -EINVAL;
1324
1325 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1326
1327 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1328 inst->scratch, totallen);
1329}
1330
1331static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1332{
1333 struct pmac_i2c_pf_inst *inst = instdata;
1334
1335 inst->bytes = len;
1336 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1337 inst->buffer, len);
1338}
1339
1340static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1341 const u8 *data)
1342{
1343 struct pmac_i2c_pf_inst *inst = instdata;
1344
1345 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1346 subaddr, (u8 *)data, len);
1347}
1348
1349static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1350{
1351 struct pmac_i2c_pf_inst *inst = instdata;
1352
1353 return pmac_i2c_setmode(inst->bus, mode);
1354}
1355
1356static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1357 u32 valuelen, u32 totallen, const u8 *maskdata,
1358 const u8 *valuedata)
1359{
1360 struct pmac_i2c_pf_inst *inst = instdata;
1361
1362 if (masklen > inst->bytes || valuelen > inst->bytes ||
1363 totallen > inst->bytes || valuelen > masklen)
1364 return -EINVAL;
1365
1366 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1367
1368 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1369 subaddr, inst->scratch, totallen);
1370}
1371
1372static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1373 const u8 *maskdata,
1374 const u8 *valuedata)
1375{
1376 struct pmac_i2c_pf_inst *inst = instdata;
1377 int i, match;
1378
1379 /* Get return value pointer, it's assumed to be a u32 */
1380 if (!args || !args->count || !args->u[0].p)
1381 return -EINVAL;
1382
1383 /* Check buffer */
1384 if (len > inst->bytes)
1385 return -EINVAL;
1386
1387 for (i = 0, match = 1; match && i < len; i ++)
1388 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1389 match = 0;
1390 *args->u[0].p = match;
1391 return 0;
1392}
1393
1394static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1395{
1396 msleep((duration + 999) / 1000);
1397 return 0;
1398}
1399
1400
1401static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1402 .begin = pmac_i2c_do_begin,
1403 .end = pmac_i2c_do_end,
1404 .read_i2c = pmac_i2c_do_read,
1405 .write_i2c = pmac_i2c_do_write,
1406 .rmw_i2c = pmac_i2c_do_rmw,
1407 .read_i2c_sub = pmac_i2c_do_read_sub,
1408 .write_i2c_sub = pmac_i2c_do_write_sub,
1409 .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
1410 .set_i2c_mode = pmac_i2c_do_set_mode,
1411 .mask_and_compare = pmac_i2c_do_mask_and_comp,
1412 .delay = pmac_i2c_do_delay,
1413};
1414
1415static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1416{
b7c670d6 1417 DBG("dev_create(%pOF)\n", np);
5b9ca526
BH
1418
1419 pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1420 (void *)(long)quirks);
1421}
1422
1423static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1424{
b7c670d6 1425 DBG("dev_create(%pOF)\n", np);
5b9ca526
BH
1426
1427 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1428}
1429
1430static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1431{
b7c670d6 1432 DBG("dev_suspend(%pOF)\n", np);
5b9ca526
BH
1433 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1434}
1435
1436static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1437{
b7c670d6 1438 DBG("dev_resume(%pOF)\n", np);
5b9ca526
BH
1439 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1440}
1441
1442void pmac_pfunc_i2c_suspend(void)
1443{
1444 pmac_i2c_devscan(pmac_i2c_dev_suspend);
1445}
1446
1447void pmac_pfunc_i2c_resume(void)
1448{
1449 pmac_i2c_devscan(pmac_i2c_dev_resume);
1450}
1451
730745a5 1452/*
5b9ca526
BH
1453 * Initialize us: probe all i2c busses on the machine, instantiate
1454 * busses and platform functions as needed.
730745a5
BH
1455 */
1456/* This is non-static as it might be called early by smp code */
1457int __init pmac_i2c_init(void)
14cf11af 1458{
730745a5 1459 static int i2c_inited;
14cf11af 1460
730745a5
BH
1461 if (i2c_inited)
1462 return 0;
1463 i2c_inited = 1;
14cf11af 1464
730745a5
BH
1465 /* Probe keywest-i2c busses */
1466 kw_i2c_probe();
14cf11af 1467
730745a5 1468#ifdef CONFIG_ADB_PMU
a28d3af2 1469 /* Probe PMU i2c busses */
730745a5
BH
1470 pmu_i2c_probe();
1471#endif
14cf11af 1472
730745a5 1473#ifdef CONFIG_PMAC_SMU
a28d3af2 1474 /* Probe SMU i2c busses */
730745a5
BH
1475 smu_i2c_probe();
1476#endif
5b9ca526
BH
1477
1478 /* Now add plaform functions for some known devices */
1479 pmac_i2c_devscan(pmac_i2c_dev_create);
1480
730745a5 1481 return 0;
14cf11af 1482}
d518b717 1483machine_arch_initcall(powermac, pmac_i2c_init);
14cf11af 1484
a28d3af2
BH
1485/* Since pmac_i2c_init can be called too early for the platform device
1486 * registration, we need to do it at a later time. In our case, subsys
1487 * happens to fit well, though I agree it's a bit of a hack...
1488 */
1489static int __init pmac_i2c_create_platform_devices(void)
1490{
1491 struct pmac_i2c_bus *bus;
1492 int i = 0;
1493
1494 /* In the case where we are initialized from smp_init(), we must
1495 * not use the timer (and thus the irq). It's safe from now on
1496 * though
1497 */
1498 pmac_i2c_force_poll = 0;
1499
1500 /* Create platform devices */
1501 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1502 bus->platform_dev =
1503 platform_device_alloc("i2c-powermac", i++);
1504 if (bus->platform_dev == NULL)
1505 return -ENOMEM;
1506 bus->platform_dev->dev.platform_data = bus;
81e5d864 1507 bus->platform_dev->dev.of_node = bus->busnode;
a28d3af2
BH
1508 platform_device_add(bus->platform_dev);
1509 }
1510
5b9ca526
BH
1511 /* Now call platform "init" functions */
1512 pmac_i2c_devscan(pmac_i2c_dev_init);
1513
a28d3af2
BH
1514 return 0;
1515}
d518b717 1516machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);