Commit | Line | Data |
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1199919b OJ |
1 | /* |
2 | * Copyright (C) 2006-2007 PA Semi, Inc | |
3 | * | |
4 | * Maintained by: Olof Johansson <olof@lixom.net> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <asm/processor.h> | |
22 | #include <asm/page.h> | |
23 | #include <asm/ppc_asm.h> | |
24 | #include <asm/cputable.h> | |
25 | #include <asm/cache.h> | |
26 | #include <asm/thread_info.h> | |
27 | #include <asm/asm-offsets.h> | |
28 | ||
29 | /* Power savings opcodes since not all binutils have them at this time */ | |
30 | #define DOZE .long 0x4c000324 | |
31 | #define NAP .long 0x4c000364 | |
32 | #define SLEEP .long 0x4c0003a4 | |
33 | #define RVW .long 0x4c0003e4 | |
34 | ||
35 | /* Common sequence to do before going to any of the | |
36 | * powersavings modes. | |
37 | */ | |
38 | ||
39 | #define PRE_SLEEP_SEQUENCE \ | |
40 | std r3,8(r1); \ | |
41 | ptesync ; \ | |
42 | ld r3,8(r1); \ | |
43 | 1: cmpd r3,r3; \ | |
44 | bne 1b | |
45 | ||
46 | _doze: | |
47 | PRE_SLEEP_SEQUENCE | |
48 | DOZE | |
49 | b . | |
50 | ||
51 | ||
52 | _GLOBAL(idle_spin) | |
53 | blr | |
54 | ||
55 | _GLOBAL(idle_doze) | |
56 | LOAD_REG_ADDR(r3, _doze) | |
57 | b sleep_common | |
58 | ||
59 | /* Add more modes here later */ | |
60 | ||
61 | sleep_common: | |
62 | mflr r0 | |
63 | std r0, 16(r1) | |
64 | stdu r1,-64(r1) | |
8b32bc03 OJ |
65 | #ifdef CONFIG_PPC_PASEMI_CPUFREQ |
66 | std r3, 48(r1) | |
1199919b | 67 | |
8b32bc03 OJ |
68 | /* Only do power savings when in astate 0 */ |
69 | bl .check_astate | |
70 | cmpwi r3,0 | |
71 | bne 1f | |
72 | ||
73 | ld r3, 48(r1) | |
74 | #endif | |
1199919b OJ |
75 | LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE) |
76 | mfmsr r4 | |
77 | andc r5,r4,r6 | |
78 | mtmsrd r5,0 | |
79 | ||
80 | mtctr r3 | |
81 | bctrl | |
82 | ||
83 | mtmsrd r4,0 | |
84 | ||
8b32bc03 | 85 | 1: addi r1,r1,64 |
1199919b OJ |
86 | ld r0,16(r1) |
87 | mtlr r0 | |
88 | blr | |
89 |