[linux-2.6-block.git] / arch / powerpc / platforms / pasemi / cpufreq.c

/*
 * Copyright (C) 2007 PA Semi, Inc
 *
 * Authors: Egor Martovetsky <egor@pasemi.com>
 *	    Olof Johansson <olof@lixom.net>
 *
 * Maintained by: Olof Johansson <olof@lixom.net>
 *
 * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */

#include <linux/cpufreq.h>
#include <linux/timer.h>

#include <asm/hw_irq.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/time.h>
#include <asm/smp.h>

#define SDCASR_REG		0x0100
#define SDCASR_REG_STRIDE	0x1000
#define SDCPWR_CFGA0_REG	0x0100
#define SDCPWR_PWST0_REG	0x0000
#define SDCPWR_GIZTIME_REG	0x0440

/* SDCPWR_GIZTIME_REG fields */
#define SDCPWR_GIZTIME_GR	0x80000000
#define SDCPWR_GIZTIME_LONGLOCK	0x000000ff

/* Offset of ASR registers from SDC base */
#define SDCASR_OFFSET		0x120000

static void __iomem *sdcpwr_mapbase;
static void __iomem *sdcasr_mapbase;

static DEFINE_MUTEX(pas_switch_mutex);

/* Current astate, is used when waking up from power savings on
 * one core, in case the other core has switched states during
 * the idle time.
 */
static int current_astate;

/* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
static struct cpufreq_frequency_table pas_freqs[] = {
	{0,	0},
	{1,	0},
	{2,	0},
	{3,	0},
	{4,	0},
	{0,	CPUFREQ_TABLE_END},
};

static struct freq_attr *pas_cpu_freqs_attr[] = {
	&cpufreq_freq_attr_scaling_available_freqs,
	NULL,
};

/*
 * hardware specific functions
 */

static int get_astate_freq(int astate)
{
	u32 ret;
	ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));

	return ret & 0x3f;
}

static int get_cur_astate(int cpu)
{
	u32 ret;

	ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
	ret = (ret >> (cpu * 4)) & 0x7;

	return ret;
}

static int get_gizmo_latency(void)
{
	u32 giztime, ret;

	giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);

	/* just provide the upper bound */
	if (giztime & SDCPWR_GIZTIME_GR)
		ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
	else
		ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;

	return ret;
}

static void set_astate(int cpu, unsigned int astate)
{
	unsigned long flags;

	/* Return if called before init has run */
	if (unlikely(!sdcasr_mapbase))
		return;

	local_irq_save(flags);

	out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);

	local_irq_restore(flags);
}

int check_astate(void)
{
	return get_cur_astate(hard_smp_processor_id());
}

void restore_astate(int cpu)
{
	set_astate(cpu, current_astate);
}

/*
 * cpufreq functions
 */

static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
{
	const u32 *max_freqp;
	u32 max_freq;
	int i, cur_astate;
	struct resource res;
	struct device_node *cpu, *dn;
	int err = -ENODEV;

	cpu = of_get_cpu_node(policy->cpu, NULL);

	if (!cpu)
		goto out;

	dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
	if (!dn)
		dn = of_find_compatible_node(NULL, NULL,
					     "pasemi,pwrficient-sdc");
	if (!dn)
		goto out;
	err = of_address_to_resource(dn, 0, &res);
	of_node_put(dn);
	if (err)
		goto out;
	sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
	if (!sdcasr_mapbase) {
		err = -EINVAL;
		goto out;
	}

	dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
	if (!dn)
		dn = of_find_compatible_node(NULL, NULL,
					     "pasemi,pwrficient-gizmo");
	if (!dn) {
		err = -ENODEV;
		goto out_unmap_sdcasr;
	}
	err = of_address_to_resource(dn, 0, &res);
	of_node_put(dn);
	if (err)
		goto out_unmap_sdcasr;
	sdcpwr_mapbase = ioremap(res.start, 0x1000);
	if (!sdcpwr_mapbase) {
		err = -EINVAL;
		goto out_unmap_sdcasr;
	}

	pr_debug("init cpufreq on CPU %d\n", policy->cpu);

	max_freqp = of_get_property(cpu, "clock-frequency", NULL);
	if (!max_freqp) {
		err = -EINVAL;
		goto out_unmap_sdcpwr;
	}

	/* we need the freq in kHz */
	max_freq = *max_freqp / 1000;

	pr_debug("max clock-frequency is at %u kHz\n", max_freq);
	pr_debug("initializing frequency table\n");

	/* initialize frequency table */
	for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
		pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000;
		pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
	}

	policy->cpuinfo.transition_latency = get_gizmo_latency();

	cur_astate = get_cur_astate(policy->cpu);
	pr_debug("current astate is at %d\n",cur_astate);

	policy->cur = pas_freqs[cur_astate].frequency;
	cpumask_copy(policy->cpus, cpu_online_mask);

	ppc_proc_freq = policy->cur * 1000ul;

	cpufreq_frequency_table_get_attr(pas_freqs, policy->cpu);

	/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max
	 * are set correctly
	 */
	return cpufreq_frequency_table_cpuinfo(policy, pas_freqs);

out_unmap_sdcpwr:
	iounmap(sdcpwr_mapbase);

out_unmap_sdcasr:
	iounmap(sdcasr_mapbase);
out:
	return err;
}

static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
{
	if (sdcasr_mapbase)
		iounmap(sdcasr_mapbase);
	if (sdcpwr_mapbase)
		iounmap(sdcpwr_mapbase);

	cpufreq_frequency_table_put_attr(policy->cpu);
	return 0;
}

static int pas_cpufreq_verify(struct cpufreq_policy *policy)
{
	return cpufreq_frequency_table_verify(policy, pas_freqs);
}

static int pas_cpufreq_target(struct cpufreq_policy *policy,
			      unsigned int target_freq,
			      unsigned int relation)
{
	struct cpufreq_freqs freqs;
	int pas_astate_new;
	int i;

	cpufreq_frequency_table_target(policy,
				       pas_freqs,
				       target_freq,
				       relation,
				       &pas_astate_new);

	freqs.old = policy->cur;
	freqs.new = pas_freqs[pas_astate_new].frequency;
	freqs.cpu = policy->cpu;

	mutex_lock(&pas_switch_mutex);
	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);

	pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
		 policy->cpu,
		 pas_freqs[pas_astate_new].frequency,
		 pas_freqs[pas_astate_new].index);

	current_astate = pas_astate_new;

	for_each_online_cpu(i)
		set_astate(i, pas_astate_new);

	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
	mutex_unlock(&pas_switch_mutex);

	ppc_proc_freq = freqs.new * 1000ul;
	return 0;
}

static struct cpufreq_driver pas_cpufreq_driver = {
	.name		= "pas-cpufreq",
	.owner		= THIS_MODULE,
	.flags		= CPUFREQ_CONST_LOOPS,
	.init		= pas_cpufreq_cpu_init,
	.exit		= pas_cpufreq_cpu_exit,
	.verify		= pas_cpufreq_verify,
	.target		= pas_cpufreq_target,
	.attr		= pas_cpu_freqs_attr,
};

/*
 * module init and destoy
 */

static int __init pas_cpufreq_init(void)
{
	if (!of_machine_is_compatible("PA6T-1682M") &&
	    !of_machine_is_compatible("pasemi,pwrficient"))
		return -ENODEV;

	return cpufreq_register_driver(&pas_cpufreq_driver);
}

static void __exit pas_cpufreq_exit(void)
{
	cpufreq_unregister_driver(&pas_cpufreq_driver);
}

module_init(pas_cpufreq_init);
module_exit(pas_cpufreq_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");
Commit	Line	Data
2e0c3370 OJ	1	/*
	2	* Copyright (C) 2007 PA Semi, Inc
	3	*
	4	* Authors: Egor Martovetsky <egor@pasemi.com>
	5	* Olof Johansson <olof@lixom.net>
	6	*
	7	* Maintained by: Olof Johansson <olof@lixom.net>
	8	*
	9	* Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
	10	* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2, or (at your option)
	15	* any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
	21	*
	22	* You should have received a copy of the GNU General Public License
	23	* along with this program; if not, write to the Free Software
	24	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	25	*
	26	*/
	27
	28	#include <linux/cpufreq.h>
	29	#include <linux/timer.h>
	30
	31	#include <asm/hw_irq.h>
	32	#include <asm/io.h>
	33	#include <asm/prom.h>
2abb7019	34	#include <asm/time.h>
8b32bc03	35	#include <asm/smp.h>
2e0c3370 OJ	36
	37	#define SDCASR_REG 0x0100
	38	#define SDCASR_REG_STRIDE 0x1000
	39	#define SDCPWR_CFGA0_REG 0x0100
	40	#define SDCPWR_PWST0_REG 0x0000
	41	#define SDCPWR_GIZTIME_REG 0x0440
	42
	43	/* SDCPWR_GIZTIME_REG fields */
	44	#define SDCPWR_GIZTIME_GR 0x80000000
	45	#define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
	46
	47	/* Offset of ASR registers from SDC base */
	48	#define SDCASR_OFFSET 0x120000
	49
	50	static void __iomem *sdcpwr_mapbase;
	51	static void __iomem *sdcasr_mapbase;
	52
	53	static DEFINE_MUTEX(pas_switch_mutex);
	54
	55	/* Current astate, is used when waking up from power savings on
	56	* one core, in case the other core has switched states during
	57	* the idle time.
	58	*/
	59	static int current_astate;
	60
	61	/* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
	62	static struct cpufreq_frequency_table pas_freqs[] = {
	63	{0, 0},
	64	{1, 0},
	65	{2, 0},
	66	{3, 0},
	67	{4, 0},
	68	{0, CPUFREQ_TABLE_END},
	69	};
	70
	71	static struct freq_attr *pas_cpu_freqs_attr[] = {
	72	&cpufreq_freq_attr_scaling_available_freqs,
	73	NULL,
	74	};
	75
	76	/*
	77	* hardware specific functions
	78	*/
	79
	80	static int get_astate_freq(int astate)
	81	{
	82	u32 ret;
	83	ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
	84
	85	return ret & 0x3f;
	86	}
	87
	88	static int get_cur_astate(int cpu)
	89	{
	90	u32 ret;
	91
	92	ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
	93	ret = (ret >> (cpu * 4)) & 0x7;
	94
	95	return ret;
	96	}
	97
	98	static int get_gizmo_latency(void)
	99	{
100	u32 giztime, ret;
101
102	giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
103
104	/* just provide the upper bound */
105	if (giztime & SDCPWR_GIZTIME_GR)
106	ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
107	else
108	ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
109
110	return ret;
111	}
112
113	static void set_astate(int cpu, unsigned int astate)
114	{
ac3f6454	115	unsigned long flags;
2e0c3370 OJ	116
	117	/* Return if called before init has run */
	118	if (unlikely(!sdcasr_mapbase))
	119	return;
	120
	121	local_irq_save(flags);
	122
	123	out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
	124
	125	local_irq_restore(flags);
	126	}
	127
8b32bc03 OJ	128	int check_astate(void)
	129	{
	130	return get_cur_astate(hard_smp_processor_id());
	131	}
	132
2e0c3370 OJ	133	void restore_astate(int cpu)
	134	{
	135	set_astate(cpu, current_astate);
	136	}
	137
	138	/*
	139	* cpufreq functions
	140	*/
	141
	142	static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
	143	{
12d371a6 SR	144	const u32 *max_freqp;
12d371a6 SR	145	u32 max_freq;
2e0c3370 OJ	146	int i, cur_astate;
	147	struct resource res;
	148	struct device_node cpu, dn;
	149	int err = -ENODEV;
	150
	151	cpu = of_get_cpu_node(policy->cpu, NULL);
	152
	153	if (!cpu)
	154	goto out;
	155
0d08a847 OJ	156	dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
	157	if (!dn)
	158	dn = of_find_compatible_node(NULL, NULL,
	159	"pasemi,pwrficient-sdc");
2e0c3370 OJ	160	if (!dn)
	161	goto out;
	162	err = of_address_to_resource(dn, 0, &res);
	163	of_node_put(dn);
	164	if (err)
	165	goto out;
	166	sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
	167	if (!sdcasr_mapbase) {
	168	err = -EINVAL;
	169	goto out;
	170	}
	171
0d08a847 OJ	172	dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
	173	if (!dn)
	174	dn = of_find_compatible_node(NULL, NULL,
	175	"pasemi,pwrficient-gizmo");
2e0c3370 OJ	176	if (!dn) {
	177	err = -ENODEV;
	178	goto out_unmap_sdcasr;
	179	}
	180	err = of_address_to_resource(dn, 0, &res);
	181	of_node_put(dn);
	182	if (err)
	183	goto out_unmap_sdcasr;
	184	sdcpwr_mapbase = ioremap(res.start, 0x1000);
	185	if (!sdcpwr_mapbase) {
	186	err = -EINVAL;
	187	goto out_unmap_sdcasr;
	188	}
	189
	190	pr_debug("init cpufreq on CPU %d\n", policy->cpu);
	191
12d371a6 SR	192	max_freqp = of_get_property(cpu, "clock-frequency", NULL);
12d371a6 SR	193	if (!max_freqp) {
2e0c3370 OJ	194	err = -EINVAL;
	195	goto out_unmap_sdcpwr;
	196	}
	197
	198	/* we need the freq in kHz */
12d371a6	199	max_freq = *max_freqp / 1000;
2e0c3370	200
12d371a6	201	pr_debug("max clock-frequency is at %u kHz\n", max_freq);
2e0c3370 OJ	202	pr_debug("initializing frequency table\n");
	203
	204	/* initialize frequency table */
	205	for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
	206	pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000;
	207	pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
	208	}
	209
2e0c3370 OJ	210	policy->cpuinfo.transition_latency = get_gizmo_latency();
	211
	212	cur_astate = get_cur_astate(policy->cpu);
	213	pr_debug("current astate is at %d\n",cur_astate);
	214
	215	policy->cur = pas_freqs[cur_astate].frequency;
1b095cf4	216	cpumask_copy(policy->cpus, cpu_online_mask);
2e0c3370	217
2abb7019 OJ	218	ppc_proc_freq = policy->cur * 1000ul;
2abb7019 OJ	219
2e0c3370 OJ	220	cpufreq_frequency_table_get_attr(pas_freqs, policy->cpu);
	221
	222	/* this ensures that policy->cpuinfo_min and policy->cpuinfo_max
	223	* are set correctly
	224	*/
	225	return cpufreq_frequency_table_cpuinfo(policy, pas_freqs);
	226
	227	out_unmap_sdcpwr:
	228	iounmap(sdcpwr_mapbase);
	229
	230	out_unmap_sdcasr:
	231	iounmap(sdcasr_mapbase);
	232	out:
	233	return err;
	234	}
	235
	236	static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
	237	{
	238	if (sdcasr_mapbase)
	239	iounmap(sdcasr_mapbase);
	240	if (sdcpwr_mapbase)
	241	iounmap(sdcpwr_mapbase);
	242
	243	cpufreq_frequency_table_put_attr(policy->cpu);
	244	return 0;
	245	}
	246
	247	static int pas_cpufreq_verify(struct cpufreq_policy *policy)
	248	{
	249	return cpufreq_frequency_table_verify(policy, pas_freqs);
	250	}
	251
	252	static int pas_cpufreq_target(struct cpufreq_policy *policy,
	253	unsigned int target_freq,
	254	unsigned int relation)
	255	{
	256	struct cpufreq_freqs freqs;
	257	int pas_astate_new;
	258	int i;
	259
	260	cpufreq_frequency_table_target(policy,
	261	pas_freqs,
	262	target_freq,
	263	relation,
	264	&pas_astate_new);
	265
	266	freqs.old = policy->cur;
	267	freqs.new = pas_freqs[pas_astate_new].frequency;
	268	freqs.cpu = policy->cpu;
	269
	270	mutex_lock(&pas_switch_mutex);
	271	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
	272
	273	pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
	274	policy->cpu,
	275	pas_freqs[pas_astate_new].frequency,
	276	pas_freqs[pas_astate_new].index);
	277
	278	current_astate = pas_astate_new;
	279
	280	for_each_online_cpu(i)
	281	set_astate(i, pas_astate_new);
	282
	283	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
284	mutex_unlock(&pas_switch_mutex);
285
2abb7019	286	ppc_proc_freq = freqs.new * 1000ul;
2e0c3370 OJ	287	return 0;
	288	}
	289
	290	static struct cpufreq_driver pas_cpufreq_driver = {
	291	.name = "pas-cpufreq",
	292	.owner = THIS_MODULE,
	293	.flags = CPUFREQ_CONST_LOOPS,
	294	.init = pas_cpufreq_cpu_init,
	295	.exit = pas_cpufreq_cpu_exit,
	296	.verify = pas_cpufreq_verify,
	297	.target = pas_cpufreq_target,
	298	.attr = pas_cpu_freqs_attr,
	299	};
	300
	301	/*
	302	* module init and destoy
	303	*/
	304
	305	static int __init pas_cpufreq_init(void)
	306	{
71a157e8 GL	307	if (!of_machine_is_compatible("PA6T-1682M") &&
71a157e8 GL	308	!of_machine_is_compatible("pasemi,pwrficient"))
2e0c3370 OJ	309	return -ENODEV;
	310
	311	return cpufreq_register_driver(&pas_cpufreq_driver);
	312	}
	313
	314	static void __exit pas_cpufreq_exit(void)
	315	{
	316	cpufreq_unregister_driver(&pas_cpufreq_driver);
	317	}
	318
	319	module_init(pas_cpufreq_init);
	320	module_exit(pas_cpufreq_exit);
	321
	322	MODULE_LICENSE("GPL");
	323	MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");