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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com> | |
3 | * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu> | |
4 | * | |
1da177e4 LT |
5 | * Description: |
6 | * Architecture- / platform-specific boot-time initialization code for | |
7 | * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and | |
8 | * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek | |
9 | * <dan@net4x.com>. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | */ | |
16 | ||
17 | #undef DEBUG | |
18 | ||
19 | #include <linux/config.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/threads.h> | |
22 | #include <linux/smp.h> | |
23 | #include <linux/param.h> | |
24 | #include <linux/string.h> | |
1da177e4 LT |
25 | #include <linux/initrd.h> |
26 | #include <linux/seq_file.h> | |
27 | #include <linux/kdev_t.h> | |
28 | #include <linux/major.h> | |
29 | #include <linux/root_dev.h> | |
30 | ||
31 | #include <asm/processor.h> | |
32 | #include <asm/machdep.h> | |
33 | #include <asm/page.h> | |
34 | #include <asm/mmu.h> | |
35 | #include <asm/pgtable.h> | |
36 | #include <asm/mmu_context.h> | |
37 | #include <asm/cputable.h> | |
38 | #include <asm/sections.h> | |
39 | #include <asm/iommu.h> | |
aed31351 | 40 | #include <asm/firmware.h> |
1da177e4 LT |
41 | |
42 | #include <asm/time.h> | |
1da177e4 LT |
43 | #include <asm/naca.h> |
44 | #include <asm/paca.h> | |
45 | #include <asm/cache.h> | |
46 | #include <asm/sections.h> | |
0bc0ffd5 | 47 | #include <asm/abs_addr.h> |
1da177e4 LT |
48 | #include <asm/iSeries/HvCallHpt.h> |
49 | #include <asm/iSeries/HvLpConfig.h> | |
50 | #include <asm/iSeries/HvCallEvent.h> | |
1da177e4 LT |
51 | #include <asm/iSeries/HvCallXm.h> |
52 | #include <asm/iSeries/ItLpQueue.h> | |
1da177e4 LT |
53 | #include <asm/iSeries/mf.h> |
54 | #include <asm/iSeries/HvLpEvent.h> | |
0bc0ffd5 | 55 | #include <asm/iSeries/LparMap.h> |
1da177e4 | 56 | |
c8b84976 | 57 | #include "setup.h" |
b08567cb SR |
58 | #include "irq.h" |
59 | #include "vpd_areas.h" | |
60 | #include "processor_vpd.h" | |
61 | #include "main_store.h" | |
62 | #include "call_sm.h" | |
c8b84976 | 63 | |
1da177e4 LT |
64 | extern void hvlog(char *fmt, ...); |
65 | ||
66 | #ifdef DEBUG | |
67 | #define DBG(fmt...) hvlog(fmt) | |
68 | #else | |
69 | #define DBG(fmt...) | |
70 | #endif | |
71 | ||
72 | /* Function Prototypes */ | |
73 | extern void ppcdbg_initialize(void); | |
74 | ||
75 | static void build_iSeries_Memory_Map(void); | |
9f497581 ME |
76 | static int iseries_shared_idle(void); |
77 | static int iseries_dedicated_idle(void); | |
145d01e4 | 78 | #ifdef CONFIG_PCI |
1da177e4 | 79 | extern void iSeries_pci_final_fixup(void); |
145d01e4 SR |
80 | #else |
81 | static void iSeries_pci_final_fixup(void) { } | |
82 | #endif | |
1da177e4 LT |
83 | |
84 | /* Global Variables */ | |
1da177e4 LT |
85 | int piranha_simulator; |
86 | ||
87 | extern int rd_size; /* Defined in drivers/block/rd.c */ | |
88 | extern unsigned long klimit; | |
89 | extern unsigned long embedded_sysmap_start; | |
90 | extern unsigned long embedded_sysmap_end; | |
91 | ||
92 | extern unsigned long iSeries_recal_tb; | |
93 | extern unsigned long iSeries_recal_titan; | |
94 | ||
95 | static int mf_initialized; | |
96 | ||
97 | struct MemoryBlock { | |
98 | unsigned long absStart; | |
99 | unsigned long absEnd; | |
100 | unsigned long logicalStart; | |
101 | unsigned long logicalEnd; | |
102 | }; | |
103 | ||
104 | /* | |
105 | * Process the main store vpd to determine where the holes in memory are | |
106 | * and return the number of physical blocks and fill in the array of | |
107 | * block data. | |
108 | */ | |
109 | static unsigned long iSeries_process_Condor_mainstore_vpd( | |
110 | struct MemoryBlock *mb_array, unsigned long max_entries) | |
111 | { | |
112 | unsigned long holeFirstChunk, holeSizeChunks; | |
113 | unsigned long numMemoryBlocks = 1; | |
114 | struct IoHriMainStoreSegment4 *msVpd = | |
115 | (struct IoHriMainStoreSegment4 *)xMsVpd; | |
116 | unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr; | |
117 | unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr; | |
118 | unsigned long holeSize = holeEnd - holeStart; | |
119 | ||
120 | printk("Mainstore_VPD: Condor\n"); | |
121 | /* | |
122 | * Determine if absolute memory has any | |
123 | * holes so that we can interpret the | |
124 | * access map we get back from the hypervisor | |
125 | * correctly. | |
126 | */ | |
127 | mb_array[0].logicalStart = 0; | |
128 | mb_array[0].logicalEnd = 0x100000000; | |
129 | mb_array[0].absStart = 0; | |
130 | mb_array[0].absEnd = 0x100000000; | |
131 | ||
132 | if (holeSize) { | |
133 | numMemoryBlocks = 2; | |
134 | holeStart = holeStart & 0x000fffffffffffff; | |
135 | holeStart = addr_to_chunk(holeStart); | |
136 | holeFirstChunk = holeStart; | |
137 | holeSize = addr_to_chunk(holeSize); | |
138 | holeSizeChunks = holeSize; | |
139 | printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n", | |
140 | holeFirstChunk, holeSizeChunks ); | |
141 | mb_array[0].logicalEnd = holeFirstChunk; | |
142 | mb_array[0].absEnd = holeFirstChunk; | |
143 | mb_array[1].logicalStart = holeFirstChunk; | |
144 | mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks; | |
145 | mb_array[1].absStart = holeFirstChunk + holeSizeChunks; | |
146 | mb_array[1].absEnd = 0x100000000; | |
147 | } | |
148 | return numMemoryBlocks; | |
149 | } | |
150 | ||
151 | #define MaxSegmentAreas 32 | |
152 | #define MaxSegmentAdrRangeBlocks 128 | |
153 | #define MaxAreaRangeBlocks 4 | |
154 | ||
155 | static unsigned long iSeries_process_Regatta_mainstore_vpd( | |
156 | struct MemoryBlock *mb_array, unsigned long max_entries) | |
157 | { | |
158 | struct IoHriMainStoreSegment5 *msVpdP = | |
159 | (struct IoHriMainStoreSegment5 *)xMsVpd; | |
160 | unsigned long numSegmentBlocks = 0; | |
161 | u32 existsBits = msVpdP->msAreaExists; | |
162 | unsigned long area_num; | |
163 | ||
164 | printk("Mainstore_VPD: Regatta\n"); | |
165 | ||
166 | for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) { | |
167 | unsigned long numAreaBlocks; | |
168 | struct IoHriMainStoreArea4 *currentArea; | |
169 | ||
170 | if (existsBits & 0x80000000) { | |
171 | unsigned long block_num; | |
172 | ||
173 | currentArea = &msVpdP->msAreaArray[area_num]; | |
174 | numAreaBlocks = currentArea->numAdrRangeBlocks; | |
175 | printk("ms_vpd: processing area %2ld blocks=%ld", | |
176 | area_num, numAreaBlocks); | |
177 | for (block_num = 0; block_num < numAreaBlocks; | |
178 | ++block_num ) { | |
179 | /* Process an address range block */ | |
180 | struct MemoryBlock tempBlock; | |
181 | unsigned long i; | |
182 | ||
183 | tempBlock.absStart = | |
184 | (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart; | |
185 | tempBlock.absEnd = | |
186 | (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd; | |
187 | tempBlock.logicalStart = 0; | |
188 | tempBlock.logicalEnd = 0; | |
189 | printk("\n block %ld absStart=%016lx absEnd=%016lx", | |
190 | block_num, tempBlock.absStart, | |
191 | tempBlock.absEnd); | |
192 | ||
193 | for (i = 0; i < numSegmentBlocks; ++i) { | |
194 | if (mb_array[i].absStart == | |
195 | tempBlock.absStart) | |
196 | break; | |
197 | } | |
198 | if (i == numSegmentBlocks) { | |
199 | if (numSegmentBlocks == max_entries) | |
200 | panic("iSeries_process_mainstore_vpd: too many memory blocks"); | |
201 | mb_array[numSegmentBlocks] = tempBlock; | |
202 | ++numSegmentBlocks; | |
203 | } else | |
204 | printk(" (duplicate)"); | |
205 | } | |
206 | printk("\n"); | |
207 | } | |
208 | existsBits <<= 1; | |
209 | } | |
210 | /* Now sort the blocks found into ascending sequence */ | |
211 | if (numSegmentBlocks > 1) { | |
212 | unsigned long m, n; | |
213 | ||
214 | for (m = 0; m < numSegmentBlocks - 1; ++m) { | |
215 | for (n = numSegmentBlocks - 1; m < n; --n) { | |
216 | if (mb_array[n].absStart < | |
217 | mb_array[n-1].absStart) { | |
218 | struct MemoryBlock tempBlock; | |
219 | ||
220 | tempBlock = mb_array[n]; | |
221 | mb_array[n] = mb_array[n-1]; | |
222 | mb_array[n-1] = tempBlock; | |
223 | } | |
224 | } | |
225 | } | |
226 | } | |
227 | /* | |
228 | * Assign "logical" addresses to each block. These | |
229 | * addresses correspond to the hypervisor "bitmap" space. | |
230 | * Convert all addresses into units of 256K chunks. | |
231 | */ | |
232 | { | |
233 | unsigned long i, nextBitmapAddress; | |
234 | ||
235 | printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks); | |
236 | nextBitmapAddress = 0; | |
237 | for (i = 0; i < numSegmentBlocks; ++i) { | |
238 | unsigned long length = mb_array[i].absEnd - | |
239 | mb_array[i].absStart; | |
240 | ||
241 | mb_array[i].logicalStart = nextBitmapAddress; | |
242 | mb_array[i].logicalEnd = nextBitmapAddress + length; | |
243 | nextBitmapAddress += length; | |
244 | printk(" Bitmap range: %016lx - %016lx\n" | |
245 | " Absolute range: %016lx - %016lx\n", | |
246 | mb_array[i].logicalStart, | |
247 | mb_array[i].logicalEnd, | |
248 | mb_array[i].absStart, mb_array[i].absEnd); | |
249 | mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart & | |
250 | 0x000fffffffffffff); | |
251 | mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd & | |
252 | 0x000fffffffffffff); | |
253 | mb_array[i].logicalStart = | |
254 | addr_to_chunk(mb_array[i].logicalStart); | |
255 | mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd); | |
256 | } | |
257 | } | |
258 | ||
259 | return numSegmentBlocks; | |
260 | } | |
261 | ||
262 | static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array, | |
263 | unsigned long max_entries) | |
264 | { | |
265 | unsigned long i; | |
266 | unsigned long mem_blocks = 0; | |
267 | ||
268 | if (cpu_has_feature(CPU_FTR_SLB)) | |
269 | mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array, | |
270 | max_entries); | |
271 | else | |
272 | mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array, | |
273 | max_entries); | |
274 | ||
275 | printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks); | |
276 | for (i = 0; i < mem_blocks; ++i) { | |
277 | printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n" | |
278 | " abs chunks %016lx - %016lx\n", | |
279 | i, mb_array[i].logicalStart, mb_array[i].logicalEnd, | |
280 | mb_array[i].absStart, mb_array[i].absEnd); | |
281 | } | |
282 | return mem_blocks; | |
283 | } | |
284 | ||
285 | static void __init iSeries_get_cmdline(void) | |
286 | { | |
287 | char *p, *q; | |
288 | ||
289 | /* copy the command line parameter from the primary VSP */ | |
290 | HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256, | |
291 | HvLpDma_Direction_RemoteToLocal); | |
292 | ||
293 | p = cmd_line; | |
294 | q = cmd_line + 255; | |
295 | while(p < q) { | |
296 | if (!*p || *p == '\n') | |
297 | break; | |
298 | ++p; | |
299 | } | |
300 | *p = 0; | |
301 | } | |
302 | ||
303 | static void __init iSeries_init_early(void) | |
304 | { | |
305 | extern unsigned long memory_limit; | |
306 | ||
307 | DBG(" -> iSeries_init_early()\n"); | |
308 | ||
aed31351 SR |
309 | ppc64_firmware_features = FW_FEATURE_ISERIES; |
310 | ||
1da177e4 LT |
311 | ppcdbg_initialize(); |
312 | ||
ba293fff ME |
313 | ppc64_interrupt_controller = IC_ISERIES; |
314 | ||
1da177e4 LT |
315 | #if defined(CONFIG_BLK_DEV_INITRD) |
316 | /* | |
317 | * If the init RAM disk has been configured and there is | |
318 | * a non-zero starting address for it, set it up | |
319 | */ | |
320 | if (naca.xRamDisk) { | |
321 | initrd_start = (unsigned long)__va(naca.xRamDisk); | |
322 | initrd_end = initrd_start + naca.xRamDiskSize * PAGE_SIZE; | |
323 | initrd_below_start_ok = 1; // ramdisk in kernel space | |
324 | ROOT_DEV = Root_RAM0; | |
325 | if (((rd_size * 1024) / PAGE_SIZE) < naca.xRamDiskSize) | |
326 | rd_size = (naca.xRamDiskSize * PAGE_SIZE) / 1024; | |
327 | } else | |
328 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
329 | { | |
330 | /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */ | |
331 | } | |
332 | ||
333 | iSeries_recal_tb = get_tb(); | |
334 | iSeries_recal_titan = HvCallXm_loadTod(); | |
335 | ||
1da177e4 LT |
336 | /* |
337 | * Initialize the hash table management pointers | |
338 | */ | |
339 | hpte_init_iSeries(); | |
340 | ||
341 | /* | |
342 | * Initialize the DMA/TCE management | |
343 | */ | |
344 | iommu_init_early_iSeries(); | |
345 | ||
1da177e4 LT |
346 | iSeries_get_cmdline(); |
347 | ||
348 | /* Save unparsed command line copy for /proc/cmdline */ | |
349 | strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE); | |
350 | ||
351 | /* Parse early parameters, in particular mem=x */ | |
352 | parse_early_param(); | |
353 | ||
354 | if (memory_limit) { | |
355 | if (memory_limit < systemcfg->physicalMemorySize) | |
356 | systemcfg->physicalMemorySize = memory_limit; | |
357 | else { | |
358 | printk("Ignoring mem=%lu >= ram_top.\n", memory_limit); | |
359 | memory_limit = 0; | |
360 | } | |
361 | } | |
362 | ||
1da177e4 LT |
363 | /* Initialize machine-dependency vectors */ |
364 | #ifdef CONFIG_SMP | |
365 | smp_init_iSeries(); | |
366 | #endif | |
367 | if (itLpNaca.xPirEnvironMode == 0) | |
368 | piranha_simulator = 1; | |
369 | ||
370 | /* Associate Lp Event Queue 0 with processor 0 */ | |
371 | HvCallEvent_setLpEventQueueInterruptProc(0, 0); | |
372 | ||
373 | mf_init(); | |
374 | mf_initialized = 1; | |
375 | mb(); | |
376 | ||
377 | /* If we were passed an initrd, set the ROOT_DEV properly if the values | |
378 | * look sensible. If not, clear initrd reference. | |
379 | */ | |
380 | #ifdef CONFIG_BLK_DEV_INITRD | |
381 | if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE && | |
382 | initrd_end > initrd_start) | |
383 | ROOT_DEV = Root_RAM0; | |
384 | else | |
385 | initrd_start = initrd_end = 0; | |
386 | #endif /* CONFIG_BLK_DEV_INITRD */ | |
387 | ||
388 | DBG(" <- iSeries_init_early()\n"); | |
389 | } | |
390 | ||
56e97b71 | 391 | struct mschunks_map mschunks_map = { |
34c8f696 ME |
392 | /* XXX We don't use these, but Piranha might need them. */ |
393 | .chunk_size = MSCHUNKS_CHUNK_SIZE, | |
394 | .chunk_shift = MSCHUNKS_CHUNK_SHIFT, | |
395 | .chunk_mask = MSCHUNKS_OFFSET_MASK, | |
396 | }; | |
56e97b71 | 397 | EXPORT_SYMBOL(mschunks_map); |
34c8f696 | 398 | |
56e97b71 | 399 | void mschunks_alloc(unsigned long num_chunks) |
34c8f696 ME |
400 | { |
401 | klimit = _ALIGN(klimit, sizeof(u32)); | |
56e97b71 | 402 | mschunks_map.mapping = (u32 *)klimit; |
34c8f696 | 403 | klimit += num_chunks * sizeof(u32); |
56e97b71 | 404 | mschunks_map.num_chunks = num_chunks; |
34c8f696 ME |
405 | } |
406 | ||
1da177e4 LT |
407 | /* |
408 | * The iSeries may have very large memories ( > 128 GB ) and a partition | |
409 | * may get memory in "chunks" that may be anywhere in the 2**52 real | |
410 | * address space. The chunks are 256K in size. To map this to the | |
411 | * memory model Linux expects, the AS/400 specific code builds a | |
412 | * translation table to translate what Linux thinks are "physical" | |
413 | * addresses to the actual real addresses. This allows us to make | |
414 | * it appear to Linux that we have contiguous memory starting at | |
415 | * physical address zero while in fact this could be far from the truth. | |
416 | * To avoid confusion, I'll let the words physical and/or real address | |
417 | * apply to the Linux addresses while I'll use "absolute address" to | |
418 | * refer to the actual hardware real address. | |
419 | * | |
420 | * build_iSeries_Memory_Map gets information from the Hypervisor and | |
421 | * looks at the Main Store VPD to determine the absolute addresses | |
422 | * of the memory that has been assigned to our partition and builds | |
423 | * a table used to translate Linux's physical addresses to these | |
424 | * absolute addresses. Absolute addresses are needed when | |
425 | * communicating with the hypervisor (e.g. to build HPT entries) | |
426 | */ | |
427 | ||
428 | static void __init build_iSeries_Memory_Map(void) | |
429 | { | |
430 | u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize; | |
431 | u32 nextPhysChunk; | |
432 | u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages; | |
1da177e4 LT |
433 | u32 totalChunks,moreChunks; |
434 | u32 currChunk, thisChunk, absChunk; | |
435 | u32 currDword; | |
436 | u32 chunkBit; | |
437 | u64 map; | |
438 | struct MemoryBlock mb[32]; | |
439 | unsigned long numMemoryBlocks, curBlock; | |
440 | ||
441 | /* Chunk size on iSeries is 256K bytes */ | |
442 | totalChunks = (u32)HvLpConfig_getMsChunks(); | |
56e97b71 | 443 | mschunks_alloc(totalChunks); |
1da177e4 LT |
444 | |
445 | /* | |
446 | * Get absolute address of our load area | |
447 | * and map it to physical address 0 | |
448 | * This guarantees that the loadarea ends up at physical 0 | |
449 | * otherwise, it might not be returned by PLIC as the first | |
450 | * chunks | |
451 | */ | |
452 | ||
453 | loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr); | |
454 | loadAreaSize = itLpNaca.xLoadAreaChunks; | |
455 | ||
456 | /* | |
457 | * Only add the pages already mapped here. | |
458 | * Otherwise we might add the hpt pages | |
459 | * The rest of the pages of the load area | |
460 | * aren't in the HPT yet and can still | |
461 | * be assigned an arbitrary physical address | |
462 | */ | |
463 | if ((loadAreaSize * 64) > HvPagesToMap) | |
464 | loadAreaSize = HvPagesToMap / 64; | |
465 | ||
466 | loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1; | |
467 | ||
468 | /* | |
469 | * TODO Do we need to do something if the HPT is in the 64MB load area? | |
470 | * This would be required if the itLpNaca.xLoadAreaChunks includes | |
471 | * the HPT size | |
472 | */ | |
473 | ||
474 | printk("Mapping load area - physical addr = 0000000000000000\n" | |
475 | " absolute addr = %016lx\n", | |
476 | chunk_to_addr(loadAreaFirstChunk)); | |
477 | printk("Load area size %dK\n", loadAreaSize * 256); | |
478 | ||
479 | for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk) | |
56e97b71 | 480 | mschunks_map.mapping[nextPhysChunk] = |
1da177e4 LT |
481 | loadAreaFirstChunk + nextPhysChunk; |
482 | ||
483 | /* | |
484 | * Get absolute address of our HPT and remember it so | |
485 | * we won't map it to any physical address | |
486 | */ | |
487 | hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress()); | |
488 | hptSizePages = (u32)HvCallHpt_getHptPages(); | |
34c8f696 | 489 | hptSizeChunks = hptSizePages >> (MSCHUNKS_CHUNK_SHIFT - PAGE_SHIFT); |
1da177e4 LT |
490 | hptLastChunk = hptFirstChunk + hptSizeChunks - 1; |
491 | ||
492 | printk("HPT absolute addr = %016lx, size = %dK\n", | |
493 | chunk_to_addr(hptFirstChunk), hptSizeChunks * 256); | |
494 | ||
3a5f8c5f | 495 | ppc64_pft_size = __ilog2(hptSizePages * PAGE_SIZE); |
1da177e4 LT |
496 | |
497 | /* | |
498 | * The actual hashed page table is in the hypervisor, | |
499 | * we have no direct access | |
500 | */ | |
501 | htab_address = NULL; | |
502 | ||
503 | /* | |
504 | * Determine if absolute memory has any | |
505 | * holes so that we can interpret the | |
506 | * access map we get back from the hypervisor | |
507 | * correctly. | |
508 | */ | |
509 | numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32); | |
510 | ||
511 | /* | |
512 | * Process the main store access map from the hypervisor | |
513 | * to build up our physical -> absolute translation table | |
514 | */ | |
515 | curBlock = 0; | |
516 | currChunk = 0; | |
517 | currDword = 0; | |
518 | moreChunks = totalChunks; | |
519 | ||
520 | while (moreChunks) { | |
521 | map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex, | |
522 | currDword); | |
523 | thisChunk = currChunk; | |
524 | while (map) { | |
525 | chunkBit = map >> 63; | |
526 | map <<= 1; | |
527 | if (chunkBit) { | |
528 | --moreChunks; | |
529 | while (thisChunk >= mb[curBlock].logicalEnd) { | |
530 | ++curBlock; | |
531 | if (curBlock >= numMemoryBlocks) | |
532 | panic("out of memory blocks"); | |
533 | } | |
534 | if (thisChunk < mb[curBlock].logicalStart) | |
535 | panic("memory block error"); | |
536 | ||
537 | absChunk = mb[curBlock].absStart + | |
538 | (thisChunk - mb[curBlock].logicalStart); | |
539 | if (((absChunk < hptFirstChunk) || | |
540 | (absChunk > hptLastChunk)) && | |
541 | ((absChunk < loadAreaFirstChunk) || | |
542 | (absChunk > loadAreaLastChunk))) { | |
56e97b71 ME |
543 | mschunks_map.mapping[nextPhysChunk] = |
544 | absChunk; | |
1da177e4 LT |
545 | ++nextPhysChunk; |
546 | } | |
547 | } | |
548 | ++thisChunk; | |
549 | } | |
550 | ++currDword; | |
551 | currChunk += 64; | |
552 | } | |
553 | ||
554 | /* | |
555 | * main store size (in chunks) is | |
556 | * totalChunks - hptSizeChunks | |
557 | * which should be equal to | |
558 | * nextPhysChunk | |
559 | */ | |
560 | systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk); | |
561 | } | |
562 | ||
1da177e4 LT |
563 | /* |
564 | * Document me. | |
565 | */ | |
566 | static void __init iSeries_setup_arch(void) | |
567 | { | |
1da177e4 LT |
568 | unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index; |
569 | ||
9f497581 ME |
570 | if (get_paca()->lppaca.shared_proc) { |
571 | ppc_md.idle_loop = iseries_shared_idle; | |
572 | printk(KERN_INFO "Using shared processor idle loop\n"); | |
573 | } else { | |
574 | ppc_md.idle_loop = iseries_dedicated_idle; | |
575 | printk(KERN_INFO "Using dedicated idle loop\n"); | |
576 | } | |
577 | ||
1da177e4 | 578 | /* Setup the Lp Event Queue */ |
512d31d6 | 579 | setup_hvlpevent_queue(); |
1da177e4 | 580 | |
1da177e4 LT |
581 | printk("Max logical processors = %d\n", |
582 | itVpdAreas.xSlicMaxLogicalProcs); | |
583 | printk("Max physical processors = %d\n", | |
584 | itVpdAreas.xSlicMaxPhysicalProcs); | |
95b29380 | 585 | |
1da177e4 LT |
586 | systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR; |
587 | printk("Processor version = %x\n", systemcfg->processor); | |
588 | } | |
589 | ||
590 | static void iSeries_get_cpuinfo(struct seq_file *m) | |
591 | { | |
592 | seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n"); | |
593 | } | |
594 | ||
595 | /* | |
596 | * Document me. | |
597 | * and Implement me. | |
598 | */ | |
599 | static int iSeries_get_irq(struct pt_regs *regs) | |
600 | { | |
601 | /* -2 means ignore this interrupt */ | |
602 | return -2; | |
603 | } | |
604 | ||
605 | /* | |
606 | * Document me. | |
607 | */ | |
608 | static void iSeries_restart(char *cmd) | |
609 | { | |
610 | mf_reboot(); | |
611 | } | |
612 | ||
613 | /* | |
614 | * Document me. | |
615 | */ | |
616 | static void iSeries_power_off(void) | |
617 | { | |
618 | mf_power_off(); | |
619 | } | |
620 | ||
621 | /* | |
622 | * Document me. | |
623 | */ | |
624 | static void iSeries_halt(void) | |
625 | { | |
626 | mf_power_off(); | |
627 | } | |
628 | ||
1da177e4 LT |
629 | static void __init iSeries_progress(char * st, unsigned short code) |
630 | { | |
631 | printk("Progress: [%04x] - %s\n", (unsigned)code, st); | |
632 | if (!piranha_simulator && mf_initialized) { | |
633 | if (code != 0xffff) | |
634 | mf_display_progress(code); | |
635 | else | |
636 | mf_clear_src(); | |
637 | } | |
638 | } | |
639 | ||
640 | static void __init iSeries_fixup_klimit(void) | |
641 | { | |
642 | /* | |
643 | * Change klimit to take into account any ram disk | |
644 | * that may be included | |
645 | */ | |
646 | if (naca.xRamDisk) | |
647 | klimit = KERNELBASE + (u64)naca.xRamDisk + | |
648 | (naca.xRamDiskSize * PAGE_SIZE); | |
649 | else { | |
650 | /* | |
651 | * No ram disk was included - check and see if there | |
652 | * was an embedded system map. Change klimit to take | |
653 | * into account any embedded system map | |
654 | */ | |
655 | if (embedded_sysmap_end) | |
656 | klimit = KERNELBASE + ((embedded_sysmap_end + 4095) & | |
657 | 0xfffffffffffff000); | |
658 | } | |
659 | } | |
660 | ||
661 | static int __init iSeries_src_init(void) | |
662 | { | |
663 | /* clear the progress line */ | |
664 | ppc_md.progress(" ", 0xffff); | |
665 | return 0; | |
666 | } | |
667 | ||
668 | late_initcall(iSeries_src_init); | |
669 | ||
d200903e ME |
670 | static inline void process_iSeries_events(void) |
671 | { | |
672 | asm volatile ("li 0,0x5555; sc" : : : "r0", "r3"); | |
673 | } | |
674 | ||
675 | static void yield_shared_processor(void) | |
676 | { | |
677 | unsigned long tb; | |
d200903e ME |
678 | |
679 | HvCall_setEnabledInterrupts(HvCall_MaskIPI | | |
680 | HvCall_MaskLpEvent | | |
681 | HvCall_MaskLpProd | | |
682 | HvCall_MaskTimeout); | |
683 | ||
684 | tb = get_tb(); | |
685 | /* Compute future tb value when yield should expire */ | |
686 | HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy); | |
687 | ||
d200903e ME |
688 | /* |
689 | * The decrementer stops during the yield. Force a fake decrementer | |
690 | * here and let the timer_interrupt code sort out the actual time. | |
691 | */ | |
692 | get_paca()->lppaca.int_dword.fields.decr_int = 1; | |
693 | process_iSeries_events(); | |
694 | } | |
695 | ||
3c57bb9f | 696 | static int iseries_shared_idle(void) |
d200903e | 697 | { |
3c57bb9f AB |
698 | while (1) { |
699 | while (!need_resched() && !hvlpevent_is_pending()) { | |
700 | local_irq_disable(); | |
701 | ppc64_runlatch_off(); | |
702 | ||
703 | /* Recheck with irqs off */ | |
704 | if (!need_resched() && !hvlpevent_is_pending()) | |
705 | yield_shared_processor(); | |
d200903e | 706 | |
3c57bb9f AB |
707 | HMT_medium(); |
708 | local_irq_enable(); | |
709 | } | |
710 | ||
711 | ppc64_runlatch_on(); | |
d200903e | 712 | |
3c57bb9f AB |
713 | if (hvlpevent_is_pending()) |
714 | process_iSeries_events(); | |
715 | ||
716 | schedule(); | |
717 | } | |
718 | ||
719 | return 0; | |
720 | } | |
721 | ||
722 | static int iseries_dedicated_idle(void) | |
723 | { | |
3c57bb9f | 724 | long oldval; |
d200903e ME |
725 | |
726 | while (1) { | |
3c57bb9f | 727 | oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED); |
d200903e | 728 | |
3c57bb9f AB |
729 | if (!oldval) { |
730 | set_thread_flag(TIF_POLLING_NRFLAG); | |
d200903e | 731 | |
3c57bb9f AB |
732 | while (!need_resched()) { |
733 | ppc64_runlatch_off(); | |
734 | HMT_low(); | |
735 | ||
736 | if (hvlpevent_is_pending()) { | |
d200903e | 737 | HMT_medium(); |
3c57bb9f AB |
738 | ppc64_runlatch_on(); |
739 | process_iSeries_events(); | |
d200903e | 740 | } |
d200903e | 741 | } |
3c57bb9f AB |
742 | |
743 | HMT_medium(); | |
744 | clear_thread_flag(TIF_POLLING_NRFLAG); | |
745 | } else { | |
746 | set_need_resched(); | |
d200903e ME |
747 | } |
748 | ||
749 | ppc64_runlatch_on(); | |
750 | schedule(); | |
d200903e ME |
751 | } |
752 | ||
753 | return 0; | |
754 | } | |
755 | ||
145d01e4 SR |
756 | #ifndef CONFIG_PCI |
757 | void __init iSeries_init_IRQ(void) { } | |
758 | #endif | |
759 | ||
4762713a ME |
760 | static int __init iseries_probe(int platform) |
761 | { | |
762 | return PLATFORM_ISERIES_LPAR == platform; | |
763 | } | |
764 | ||
9f497581 ME |
765 | struct machdep_calls __initdata iseries_md = { |
766 | .setup_arch = iSeries_setup_arch, | |
767 | .get_cpuinfo = iSeries_get_cpuinfo, | |
768 | .init_IRQ = iSeries_init_IRQ, | |
769 | .get_irq = iSeries_get_irq, | |
770 | .init_early = iSeries_init_early, | |
771 | .pcibios_fixup = iSeries_pci_final_fixup, | |
772 | .restart = iSeries_restart, | |
773 | .power_off = iSeries_power_off, | |
774 | .halt = iSeries_halt, | |
775 | .get_boot_time = iSeries_get_boot_time, | |
776 | .set_rtc_time = iSeries_set_rtc_time, | |
777 | .get_rtc_time = iSeries_get_rtc_time, | |
95b29380 | 778 | .calibrate_decr = generic_calibrate_decr, |
9f497581 | 779 | .progress = iSeries_progress, |
4762713a | 780 | .probe = iseries_probe, |
9f497581 ME |
781 | /* XXX Implement enable_pmcs for iSeries */ |
782 | }; | |
783 | ||
c0a59491 ME |
784 | struct blob { |
785 | unsigned char data[PAGE_SIZE]; | |
786 | unsigned long next; | |
787 | }; | |
788 | ||
789 | struct iseries_flat_dt { | |
790 | struct boot_param_header header; | |
791 | u64 reserve_map[2]; | |
792 | struct blob dt; | |
793 | struct blob strings; | |
794 | }; | |
795 | ||
796 | struct iseries_flat_dt iseries_dt; | |
797 | ||
798 | void dt_init(struct iseries_flat_dt *dt) | |
799 | { | |
800 | dt->header.off_mem_rsvmap = | |
801 | offsetof(struct iseries_flat_dt, reserve_map); | |
802 | dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt); | |
803 | dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings); | |
804 | dt->header.totalsize = sizeof(struct iseries_flat_dt); | |
805 | dt->header.dt_strings_size = sizeof(struct blob); | |
806 | ||
807 | /* There is no notion of hardware cpu id on iSeries */ | |
808 | dt->header.boot_cpuid_phys = smp_processor_id(); | |
809 | ||
810 | dt->dt.next = (unsigned long)&dt->dt.data; | |
811 | dt->strings.next = (unsigned long)&dt->strings.data; | |
812 | ||
813 | dt->header.magic = OF_DT_HEADER; | |
814 | dt->header.version = 0x10; | |
815 | dt->header.last_comp_version = 0x10; | |
816 | ||
817 | dt->reserve_map[0] = 0; | |
818 | dt->reserve_map[1] = 0; | |
819 | } | |
820 | ||
821 | void dt_check_blob(struct blob *b) | |
822 | { | |
823 | if (b->next >= (unsigned long)&b->next) { | |
824 | DBG("Ran out of space in flat device tree blob!\n"); | |
825 | BUG(); | |
826 | } | |
827 | } | |
828 | ||
829 | void dt_push_u32(struct iseries_flat_dt *dt, u32 value) | |
830 | { | |
831 | *((u32*)dt->dt.next) = value; | |
832 | dt->dt.next += sizeof(u32); | |
833 | ||
834 | dt_check_blob(&dt->dt); | |
835 | } | |
836 | ||
837 | void dt_push_u64(struct iseries_flat_dt *dt, u64 value) | |
838 | { | |
839 | *((u64*)dt->dt.next) = value; | |
840 | dt->dt.next += sizeof(u64); | |
841 | ||
842 | dt_check_blob(&dt->dt); | |
843 | } | |
844 | ||
845 | unsigned long dt_push_bytes(struct blob *blob, char *data, int len) | |
846 | { | |
847 | unsigned long start = blob->next - (unsigned long)blob->data; | |
848 | ||
849 | memcpy((char *)blob->next, data, len); | |
850 | blob->next = _ALIGN(blob->next + len, 4); | |
851 | ||
852 | dt_check_blob(blob); | |
853 | ||
854 | return start; | |
855 | } | |
856 | ||
857 | void dt_start_node(struct iseries_flat_dt *dt, char *name) | |
858 | { | |
859 | dt_push_u32(dt, OF_DT_BEGIN_NODE); | |
860 | dt_push_bytes(&dt->dt, name, strlen(name) + 1); | |
861 | } | |
862 | ||
863 | #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE) | |
864 | ||
865 | void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len) | |
866 | { | |
867 | unsigned long offset; | |
868 | ||
869 | dt_push_u32(dt, OF_DT_PROP); | |
870 | ||
871 | /* Length of the data */ | |
872 | dt_push_u32(dt, len); | |
873 | ||
874 | /* Put the property name in the string blob. */ | |
875 | offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1); | |
876 | ||
877 | /* The offset of the properties name in the string blob. */ | |
878 | dt_push_u32(dt, (u32)offset); | |
879 | ||
880 | /* The actual data. */ | |
881 | dt_push_bytes(&dt->dt, data, len); | |
882 | } | |
883 | ||
884 | void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data) | |
885 | { | |
886 | dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */ | |
887 | } | |
888 | ||
889 | void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data) | |
890 | { | |
891 | dt_prop(dt, name, (char *)&data, sizeof(u32)); | |
892 | } | |
893 | ||
894 | void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data) | |
895 | { | |
896 | dt_prop(dt, name, (char *)&data, sizeof(u64)); | |
897 | } | |
898 | ||
899 | void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n) | |
900 | { | |
901 | dt_prop(dt, name, (char *)data, sizeof(u64) * n); | |
902 | } | |
903 | ||
904 | void dt_prop_empty(struct iseries_flat_dt *dt, char *name) | |
905 | { | |
906 | dt_prop(dt, name, NULL, 0); | |
907 | } | |
908 | ||
95b29380 ME |
909 | void dt_cpus(struct iseries_flat_dt *dt) |
910 | { | |
911 | unsigned char buf[32]; | |
912 | unsigned char *p; | |
913 | unsigned int i, index; | |
914 | struct IoHriProcessorVpd *d; | |
915 | ||
916 | /* yuck */ | |
917 | snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name); | |
918 | p = strchr(buf, ' '); | |
919 | if (!p) p = buf + strlen(buf); | |
920 | ||
921 | dt_start_node(dt, "cpus"); | |
922 | dt_prop_u32(dt, "#address-cells", 1); | |
923 | dt_prop_u32(dt, "#size-cells", 0); | |
924 | ||
925 | for (i = 0; i < NR_CPUS; i++) { | |
926 | if (paca[i].lppaca.dyn_proc_status >= 2) | |
927 | continue; | |
928 | ||
929 | snprintf(p, 32 - (p - buf), "@%d", i); | |
930 | dt_start_node(dt, buf); | |
931 | ||
932 | dt_prop_str(dt, "device_type", "cpu"); | |
933 | ||
934 | index = paca[i].lppaca.dyn_hv_phys_proc_index; | |
935 | d = &xIoHriProcessorVpd[index]; | |
936 | ||
937 | dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024); | |
938 | dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize); | |
939 | ||
940 | dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024); | |
941 | dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize); | |
942 | ||
943 | /* magic conversions to Hz copied from old code */ | |
944 | dt_prop_u32(dt, "clock-frequency", | |
945 | ((1UL << 34) * 1000000) / d->xProcFreq); | |
946 | dt_prop_u32(dt, "timebase-frequency", | |
947 | ((1UL << 32) * 1000000) / d->xTimeBaseFreq); | |
948 | ||
949 | dt_prop_u32(dt, "reg", i); | |
950 | ||
95b29380 ME |
951 | dt_end_node(dt); |
952 | } | |
953 | ||
954 | dt_end_node(dt); | |
955 | } | |
956 | ||
c0a59491 ME |
957 | void build_flat_dt(struct iseries_flat_dt *dt) |
958 | { | |
3ab42407 ME |
959 | u64 tmp[2]; |
960 | ||
c0a59491 ME |
961 | dt_init(dt); |
962 | ||
963 | dt_start_node(dt, ""); | |
3ab42407 ME |
964 | |
965 | dt_prop_u32(dt, "#address-cells", 2); | |
966 | dt_prop_u32(dt, "#size-cells", 2); | |
967 | ||
968 | /* /memory */ | |
969 | dt_start_node(dt, "memory@0"); | |
970 | dt_prop_str(dt, "name", "memory"); | |
971 | dt_prop_str(dt, "device_type", "memory"); | |
972 | tmp[0] = 0; | |
973 | tmp[1] = systemcfg->physicalMemorySize; | |
974 | dt_prop_u64_list(dt, "reg", tmp, 2); | |
975 | dt_end_node(dt); | |
976 | ||
47db3603 ME |
977 | /* /chosen */ |
978 | dt_start_node(dt, "chosen"); | |
979 | dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR); | |
980 | dt_end_node(dt); | |
981 | ||
95b29380 ME |
982 | dt_cpus(dt); |
983 | ||
c0a59491 ME |
984 | dt_end_node(dt); |
985 | ||
986 | dt_push_u32(dt, OF_DT_END); | |
987 | } | |
988 | ||
4762713a | 989 | void * __init iSeries_early_setup(void) |
1da177e4 LT |
990 | { |
991 | iSeries_fixup_klimit(); | |
c0a59491 | 992 | |
4762713a ME |
993 | /* |
994 | * Initialize the table which translate Linux physical addresses to | |
995 | * AS/400 absolute addresses | |
996 | */ | |
997 | build_iSeries_Memory_Map(); | |
998 | ||
c0a59491 | 999 | build_flat_dt(&iseries_dt); |
4762713a ME |
1000 | |
1001 | return (void *) __pa(&iseries_dt); | |
1da177e4 | 1002 | } |