Commit | Line | Data |
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028ee972 AH |
1 | /* |
2 | * arch/powerpc/platforms/embedded6xx/flipper-pic.c | |
3 | * | |
4 | * Nintendo GameCube/Wii "Flipper" interrupt controller support. | |
5 | * Copyright (C) 2004-2009 The GameCube Linux Team | |
6 | * Copyright (C) 2007,2008,2009 Albert Herranz | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * as published by the Free Software Foundation; either version 2 | |
11 | * of the License, or (at your option) any later version. | |
12 | * | |
13 | */ | |
14 | #define DRV_MODULE_NAME "flipper-pic" | |
15 | #define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt | |
16 | ||
17 | #include <linux/kernel.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/irq.h> | |
20 | #include <linux/of.h> | |
26a2056e | 21 | #include <linux/of_address.h> |
028ee972 AH |
22 | #include <asm/io.h> |
23 | ||
24 | #include "flipper-pic.h" | |
25 | ||
26 | #define FLIPPER_NR_IRQS 32 | |
27 | ||
28 | /* | |
29 | * Each interrupt has a corresponding bit in both | |
30 | * the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers. | |
31 | * | |
32 | * Enabling/disabling an interrupt line involves setting/clearing | |
33 | * the corresponding bit in IMR. | |
34 | * Except for the RSW interrupt, all interrupts get deasserted automatically | |
35 | * when the source deasserts the interrupt. | |
36 | */ | |
37 | #define FLIPPER_ICR 0x00 | |
38 | #define FLIPPER_ICR_RSS (1<<16) /* reset switch state */ | |
39 | ||
40 | #define FLIPPER_IMR 0x04 | |
41 | ||
42 | #define FLIPPER_RESET 0x24 | |
43 | ||
44 | ||
45 | /* | |
46 | * IRQ chip hooks. | |
47 | * | |
48 | */ | |
49 | ||
0bf8878e | 50 | static void flipper_pic_mask_and_ack(struct irq_data *d) |
028ee972 | 51 | { |
476eb491 | 52 | int irq = irqd_to_hwirq(d); |
0bf8878e | 53 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
028ee972 AH |
54 | u32 mask = 1 << irq; |
55 | ||
56 | clrbits32(io_base + FLIPPER_IMR, mask); | |
57 | /* this is at least needed for RSW */ | |
58 | out_be32(io_base + FLIPPER_ICR, mask); | |
59 | } | |
60 | ||
0bf8878e | 61 | static void flipper_pic_ack(struct irq_data *d) |
028ee972 | 62 | { |
476eb491 | 63 | int irq = irqd_to_hwirq(d); |
0bf8878e | 64 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
028ee972 AH |
65 | |
66 | /* this is at least needed for RSW */ | |
67 | out_be32(io_base + FLIPPER_ICR, 1 << irq); | |
68 | } | |
69 | ||
0bf8878e | 70 | static void flipper_pic_mask(struct irq_data *d) |
028ee972 | 71 | { |
476eb491 | 72 | int irq = irqd_to_hwirq(d); |
0bf8878e | 73 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
028ee972 AH |
74 | |
75 | clrbits32(io_base + FLIPPER_IMR, 1 << irq); | |
76 | } | |
77 | ||
0bf8878e | 78 | static void flipper_pic_unmask(struct irq_data *d) |
028ee972 | 79 | { |
476eb491 | 80 | int irq = irqd_to_hwirq(d); |
0bf8878e | 81 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
028ee972 AH |
82 | |
83 | setbits32(io_base + FLIPPER_IMR, 1 << irq); | |
84 | } | |
85 | ||
86 | ||
87 | static struct irq_chip flipper_pic = { | |
88 | .name = "flipper-pic", | |
0bf8878e LB |
89 | .irq_ack = flipper_pic_ack, |
90 | .irq_mask_ack = flipper_pic_mask_and_ack, | |
91 | .irq_mask = flipper_pic_mask, | |
92 | .irq_unmask = flipper_pic_unmask, | |
028ee972 AH |
93 | }; |
94 | ||
95 | /* | |
96 | * IRQ host hooks. | |
97 | * | |
98 | */ | |
99 | ||
bae1d8f1 | 100 | static struct irq_domain *flipper_irq_host; |
028ee972 | 101 | |
bae1d8f1 | 102 | static int flipper_pic_map(struct irq_domain *h, unsigned int virq, |
028ee972 AH |
103 | irq_hw_number_t hwirq) |
104 | { | |
ec775d0e | 105 | irq_set_chip_data(virq, h->host_data); |
98488db9 | 106 | irq_set_status_flags(virq, IRQ_LEVEL); |
ec775d0e | 107 | irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq); |
028ee972 AH |
108 | return 0; |
109 | } | |
110 | ||
ad3aedfb MZ |
111 | static int flipper_pic_match(struct irq_domain *h, struct device_node *np, |
112 | enum irq_domain_bus_token bus_token) | |
028ee972 AH |
113 | { |
114 | return 1; | |
115 | } | |
116 | ||
117 | ||
9f70b8eb | 118 | static const struct irq_domain_ops flipper_irq_domain_ops = { |
028ee972 | 119 | .map = flipper_pic_map, |
028ee972 AH |
120 | .match = flipper_pic_match, |
121 | }; | |
122 | ||
123 | /* | |
124 | * Platform hooks. | |
125 | * | |
126 | */ | |
127 | ||
128 | static void __flipper_quiesce(void __iomem *io_base) | |
129 | { | |
130 | /* mask and ack all IRQs */ | |
131 | out_be32(io_base + FLIPPER_IMR, 0x00000000); | |
132 | out_be32(io_base + FLIPPER_ICR, 0xffffffff); | |
133 | } | |
134 | ||
bae1d8f1 | 135 | struct irq_domain * __init flipper_pic_init(struct device_node *np) |
028ee972 AH |
136 | { |
137 | struct device_node *pi; | |
bae1d8f1 | 138 | struct irq_domain *irq_domain = NULL; |
028ee972 AH |
139 | struct resource res; |
140 | void __iomem *io_base; | |
141 | int retval; | |
142 | ||
143 | pi = of_get_parent(np); | |
144 | if (!pi) { | |
145 | pr_err("no parent found\n"); | |
146 | goto out; | |
147 | } | |
148 | if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) { | |
149 | pr_err("unexpected parent compatible\n"); | |
150 | goto out; | |
151 | } | |
152 | ||
153 | retval = of_address_to_resource(pi, 0, &res); | |
154 | if (retval) { | |
155 | pr_err("no io memory range found\n"); | |
156 | goto out; | |
157 | } | |
158 | io_base = ioremap(res.start, resource_size(&res)); | |
159 | ||
160 | pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base); | |
161 | ||
162 | __flipper_quiesce(io_base); | |
163 | ||
a8db8cf0 GL |
164 | irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS, |
165 | &flipper_irq_domain_ops, io_base); | |
bae1d8f1 GL |
166 | if (!irq_domain) { |
167 | pr_err("failed to allocate irq_domain\n"); | |
028ee972 AH |
168 | return NULL; |
169 | } | |
170 | ||
028ee972 | 171 | out: |
bae1d8f1 | 172 | return irq_domain; |
028ee972 AH |
173 | } |
174 | ||
175 | unsigned int flipper_pic_get_irq(void) | |
176 | { | |
6d166fec | 177 | void __iomem *io_base = flipper_irq_host->host_data; |
028ee972 AH |
178 | int irq; |
179 | u32 irq_status; | |
180 | ||
181 | irq_status = in_be32(io_base + FLIPPER_ICR) & | |
182 | in_be32(io_base + FLIPPER_IMR); | |
183 | if (irq_status == 0) | |
184 | return NO_IRQ; /* no more IRQs pending */ | |
185 | ||
186 | irq = __ffs(irq_status); | |
6d166fec | 187 | return irq_linear_revmap(flipper_irq_host, irq); |
028ee972 AH |
188 | } |
189 | ||
190 | /* | |
191 | * Probe function. | |
192 | * | |
193 | */ | |
194 | ||
195 | void __init flipper_pic_probe(void) | |
196 | { | |
197 | struct device_node *np; | |
198 | ||
199 | np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-pic"); | |
200 | BUG_ON(!np); | |
201 | ||
6d166fec | 202 | flipper_irq_host = flipper_pic_init(np); |
028ee972 AH |
203 | BUG_ON(!flipper_irq_host); |
204 | ||
205 | irq_set_default_host(flipper_irq_host); | |
206 | ||
207 | of_node_put(np); | |
208 | } | |
209 | ||
210 | /* | |
211 | * Misc functions related to the flipper chipset. | |
212 | * | |
213 | */ | |
214 | ||
215 | /** | |
216 | * flipper_quiesce() - quiesce flipper irq controller | |
217 | * | |
218 | * Mask and ack all interrupt sources. | |
219 | * | |
220 | */ | |
221 | void flipper_quiesce(void) | |
222 | { | |
223 | void __iomem *io_base = flipper_irq_host->host_data; | |
224 | ||
225 | __flipper_quiesce(io_base); | |
226 | } | |
227 | ||
228 | /* | |
229 | * Resets the platform. | |
230 | */ | |
231 | void flipper_platform_reset(void) | |
232 | { | |
233 | void __iomem *io_base; | |
234 | ||
235 | if (flipper_irq_host && flipper_irq_host->host_data) { | |
236 | io_base = flipper_irq_host->host_data; | |
237 | out_8(io_base + FLIPPER_RESET, 0x00); | |
238 | } | |
239 | } | |
240 | ||
241 | /* | |
242 | * Returns non-zero if the reset button is pressed. | |
243 | */ | |
244 | int flipper_is_reset_button_pressed(void) | |
245 | { | |
246 | void __iomem *io_base; | |
247 | u32 icr; | |
248 | ||
249 | if (flipper_irq_host && flipper_irq_host->host_data) { | |
250 | io_base = flipper_irq_host->host_data; | |
251 | icr = in_be32(io_base + FLIPPER_ICR); | |
252 | return !(icr & FLIPPER_ICR_RSS); | |
253 | } | |
254 | return 0; | |
255 | } | |
256 |