[POWERPC] spufs: invalidate SLB translation before adding a new entry
[linux-block.git] / arch / powerpc / platforms / cell / spu_base.c
CommitLineData
67207b96
AB
1/*
2 * Low-level SPU handling
3 *
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5 *
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
3b3d22cb 23#undef DEBUG
67207b96
AB
24
25#include <linux/interrupt.h>
26#include <linux/list.h>
27#include <linux/module.h>
67207b96
AB
28#include <linux/ptrace.h>
29#include <linux/slab.h>
30#include <linux/wait.h>
e28b0031
GL
31#include <linux/mm.h>
32#include <linux/io.h>
14cc3e2b 33#include <linux/mutex.h>
bce94513 34#include <linux/linux_logo.h>
67207b96 35#include <asm/spu.h>
540270d8 36#include <asm/spu_priv1.h>
58bd403c 37#include <asm/spu_csa.h>
ff8a8f25 38#include <asm/xmon.h>
3ad216ca 39#include <asm/prom.h>
67207b96 40
e28b0031 41const struct spu_management_ops *spu_management_ops;
ccf17e9d
JK
42EXPORT_SYMBOL_GPL(spu_management_ops);
43
540270d8 44const struct spu_priv1_ops *spu_priv1_ops;
24140594 45EXPORT_SYMBOL_GPL(spu_priv1_ops);
540270d8 46
24140594
CH
47struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
48EXPORT_SYMBOL_GPL(cbe_spu_info);
94b2a439 49
3ce2f62b
JK
50/*
51 * The spufs fault-handling code needs to call force_sig_info to raise signals
52 * on DMA errors. Export it here to avoid general kernel-wide access to this
53 * function
54 */
55EXPORT_SYMBOL_GPL(force_sig_info);
56
24140594
CH
57/*
58 * Protects cbe_spu_info and spu->number.
59 */
60static DEFINE_SPINLOCK(spu_lock);
61
62/*
63 * List of all spus in the system.
64 *
65 * This list is iterated by callers from irq context and callers that
66 * want to sleep. Thus modifications need to be done with both
67 * spu_full_list_lock and spu_full_list_mutex held, while iterating
68 * through it requires either of these locks.
69 *
70 * In addition spu_full_list_lock protects all assignmens to
71 * spu->mm.
72 */
73static LIST_HEAD(spu_full_list);
74static DEFINE_SPINLOCK(spu_full_list_lock);
75static DEFINE_MUTEX(spu_full_list_mutex);
540270d8 76
58bd403c
JK
77struct spu_slb {
78 u64 esid, vsid;
79};
80
94b2a439
BH
81void spu_invalidate_slbs(struct spu *spu)
82{
83 struct spu_priv2 __iomem *priv2 = spu->priv2;
84
85 if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
86 out_be64(&priv2->slb_invalidate_all_W, 0UL);
87}
88EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
89
90/* This is called by the MM core when a segment size is changed, to
91 * request a flush of all the SPEs using a given mm
92 */
93void spu_flush_all_slbs(struct mm_struct *mm)
94{
95 struct spu *spu;
96 unsigned long flags;
97
24140594 98 spin_lock_irqsave(&spu_full_list_lock, flags);
94b2a439
BH
99 list_for_each_entry(spu, &spu_full_list, full_list) {
100 if (spu->mm == mm)
101 spu_invalidate_slbs(spu);
102 }
24140594 103 spin_unlock_irqrestore(&spu_full_list_lock, flags);
94b2a439
BH
104}
105
106/* The hack below stinks... try to do something better one of
107 * these days... Does it even work properly with NR_CPUS == 1 ?
108 */
109static inline void mm_needs_global_tlbie(struct mm_struct *mm)
110{
111 int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
112
113 /* Global TLBIE broadcast required with SPEs. */
114 __cpus_setall(&mm->cpu_vm_mask, nr);
115}
116
117void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
118{
119 unsigned long flags;
120
24140594 121 spin_lock_irqsave(&spu_full_list_lock, flags);
94b2a439 122 spu->mm = mm;
24140594 123 spin_unlock_irqrestore(&spu_full_list_lock, flags);
94b2a439
BH
124 if (mm)
125 mm_needs_global_tlbie(mm);
126}
127EXPORT_SYMBOL_GPL(spu_associate_mm);
128
f6eb7d7f
JK
129int spu_64k_pages_available(void)
130{
131 return mmu_psize_defs[MMU_PAGE_64K].shift != 0;
132}
133EXPORT_SYMBOL_GPL(spu_64k_pages_available);
134
67207b96
AB
135static void spu_restart_dma(struct spu *spu)
136{
137 struct spu_priv2 __iomem *priv2 = spu->priv2;
5473af04 138
8837d921 139 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
5473af04 140 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
67207b96
AB
141}
142
58bd403c
JK
143static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
144{
145 struct spu_priv2 __iomem *priv2 = spu->priv2;
146
147 pr_debug("%s: adding SLB[%d] 0x%016lx 0x%016lx\n",
148 __func__, slbe, slb->vsid, slb->esid);
149
150 out_be64(&priv2->slb_index_W, slbe);
cc4b7c18
AB
151 /* set invalid before writing vsid */
152 out_be64(&priv2->slb_esid_RW, 0);
153 /* now it's safe to write the vsid */
58bd403c 154 out_be64(&priv2->slb_vsid_RW, slb->vsid);
cc4b7c18 155 /* setting the new esid makes the entry valid again */
58bd403c
JK
156 out_be64(&priv2->slb_esid_RW, slb->esid);
157}
158
67207b96
AB
159static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
160{
8b3d6663 161 struct mm_struct *mm = spu->mm;
4d43466d 162 struct spu_slb slb;
94b2a439 163 int psize;
67207b96
AB
164
165 pr_debug("%s\n", __FUNCTION__);
166
4d43466d 167 slb.esid = (ea & ESID_MASK) | SLB_ESID_V;
0afacde3 168
169 switch(REGION_ID(ea)) {
170 case USER_REGION_ID:
d0f13e3c
BH
171#ifdef CONFIG_PPC_MM_SLICES
172 psize = get_slice_psize(mm, ea);
173#else
174 psize = mm->context.user_psize;
0afacde3 175#endif
4d43466d
JK
176 slb.vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M)
177 << SLB_VSID_SHIFT) | SLB_VSID_USER;
0afacde3 178 break;
179 case VMALLOC_REGION_ID:
94b2a439
BH
180 if (ea < VMALLOC_END)
181 psize = mmu_vmalloc_psize;
182 else
183 psize = mmu_io_psize;
4d43466d
JK
184 slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
185 << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
0afacde3 186 break;
187 case KERNEL_REGION_ID:
94b2a439 188 psize = mmu_linear_psize;
4d43466d
JK
189 slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
190 << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
0afacde3 191 break;
192 default:
8b3d6663
AB
193 /* Future: support kernel segments so that drivers
194 * can use SPUs.
195 */
67207b96
AB
196 pr_debug("invalid region access at %016lx\n", ea);
197 return 1;
198 }
4d43466d 199 slb.vsid |= mmu_psize_defs[psize].sllp;
67207b96 200
4d43466d 201 spu_load_slb(spu, spu->slb_replace, &slb);
8b3d6663
AB
202
203 spu->slb_replace++;
67207b96
AB
204 if (spu->slb_replace >= 8)
205 spu->slb_replace = 0;
206
67207b96 207 spu_restart_dma(spu);
e9f8a0b6 208 spu->stats.slb_flt++;
67207b96
AB
209 return 0;
210}
211
5473af04 212extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
8b3d6663 213static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
67207b96 214{
a33a7d73 215 pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
67207b96 216
5473af04
MN
217 /* Handle kernel space hash faults immediately.
218 User hash faults need to be deferred to process context. */
219 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
220 && REGION_ID(ea) != USER_REGION_ID
221 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
222 spu_restart_dma(spu);
223 return 0;
224 }
225
d6ad39bc 226 spu->class_0_pending = 0;
8b3d6663
AB
227 spu->dar = ea;
228 spu->dsisr = dsisr;
d6ad39bc 229
ba723fe2 230 spu->stop_callback(spu);
d6ad39bc 231
67207b96
AB
232 return 0;
233}
234
58bd403c
JK
235static void __spu_kernel_slb(void *addr, struct spu_slb *slb)
236{
237 unsigned long ea = (unsigned long)addr;
238 u64 llp;
239
240 if (REGION_ID(ea) == KERNEL_REGION_ID)
241 llp = mmu_psize_defs[mmu_linear_psize].sllp;
242 else
243 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
244
245 slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
246 SLB_VSID_KERNEL | llp;
247 slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
248}
249
684bd614
JK
250/**
251 * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
252 * address @new_addr is present.
253 */
254static inline int __slb_present(struct spu_slb *slbs, int nr_slbs,
255 void *new_addr)
256{
257 unsigned long ea = (unsigned long)new_addr;
258 int i;
259
260 for (i = 0; i < nr_slbs; i++)
261 if (!((slbs[i].esid ^ ea) & ESID_MASK))
262 return 1;
263
264 return 0;
265}
266
58bd403c
JK
267/**
268 * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
269 * need to map both the context save area, and the save/restore code.
684bd614
JK
270 *
271 * Because the lscsa and code may cross segment boundaires, we check to see
272 * if mappings are required for the start and end of each range. We currently
273 * assume that the mappings are smaller that one segment - if not, something
274 * is seriously wrong.
58bd403c 275 */
684bd614
JK
276void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
277 void *code, int code_size)
58bd403c 278{
684bd614
JK
279 struct spu_slb slbs[4];
280 int i, nr_slbs = 0;
281 /* start and end addresses of both mappings */
282 void *addrs[] = {
283 lscsa, (void *)lscsa + sizeof(*lscsa) - 1,
284 code, code + code_size - 1
285 };
286
287 /* check the set of addresses, and create a new entry in the slbs array
288 * if there isn't already a SLB for that address */
289 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
290 if (__slb_present(slbs, nr_slbs, addrs[i]))
291 continue;
292
293 __spu_kernel_slb(addrs[i], &slbs[nr_slbs]);
294 nr_slbs++;
295 }
58bd403c 296
684bd614
JK
297 /* Add the set of SLBs */
298 for (i = 0; i < nr_slbs; i++)
299 spu_load_slb(spu, i, &slbs[i]);
58bd403c
JK
300}
301EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
302
67207b96 303static irqreturn_t
f5a92458 304spu_irq_class_0(int irq, void *data)
67207b96
AB
305{
306 struct spu *spu;
b7f90a40 307 unsigned long stat, mask;
67207b96
AB
308
309 spu = data;
b7f90a40 310
d6ad39bc 311 spin_lock(&spu->register_lock);
b7f90a40 312 mask = spu_int_mask_get(spu, 0);
d6ad39bc 313 stat = spu_int_stat_get(spu, 0) & mask;
b7f90a40 314
b7f90a40 315 spu->class_0_pending |= stat;
d6ad39bc
JK
316 spu->dsisr = spu_mfc_dsisr_get(spu);
317 spu->dar = spu_mfc_dar_get(spu);
b7f90a40
MN
318 spin_unlock(&spu->register_lock);
319
ba723fe2 320 spu->stop_callback(spu);
67207b96 321
b7f90a40
MN
322 spu_int_stat_clear(spu, 0, stat);
323
67207b96
AB
324 return IRQ_HANDLED;
325}
326
67207b96 327static irqreturn_t
f5a92458 328spu_irq_class_1(int irq, void *data)
67207b96
AB
329{
330 struct spu *spu;
8b3d6663 331 unsigned long stat, mask, dar, dsisr;
67207b96
AB
332
333 spu = data;
8b3d6663
AB
334
335 /* atomically read & clear class1 status. */
336 spin_lock(&spu->register_lock);
f0831acc
AB
337 mask = spu_int_mask_get(spu, 1);
338 stat = spu_int_stat_get(spu, 1) & mask;
339 dar = spu_mfc_dar_get(spu);
340 dsisr = spu_mfc_dsisr_get(spu);
8af30675 341 if (stat & CLASS1_STORAGE_FAULT_INTR)
f0831acc
AB
342 spu_mfc_dsisr_set(spu, 0ul);
343 spu_int_stat_clear(spu, 1, stat);
8b3d6663 344 spin_unlock(&spu->register_lock);
a33a7d73
AB
345 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
346 dar, dsisr);
67207b96 347
8af30675 348 if (stat & CLASS1_SEGMENT_FAULT_INTR)
67207b96
AB
349 __spu_trap_data_seg(spu, dar);
350
8af30675 351 if (stat & CLASS1_STORAGE_FAULT_INTR)
8b3d6663 352 __spu_trap_data_map(spu, dar, dsisr);
67207b96 353
8af30675 354 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR)
67207b96
AB
355 ;
356
8af30675 357 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
67207b96
AB
358 ;
359
67207b96
AB
360 return stat ? IRQ_HANDLED : IRQ_NONE;
361}
362
363static irqreturn_t
f5a92458 364spu_irq_class_2(int irq, void *data)
67207b96
AB
365{
366 struct spu *spu;
367 unsigned long stat;
3a843d7c 368 unsigned long mask;
8af30675
JK
369 const int mailbox_intrs =
370 CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR;
67207b96
AB
371
372 spu = data;
ba723fe2 373 spin_lock(&spu->register_lock);
f0831acc
AB
374 stat = spu_int_stat_get(spu, 2);
375 mask = spu_int_mask_get(spu, 2);
ba723fe2
MN
376 /* ignore interrupts we're not waiting for */
377 stat &= mask;
8af30675
JK
378
379 /* mailbox interrupts are level triggered. mask them now before
380 * acknowledging */
381 if (stat & mailbox_intrs)
382 spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs));
ba723fe2
MN
383 /* acknowledge all interrupts before the callbacks */
384 spu_int_stat_clear(spu, 2, stat);
385 spin_unlock(&spu->register_lock);
67207b96 386
3a843d7c 387 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
67207b96 388
8af30675 389 if (stat & CLASS2_MAILBOX_INTR)
ba723fe2 390 spu->ibox_callback(spu);
67207b96 391
8af30675 392 if (stat & CLASS2_SPU_STOP_INTR)
ba723fe2 393 spu->stop_callback(spu);
67207b96 394
8af30675 395 if (stat & CLASS2_SPU_HALT_INTR)
ba723fe2 396 spu->stop_callback(spu);
67207b96 397
8af30675 398 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
ba723fe2 399 spu->mfc_callback(spu);
67207b96 400
8af30675 401 if (stat & CLASS2_MAILBOX_THRESHOLD_INTR)
ba723fe2 402 spu->wbox_callback(spu);
67207b96 403
e9f8a0b6 404 spu->stats.class2_intr++;
67207b96
AB
405 return stat ? IRQ_HANDLED : IRQ_NONE;
406}
407
0ebfff14 408static int spu_request_irqs(struct spu *spu)
67207b96 409{
0ebfff14 410 int ret = 0;
67207b96 411
0ebfff14
BH
412 if (spu->irqs[0] != NO_IRQ) {
413 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
414 spu->number);
415 ret = request_irq(spu->irqs[0], spu_irq_class_0,
416 IRQF_DISABLED,
417 spu->irq_c0, spu);
418 if (ret)
419 goto bail0;
420 }
421 if (spu->irqs[1] != NO_IRQ) {
422 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
423 spu->number);
424 ret = request_irq(spu->irqs[1], spu_irq_class_1,
425 IRQF_DISABLED,
426 spu->irq_c1, spu);
427 if (ret)
428 goto bail1;
429 }
430 if (spu->irqs[2] != NO_IRQ) {
431 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
432 spu->number);
433 ret = request_irq(spu->irqs[2], spu_irq_class_2,
434 IRQF_DISABLED,
435 spu->irq_c2, spu);
436 if (ret)
437 goto bail2;
438 }
439 return 0;
67207b96 440
0ebfff14
BH
441bail2:
442 if (spu->irqs[1] != NO_IRQ)
443 free_irq(spu->irqs[1], spu);
444bail1:
445 if (spu->irqs[0] != NO_IRQ)
446 free_irq(spu->irqs[0], spu);
447bail0:
67207b96
AB
448 return ret;
449}
450
0ebfff14 451static void spu_free_irqs(struct spu *spu)
67207b96 452{
0ebfff14
BH
453 if (spu->irqs[0] != NO_IRQ)
454 free_irq(spu->irqs[0], spu);
455 if (spu->irqs[1] != NO_IRQ)
456 free_irq(spu->irqs[1], spu);
457 if (spu->irqs[2] != NO_IRQ)
458 free_irq(spu->irqs[2], spu);
67207b96
AB
459}
460
486acd48 461void spu_init_channels(struct spu *spu)
67207b96
AB
462{
463 static const struct {
464 unsigned channel;
465 unsigned count;
466 } zero_list[] = {
467 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
468 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
469 }, count_list[] = {
470 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
471 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
472 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
473 };
6ff730c3 474 struct spu_priv2 __iomem *priv2;
67207b96
AB
475 int i;
476
477 priv2 = spu->priv2;
478
479 /* initialize all channel data to zero */
480 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
481 int count;
482
483 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
484 for (count = 0; count < zero_list[i].count; count++)
485 out_be64(&priv2->spu_chnldata_RW, 0);
486 }
487
488 /* initialize channel counts to meaningful values */
489 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
490 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
491 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
492 }
493}
486acd48 494EXPORT_SYMBOL_GPL(spu_init_channels);
67207b96 495
6deac066
GL
496static int spu_shutdown(struct sys_device *sysdev)
497{
498 struct spu *spu = container_of(sysdev, struct spu, sysdev);
499
500 spu_free_irqs(spu);
501 spu_destroy_spu(spu);
502 return 0;
503}
504
1238819a 505static struct sysdev_class spu_sysdev_class = {
af5ca3f4 506 .name = "spu",
6deac066 507 .shutdown = spu_shutdown,
1d64093f
JK
508};
509
e570beb6
CK
510int spu_add_sysdev_attr(struct sysdev_attribute *attr)
511{
512 struct spu *spu;
e570beb6 513
24140594 514 mutex_lock(&spu_full_list_mutex);
e570beb6
CK
515 list_for_each_entry(spu, &spu_full_list, full_list)
516 sysdev_create_file(&spu->sysdev, attr);
24140594 517 mutex_unlock(&spu_full_list_mutex);
e570beb6 518
e570beb6
CK
519 return 0;
520}
521EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
522
523int spu_add_sysdev_attr_group(struct attribute_group *attrs)
524{
525 struct spu *spu;
1e771039 526 int rc = 0;
e570beb6 527
24140594 528 mutex_lock(&spu_full_list_mutex);
1e771039
JK
529 list_for_each_entry(spu, &spu_full_list, full_list) {
530 rc = sysfs_create_group(&spu->sysdev.kobj, attrs);
531
532 /* we're in trouble here, but try unwinding anyway */
533 if (rc) {
534 printk(KERN_ERR "%s: can't create sysfs group '%s'\n",
535 __func__, attrs->name);
536
537 list_for_each_entry_continue_reverse(spu,
538 &spu_full_list, full_list)
539 sysfs_remove_group(&spu->sysdev.kobj, attrs);
540 break;
541 }
542 }
543
24140594 544 mutex_unlock(&spu_full_list_mutex);
e570beb6 545
1e771039 546 return rc;
e570beb6
CK
547}
548EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
549
550
551void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
552{
553 struct spu *spu;
e570beb6 554
24140594 555 mutex_lock(&spu_full_list_mutex);
e570beb6
CK
556 list_for_each_entry(spu, &spu_full_list, full_list)
557 sysdev_remove_file(&spu->sysdev, attr);
24140594 558 mutex_unlock(&spu_full_list_mutex);
e570beb6
CK
559}
560EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
561
562void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
563{
564 struct spu *spu;
e570beb6 565
24140594 566 mutex_lock(&spu_full_list_mutex);
e570beb6
CK
567 list_for_each_entry(spu, &spu_full_list, full_list)
568 sysfs_remove_group(&spu->sysdev.kobj, attrs);
24140594 569 mutex_unlock(&spu_full_list_mutex);
e570beb6
CK
570}
571EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
572
1d64093f
JK
573static int spu_create_sysdev(struct spu *spu)
574{
575 int ret;
576
577 spu->sysdev.id = spu->number;
578 spu->sysdev.cls = &spu_sysdev_class;
579 ret = sysdev_register(&spu->sysdev);
580 if (ret) {
581 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
582 spu->number);
583 return ret;
584 }
585
0021550c 586 sysfs_add_device_to_node(&spu->sysdev, spu->node);
1d64093f
JK
587
588 return 0;
589}
590
e28b0031 591static int __init create_spu(void *data)
67207b96
AB
592{
593 struct spu *spu;
594 int ret;
595 static int number;
94b2a439 596 unsigned long flags;
27ec41d3 597 struct timespec ts;
67207b96
AB
598
599 ret = -ENOMEM;
ecec2177 600 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
67207b96
AB
601 if (!spu)
602 goto out;
603
486acd48
CH
604 spu->alloc_state = SPU_FREE;
605
e28b0031 606 spin_lock_init(&spu->register_lock);
24140594 607 spin_lock(&spu_lock);
e28b0031 608 spu->number = number++;
24140594 609 spin_unlock(&spu_lock);
e28b0031
GL
610
611 ret = spu_create_spu(spu, data);
e5267b4b 612
67207b96
AB
613 if (ret)
614 goto out_free;
615
24f43b33 616 spu_mfc_sdr_setup(spu);
f0831acc 617 spu_mfc_sr1_set(spu, 0x33);
67207b96
AB
618 ret = spu_request_irqs(spu);
619 if (ret)
e28b0031 620 goto out_destroy;
67207b96 621
1d64093f
JK
622 ret = spu_create_sysdev(spu);
623 if (ret)
624 goto out_free_irqs;
625
486acd48 626 mutex_lock(&cbe_spu_info[spu->node].list_mutex);
aa6d5b20
AB
627 list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
628 cbe_spu_info[spu->node].n_spus++;
486acd48 629 mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
24140594
CH
630
631 mutex_lock(&spu_full_list_mutex);
632 spin_lock_irqsave(&spu_full_list_lock, flags);
e570beb6 633 list_add(&spu->full_list, &spu_full_list);
24140594
CH
634 spin_unlock_irqrestore(&spu_full_list_lock, flags);
635 mutex_unlock(&spu_full_list_mutex);
67207b96 636
27ec41d3
AD
637 spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
638 ktime_get_ts(&ts);
639 spu->stats.tstamp = timespec_to_ns(&ts);
fe2f896d 640
9d92af62
AB
641 INIT_LIST_HEAD(&spu->aff_list);
642
67207b96
AB
643 goto out;
644
1d64093f
JK
645out_free_irqs:
646 spu_free_irqs(spu);
e28b0031
GL
647out_destroy:
648 spu_destroy_spu(spu);
67207b96
AB
649out_free:
650 kfree(spu);
651out:
652 return ret;
653}
654
fe2f896d
CH
655static const char *spu_state_names[] = {
656 "user", "system", "iowait", "idle"
657};
658
659static unsigned long long spu_acct_time(struct spu *spu,
660 enum spu_utilization_state state)
661{
27ec41d3 662 struct timespec ts;
fe2f896d
CH
663 unsigned long long time = spu->stats.times[state];
664
27ec41d3
AD
665 /*
666 * If the spu is idle or the context is stopped, utilization
667 * statistics are not updated. Apply the time delta from the
668 * last recorded state of the spu.
669 */
670 if (spu->stats.util_state == state) {
671 ktime_get_ts(&ts);
672 time += timespec_to_ns(&ts) - spu->stats.tstamp;
673 }
fe2f896d 674
27ec41d3 675 return time / NSEC_PER_MSEC;
fe2f896d
CH
676}
677
678
679static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf)
680{
681 struct spu *spu = container_of(sysdev, struct spu, sysdev);
682
683 return sprintf(buf, "%s %llu %llu %llu %llu "
684 "%llu %llu %llu %llu %llu %llu %llu %llu\n",
27ec41d3 685 spu_state_names[spu->stats.util_state],
fe2f896d
CH
686 spu_acct_time(spu, SPU_UTIL_USER),
687 spu_acct_time(spu, SPU_UTIL_SYSTEM),
688 spu_acct_time(spu, SPU_UTIL_IOWAIT),
27ec41d3 689 spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
fe2f896d
CH
690 spu->stats.vol_ctx_switch,
691 spu->stats.invol_ctx_switch,
692 spu->stats.slb_flt,
693 spu->stats.hash_flt,
694 spu->stats.min_flt,
695 spu->stats.maj_flt,
696 spu->stats.class2_intr,
697 spu->stats.libassist);
698}
699
700static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
701
67207b96
AB
702static int __init init_spu_base(void)
703{
befdc746 704 int i, ret = 0;
67207b96 705
aa6d5b20 706 for (i = 0; i < MAX_NUMNODES; i++) {
486acd48 707 mutex_init(&cbe_spu_info[i].list_mutex);
aa6d5b20 708 INIT_LIST_HEAD(&cbe_spu_info[i].spus);
aa6d5b20 709 }
ccf17e9d 710
da06aa08 711 if (!spu_management_ops)
befdc746 712 goto out;
da06aa08 713
1d64093f
JK
714 /* create sysdev class for spus */
715 ret = sysdev_class_register(&spu_sysdev_class);
716 if (ret)
befdc746 717 goto out;
1d64093f 718
e28b0031
GL
719 ret = spu_enumerate_spus(create_spu);
720
bce94513 721 if (ret < 0) {
e28b0031
GL
722 printk(KERN_WARNING "%s: Error initializing spus\n",
723 __FUNCTION__);
befdc746 724 goto out_unregister_sysdev_class;
67207b96 725 }
ff8a8f25 726
bce94513
GU
727 if (ret > 0) {
728 /*
729 * We cannot put the forward declaration in
730 * <linux/linux_logo.h> because of conflicting session type
731 * conflicts for const and __initdata with different compiler
732 * versions
733 */
734 extern const struct linux_logo logo_spe_clut224;
735
736 fb_append_extra_logo(&logo_spe_clut224, ret);
737 }
738
24140594 739 mutex_lock(&spu_full_list_mutex);
ff8a8f25 740 xmon_register_spus(&spu_full_list);
8d2655e6 741 crash_register_spus(&spu_full_list);
24140594 742 mutex_unlock(&spu_full_list_mutex);
fe2f896d
CH
743 spu_add_sysdev_attr(&attr_stat);
744
f5996449 745 spu_init_affinity();
3ad216ca 746
befdc746
CH
747 return 0;
748
749 out_unregister_sysdev_class:
750 sysdev_class_unregister(&spu_sysdev_class);
751 out:
67207b96
AB
752 return ret;
753}
754module_init(init_spu_base);
755
756MODULE_LICENSE("GPL");
757MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");