Commit | Line | Data |
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67207b96 AB |
1 | /* |
2 | * Low-level SPU handling | |
3 | * | |
4 | * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 | |
5 | * | |
6 | * Author: Arnd Bergmann <arndb@de.ibm.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2, or (at your option) | |
11 | * any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
3b3d22cb | 23 | #undef DEBUG |
67207b96 AB |
24 | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/list.h> | |
27 | #include <linux/module.h> | |
67207b96 AB |
28 | #include <linux/ptrace.h> |
29 | #include <linux/slab.h> | |
30 | #include <linux/wait.h> | |
e28b0031 GL |
31 | #include <linux/mm.h> |
32 | #include <linux/io.h> | |
14cc3e2b | 33 | #include <linux/mutex.h> |
bce94513 | 34 | #include <linux/linux_logo.h> |
67207b96 | 35 | #include <asm/spu.h> |
540270d8 | 36 | #include <asm/spu_priv1.h> |
ff8a8f25 | 37 | #include <asm/xmon.h> |
67207b96 | 38 | |
e28b0031 | 39 | const struct spu_management_ops *spu_management_ops; |
ccf17e9d JK |
40 | EXPORT_SYMBOL_GPL(spu_management_ops); |
41 | ||
540270d8 GL |
42 | const struct spu_priv1_ops *spu_priv1_ops; |
43 | ||
94b2a439 BH |
44 | static LIST_HEAD(spu_full_list); |
45 | static DEFINE_MUTEX(spu_mutex); | |
057b184a | 46 | static DEFINE_SPINLOCK(spu_list_lock); |
94b2a439 | 47 | |
540270d8 GL |
48 | EXPORT_SYMBOL_GPL(spu_priv1_ops); |
49 | ||
94b2a439 BH |
50 | void spu_invalidate_slbs(struct spu *spu) |
51 | { | |
52 | struct spu_priv2 __iomem *priv2 = spu->priv2; | |
53 | ||
54 | if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK) | |
55 | out_be64(&priv2->slb_invalidate_all_W, 0UL); | |
56 | } | |
57 | EXPORT_SYMBOL_GPL(spu_invalidate_slbs); | |
58 | ||
59 | /* This is called by the MM core when a segment size is changed, to | |
60 | * request a flush of all the SPEs using a given mm | |
61 | */ | |
62 | void spu_flush_all_slbs(struct mm_struct *mm) | |
63 | { | |
64 | struct spu *spu; | |
65 | unsigned long flags; | |
66 | ||
67 | spin_lock_irqsave(&spu_list_lock, flags); | |
68 | list_for_each_entry(spu, &spu_full_list, full_list) { | |
69 | if (spu->mm == mm) | |
70 | spu_invalidate_slbs(spu); | |
71 | } | |
72 | spin_unlock_irqrestore(&spu_list_lock, flags); | |
73 | } | |
74 | ||
75 | /* The hack below stinks... try to do something better one of | |
76 | * these days... Does it even work properly with NR_CPUS == 1 ? | |
77 | */ | |
78 | static inline void mm_needs_global_tlbie(struct mm_struct *mm) | |
79 | { | |
80 | int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1; | |
81 | ||
82 | /* Global TLBIE broadcast required with SPEs. */ | |
83 | __cpus_setall(&mm->cpu_vm_mask, nr); | |
84 | } | |
85 | ||
86 | void spu_associate_mm(struct spu *spu, struct mm_struct *mm) | |
87 | { | |
88 | unsigned long flags; | |
89 | ||
90 | spin_lock_irqsave(&spu_list_lock, flags); | |
91 | spu->mm = mm; | |
92 | spin_unlock_irqrestore(&spu_list_lock, flags); | |
93 | if (mm) | |
94 | mm_needs_global_tlbie(mm); | |
95 | } | |
96 | EXPORT_SYMBOL_GPL(spu_associate_mm); | |
97 | ||
67207b96 AB |
98 | static int __spu_trap_invalid_dma(struct spu *spu) |
99 | { | |
100 | pr_debug("%s\n", __FUNCTION__); | |
9add11da | 101 | spu->dma_callback(spu, SPE_EVENT_INVALID_DMA); |
67207b96 AB |
102 | return 0; |
103 | } | |
104 | ||
105 | static int __spu_trap_dma_align(struct spu *spu) | |
106 | { | |
107 | pr_debug("%s\n", __FUNCTION__); | |
9add11da | 108 | spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT); |
67207b96 AB |
109 | return 0; |
110 | } | |
111 | ||
112 | static int __spu_trap_error(struct spu *spu) | |
113 | { | |
114 | pr_debug("%s\n", __FUNCTION__); | |
9add11da | 115 | spu->dma_callback(spu, SPE_EVENT_SPE_ERROR); |
67207b96 AB |
116 | return 0; |
117 | } | |
118 | ||
119 | static void spu_restart_dma(struct spu *spu) | |
120 | { | |
121 | struct spu_priv2 __iomem *priv2 = spu->priv2; | |
5473af04 | 122 | |
8837d921 | 123 | if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags)) |
5473af04 | 124 | out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); |
67207b96 AB |
125 | } |
126 | ||
127 | static int __spu_trap_data_seg(struct spu *spu, unsigned long ea) | |
128 | { | |
8b3d6663 AB |
129 | struct spu_priv2 __iomem *priv2 = spu->priv2; |
130 | struct mm_struct *mm = spu->mm; | |
724bd80e | 131 | u64 esid, vsid, llp; |
94b2a439 | 132 | int psize; |
67207b96 AB |
133 | |
134 | pr_debug("%s\n", __FUNCTION__); | |
135 | ||
8837d921 | 136 | if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) { |
8b3d6663 AB |
137 | /* SLBs are pre-loaded for context switch, so |
138 | * we should never get here! | |
139 | */ | |
5473af04 MN |
140 | printk("%s: invalid access during switch!\n", __func__); |
141 | return 1; | |
142 | } | |
0afacde3 | 143 | esid = (ea & ESID_MASK) | SLB_ESID_V; |
144 | ||
145 | switch(REGION_ID(ea)) { | |
146 | case USER_REGION_ID: | |
d0f13e3c BH |
147 | #ifdef CONFIG_PPC_MM_SLICES |
148 | psize = get_slice_psize(mm, ea); | |
149 | #else | |
150 | psize = mm->context.user_psize; | |
0afacde3 | 151 | #endif |
0afacde3 | 152 | vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) | |
94b2a439 | 153 | SLB_VSID_USER; |
0afacde3 | 154 | break; |
155 | case VMALLOC_REGION_ID: | |
94b2a439 BH |
156 | if (ea < VMALLOC_END) |
157 | psize = mmu_vmalloc_psize; | |
158 | else | |
159 | psize = mmu_io_psize; | |
0afacde3 | 160 | vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) | |
94b2a439 | 161 | SLB_VSID_KERNEL; |
0afacde3 | 162 | break; |
163 | case KERNEL_REGION_ID: | |
94b2a439 | 164 | psize = mmu_linear_psize; |
0afacde3 | 165 | vsid = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) | |
94b2a439 | 166 | SLB_VSID_KERNEL; |
0afacde3 | 167 | break; |
168 | default: | |
8b3d6663 AB |
169 | /* Future: support kernel segments so that drivers |
170 | * can use SPUs. | |
171 | */ | |
67207b96 AB |
172 | pr_debug("invalid region access at %016lx\n", ea); |
173 | return 1; | |
174 | } | |
94b2a439 | 175 | llp = mmu_psize_defs[psize].sllp; |
67207b96 | 176 | |
8b3d6663 | 177 | out_be64(&priv2->slb_index_W, spu->slb_replace); |
94b2a439 | 178 | out_be64(&priv2->slb_vsid_RW, vsid | llp); |
8b3d6663 AB |
179 | out_be64(&priv2->slb_esid_RW, esid); |
180 | ||
181 | spu->slb_replace++; | |
67207b96 AB |
182 | if (spu->slb_replace >= 8) |
183 | spu->slb_replace = 0; | |
184 | ||
67207b96 | 185 | spu_restart_dma(spu); |
e9f8a0b6 | 186 | spu->stats.slb_flt++; |
67207b96 AB |
187 | return 0; |
188 | } | |
189 | ||
5473af04 | 190 | extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX |
8b3d6663 | 191 | static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr) |
67207b96 | 192 | { |
a33a7d73 | 193 | pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea); |
67207b96 | 194 | |
5473af04 MN |
195 | /* Handle kernel space hash faults immediately. |
196 | User hash faults need to be deferred to process context. */ | |
197 | if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) | |
198 | && REGION_ID(ea) != USER_REGION_ID | |
199 | && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) { | |
200 | spu_restart_dma(spu); | |
201 | return 0; | |
202 | } | |
203 | ||
8837d921 | 204 | if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) { |
5473af04 MN |
205 | printk("%s: invalid access during switch!\n", __func__); |
206 | return 1; | |
207 | } | |
67207b96 | 208 | |
8b3d6663 AB |
209 | spu->dar = ea; |
210 | spu->dsisr = dsisr; | |
211 | mb(); | |
ba723fe2 | 212 | spu->stop_callback(spu); |
67207b96 AB |
213 | return 0; |
214 | } | |
215 | ||
216 | static irqreturn_t | |
f5a92458 | 217 | spu_irq_class_0(int irq, void *data) |
67207b96 AB |
218 | { |
219 | struct spu *spu; | |
220 | ||
221 | spu = data; | |
222 | spu->class_0_pending = 1; | |
ba723fe2 | 223 | spu->stop_callback(spu); |
67207b96 AB |
224 | |
225 | return IRQ_HANDLED; | |
226 | } | |
227 | ||
5110459f | 228 | int |
67207b96 AB |
229 | spu_irq_class_0_bottom(struct spu *spu) |
230 | { | |
3a843d7c | 231 | unsigned long stat, mask; |
3650cfe2 | 232 | unsigned long flags; |
67207b96 AB |
233 | |
234 | spu->class_0_pending = 0; | |
235 | ||
3650cfe2 | 236 | spin_lock_irqsave(&spu->register_lock, flags); |
f0831acc AB |
237 | mask = spu_int_mask_get(spu, 0); |
238 | stat = spu_int_stat_get(spu, 0); | |
67207b96 | 239 | |
3a843d7c AB |
240 | stat &= mask; |
241 | ||
2cd90bc8 | 242 | if (stat & 1) /* invalid DMA alignment */ |
67207b96 AB |
243 | __spu_trap_dma_align(spu); |
244 | ||
2cd90bc8 AB |
245 | if (stat & 2) /* invalid MFC DMA */ |
246 | __spu_trap_invalid_dma(spu); | |
247 | ||
67207b96 AB |
248 | if (stat & 4) /* error on SPU */ |
249 | __spu_trap_error(spu); | |
250 | ||
f0831acc | 251 | spu_int_stat_clear(spu, 0, stat); |
3650cfe2 | 252 | spin_unlock_irqrestore(&spu->register_lock, flags); |
5110459f AB |
253 | |
254 | return (stat & 0x7) ? -EIO : 0; | |
67207b96 | 255 | } |
5110459f | 256 | EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom); |
67207b96 AB |
257 | |
258 | static irqreturn_t | |
f5a92458 | 259 | spu_irq_class_1(int irq, void *data) |
67207b96 AB |
260 | { |
261 | struct spu *spu; | |
8b3d6663 | 262 | unsigned long stat, mask, dar, dsisr; |
67207b96 AB |
263 | |
264 | spu = data; | |
8b3d6663 AB |
265 | |
266 | /* atomically read & clear class1 status. */ | |
267 | spin_lock(&spu->register_lock); | |
f0831acc AB |
268 | mask = spu_int_mask_get(spu, 1); |
269 | stat = spu_int_stat_get(spu, 1) & mask; | |
270 | dar = spu_mfc_dar_get(spu); | |
271 | dsisr = spu_mfc_dsisr_get(spu); | |
38307341 | 272 | if (stat & 2) /* mapping fault */ |
f0831acc AB |
273 | spu_mfc_dsisr_set(spu, 0ul); |
274 | spu_int_stat_clear(spu, 1, stat); | |
8b3d6663 | 275 | spin_unlock(&spu->register_lock); |
a33a7d73 AB |
276 | pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat, |
277 | dar, dsisr); | |
67207b96 AB |
278 | |
279 | if (stat & 1) /* segment fault */ | |
280 | __spu_trap_data_seg(spu, dar); | |
281 | ||
282 | if (stat & 2) { /* mapping fault */ | |
8b3d6663 | 283 | __spu_trap_data_map(spu, dar, dsisr); |
67207b96 AB |
284 | } |
285 | ||
286 | if (stat & 4) /* ls compare & suspend on get */ | |
287 | ; | |
288 | ||
289 | if (stat & 8) /* ls compare & suspend on put */ | |
290 | ; | |
291 | ||
67207b96 AB |
292 | return stat ? IRQ_HANDLED : IRQ_NONE; |
293 | } | |
294 | ||
295 | static irqreturn_t | |
f5a92458 | 296 | spu_irq_class_2(int irq, void *data) |
67207b96 AB |
297 | { |
298 | struct spu *spu; | |
299 | unsigned long stat; | |
3a843d7c | 300 | unsigned long mask; |
67207b96 AB |
301 | |
302 | spu = data; | |
ba723fe2 | 303 | spin_lock(&spu->register_lock); |
f0831acc AB |
304 | stat = spu_int_stat_get(spu, 2); |
305 | mask = spu_int_mask_get(spu, 2); | |
ba723fe2 MN |
306 | /* ignore interrupts we're not waiting for */ |
307 | stat &= mask; | |
308 | /* | |
309 | * mailbox interrupts (0x1 and 0x10) are level triggered. | |
310 | * mask them now before acknowledging. | |
311 | */ | |
312 | if (stat & 0x11) | |
313 | spu_int_mask_and(spu, 2, ~(stat & 0x11)); | |
314 | /* acknowledge all interrupts before the callbacks */ | |
315 | spu_int_stat_clear(spu, 2, stat); | |
316 | spin_unlock(&spu->register_lock); | |
67207b96 | 317 | |
3a843d7c | 318 | pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask); |
67207b96 | 319 | |
67207b96 | 320 | if (stat & 1) /* PPC core mailbox */ |
ba723fe2 | 321 | spu->ibox_callback(spu); |
67207b96 AB |
322 | |
323 | if (stat & 2) /* SPU stop-and-signal */ | |
ba723fe2 | 324 | spu->stop_callback(spu); |
67207b96 AB |
325 | |
326 | if (stat & 4) /* SPU halted */ | |
ba723fe2 | 327 | spu->stop_callback(spu); |
67207b96 AB |
328 | |
329 | if (stat & 8) /* DMA tag group complete */ | |
ba723fe2 | 330 | spu->mfc_callback(spu); |
67207b96 AB |
331 | |
332 | if (stat & 0x10) /* SPU mailbox threshold */ | |
ba723fe2 | 333 | spu->wbox_callback(spu); |
67207b96 | 334 | |
e9f8a0b6 | 335 | spu->stats.class2_intr++; |
67207b96 AB |
336 | return stat ? IRQ_HANDLED : IRQ_NONE; |
337 | } | |
338 | ||
0ebfff14 | 339 | static int spu_request_irqs(struct spu *spu) |
67207b96 | 340 | { |
0ebfff14 | 341 | int ret = 0; |
67207b96 | 342 | |
0ebfff14 BH |
343 | if (spu->irqs[0] != NO_IRQ) { |
344 | snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", | |
345 | spu->number); | |
346 | ret = request_irq(spu->irqs[0], spu_irq_class_0, | |
347 | IRQF_DISABLED, | |
348 | spu->irq_c0, spu); | |
349 | if (ret) | |
350 | goto bail0; | |
351 | } | |
352 | if (spu->irqs[1] != NO_IRQ) { | |
353 | snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", | |
354 | spu->number); | |
355 | ret = request_irq(spu->irqs[1], spu_irq_class_1, | |
356 | IRQF_DISABLED, | |
357 | spu->irq_c1, spu); | |
358 | if (ret) | |
359 | goto bail1; | |
360 | } | |
361 | if (spu->irqs[2] != NO_IRQ) { | |
362 | snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", | |
363 | spu->number); | |
364 | ret = request_irq(spu->irqs[2], spu_irq_class_2, | |
365 | IRQF_DISABLED, | |
366 | spu->irq_c2, spu); | |
367 | if (ret) | |
368 | goto bail2; | |
369 | } | |
370 | return 0; | |
67207b96 | 371 | |
0ebfff14 BH |
372 | bail2: |
373 | if (spu->irqs[1] != NO_IRQ) | |
374 | free_irq(spu->irqs[1], spu); | |
375 | bail1: | |
376 | if (spu->irqs[0] != NO_IRQ) | |
377 | free_irq(spu->irqs[0], spu); | |
378 | bail0: | |
67207b96 AB |
379 | return ret; |
380 | } | |
381 | ||
0ebfff14 | 382 | static void spu_free_irqs(struct spu *spu) |
67207b96 | 383 | { |
0ebfff14 BH |
384 | if (spu->irqs[0] != NO_IRQ) |
385 | free_irq(spu->irqs[0], spu); | |
386 | if (spu->irqs[1] != NO_IRQ) | |
387 | free_irq(spu->irqs[1], spu); | |
388 | if (spu->irqs[2] != NO_IRQ) | |
389 | free_irq(spu->irqs[2], spu); | |
67207b96 AB |
390 | } |
391 | ||
67207b96 AB |
392 | static void spu_init_channels(struct spu *spu) |
393 | { | |
394 | static const struct { | |
395 | unsigned channel; | |
396 | unsigned count; | |
397 | } zero_list[] = { | |
398 | { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, }, | |
399 | { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, }, | |
400 | }, count_list[] = { | |
401 | { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, }, | |
402 | { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, }, | |
403 | { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, }, | |
404 | }; | |
6ff730c3 | 405 | struct spu_priv2 __iomem *priv2; |
67207b96 AB |
406 | int i; |
407 | ||
408 | priv2 = spu->priv2; | |
409 | ||
410 | /* initialize all channel data to zero */ | |
411 | for (i = 0; i < ARRAY_SIZE(zero_list); i++) { | |
412 | int count; | |
413 | ||
414 | out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel); | |
415 | for (count = 0; count < zero_list[i].count; count++) | |
416 | out_be64(&priv2->spu_chnldata_RW, 0); | |
417 | } | |
418 | ||
419 | /* initialize channel counts to meaningful values */ | |
420 | for (i = 0; i < ARRAY_SIZE(count_list); i++) { | |
421 | out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel); | |
422 | out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count); | |
423 | } | |
424 | } | |
425 | ||
a68cf983 | 426 | struct spu *spu_alloc_node(int node) |
67207b96 | 427 | { |
a68cf983 | 428 | struct spu *spu = NULL; |
67207b96 | 429 | |
14cc3e2b | 430 | mutex_lock(&spu_mutex); |
aa6d5b20 AB |
431 | if (!list_empty(&cbe_spu_info[node].free_spus)) { |
432 | spu = list_entry(cbe_spu_info[node].free_spus.next, struct spu, | |
433 | list); | |
67207b96 | 434 | list_del_init(&spu->list); |
cc21a66d | 435 | pr_debug("Got SPU %d %d\n", spu->number, spu->node); |
67207b96 | 436 | } |
14cc3e2b | 437 | mutex_unlock(&spu_mutex); |
67207b96 | 438 | |
62c05d58 CH |
439 | if (spu) |
440 | spu_init_channels(spu); | |
a68cf983 MN |
441 | return spu; |
442 | } | |
443 | EXPORT_SYMBOL_GPL(spu_alloc_node); | |
444 | ||
445 | struct spu *spu_alloc(void) | |
446 | { | |
447 | struct spu *spu = NULL; | |
448 | int node; | |
449 | ||
450 | for (node = 0; node < MAX_NUMNODES; node++) { | |
451 | spu = spu_alloc_node(node); | |
452 | if (spu) | |
453 | break; | |
454 | } | |
67207b96 AB |
455 | |
456 | return spu; | |
457 | } | |
67207b96 AB |
458 | |
459 | void spu_free(struct spu *spu) | |
460 | { | |
14cc3e2b | 461 | mutex_lock(&spu_mutex); |
aa6d5b20 | 462 | list_add_tail(&spu->list, &cbe_spu_info[spu->node].free_spus); |
14cc3e2b | 463 | mutex_unlock(&spu_mutex); |
67207b96 | 464 | } |
39c73c33 | 465 | EXPORT_SYMBOL_GPL(spu_free); |
67207b96 | 466 | |
6deac066 GL |
467 | static int spu_shutdown(struct sys_device *sysdev) |
468 | { | |
469 | struct spu *spu = container_of(sysdev, struct spu, sysdev); | |
470 | ||
471 | spu_free_irqs(spu); | |
472 | spu_destroy_spu(spu); | |
473 | return 0; | |
474 | } | |
475 | ||
1d64093f | 476 | struct sysdev_class spu_sysdev_class = { |
6deac066 GL |
477 | set_kset_name("spu"), |
478 | .shutdown = spu_shutdown, | |
1d64093f JK |
479 | }; |
480 | ||
e570beb6 CK |
481 | int spu_add_sysdev_attr(struct sysdev_attribute *attr) |
482 | { | |
483 | struct spu *spu; | |
484 | mutex_lock(&spu_mutex); | |
485 | ||
486 | list_for_each_entry(spu, &spu_full_list, full_list) | |
487 | sysdev_create_file(&spu->sysdev, attr); | |
488 | ||
489 | mutex_unlock(&spu_mutex); | |
490 | return 0; | |
491 | } | |
492 | EXPORT_SYMBOL_GPL(spu_add_sysdev_attr); | |
493 | ||
494 | int spu_add_sysdev_attr_group(struct attribute_group *attrs) | |
495 | { | |
496 | struct spu *spu; | |
497 | mutex_lock(&spu_mutex); | |
498 | ||
499 | list_for_each_entry(spu, &spu_full_list, full_list) | |
500 | sysfs_create_group(&spu->sysdev.kobj, attrs); | |
501 | ||
502 | mutex_unlock(&spu_mutex); | |
503 | return 0; | |
504 | } | |
505 | EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group); | |
506 | ||
507 | ||
508 | void spu_remove_sysdev_attr(struct sysdev_attribute *attr) | |
509 | { | |
510 | struct spu *spu; | |
511 | mutex_lock(&spu_mutex); | |
512 | ||
513 | list_for_each_entry(spu, &spu_full_list, full_list) | |
514 | sysdev_remove_file(&spu->sysdev, attr); | |
515 | ||
516 | mutex_unlock(&spu_mutex); | |
517 | } | |
518 | EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr); | |
519 | ||
520 | void spu_remove_sysdev_attr_group(struct attribute_group *attrs) | |
521 | { | |
522 | struct spu *spu; | |
523 | mutex_lock(&spu_mutex); | |
524 | ||
525 | list_for_each_entry(spu, &spu_full_list, full_list) | |
526 | sysfs_remove_group(&spu->sysdev.kobj, attrs); | |
527 | ||
528 | mutex_unlock(&spu_mutex); | |
529 | } | |
530 | EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group); | |
531 | ||
1d64093f JK |
532 | static int spu_create_sysdev(struct spu *spu) |
533 | { | |
534 | int ret; | |
535 | ||
536 | spu->sysdev.id = spu->number; | |
537 | spu->sysdev.cls = &spu_sysdev_class; | |
538 | ret = sysdev_register(&spu->sysdev); | |
539 | if (ret) { | |
540 | printk(KERN_ERR "Can't register SPU %d with sysfs\n", | |
541 | spu->number); | |
542 | return ret; | |
543 | } | |
544 | ||
0021550c | 545 | sysfs_add_device_to_node(&spu->sysdev, spu->node); |
1d64093f JK |
546 | |
547 | return 0; | |
548 | } | |
549 | ||
e28b0031 | 550 | static int __init create_spu(void *data) |
67207b96 AB |
551 | { |
552 | struct spu *spu; | |
553 | int ret; | |
554 | static int number; | |
94b2a439 | 555 | unsigned long flags; |
27ec41d3 | 556 | struct timespec ts; |
67207b96 AB |
557 | |
558 | ret = -ENOMEM; | |
ecec2177 | 559 | spu = kzalloc(sizeof (*spu), GFP_KERNEL); |
67207b96 AB |
560 | if (!spu) |
561 | goto out; | |
562 | ||
e28b0031 GL |
563 | spin_lock_init(&spu->register_lock); |
564 | mutex_lock(&spu_mutex); | |
565 | spu->number = number++; | |
566 | mutex_unlock(&spu_mutex); | |
567 | ||
568 | ret = spu_create_spu(spu, data); | |
e5267b4b | 569 | |
67207b96 AB |
570 | if (ret) |
571 | goto out_free; | |
572 | ||
24f43b33 | 573 | spu_mfc_sdr_setup(spu); |
f0831acc | 574 | spu_mfc_sr1_set(spu, 0x33); |
67207b96 AB |
575 | ret = spu_request_irqs(spu); |
576 | if (ret) | |
e28b0031 | 577 | goto out_destroy; |
67207b96 | 578 | |
1d64093f JK |
579 | ret = spu_create_sysdev(spu); |
580 | if (ret) | |
581 | goto out_free_irqs; | |
582 | ||
e28b0031 | 583 | mutex_lock(&spu_mutex); |
94b2a439 | 584 | spin_lock_irqsave(&spu_list_lock, flags); |
aa6d5b20 AB |
585 | list_add(&spu->list, &cbe_spu_info[spu->node].free_spus); |
586 | list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus); | |
587 | cbe_spu_info[spu->node].n_spus++; | |
e570beb6 | 588 | list_add(&spu->full_list, &spu_full_list); |
94b2a439 | 589 | spin_unlock_irqrestore(&spu_list_lock, flags); |
14cc3e2b | 590 | mutex_unlock(&spu_mutex); |
67207b96 | 591 | |
27ec41d3 AD |
592 | spu->stats.util_state = SPU_UTIL_IDLE_LOADED; |
593 | ktime_get_ts(&ts); | |
594 | spu->stats.tstamp = timespec_to_ns(&ts); | |
fe2f896d | 595 | |
67207b96 AB |
596 | goto out; |
597 | ||
1d64093f JK |
598 | out_free_irqs: |
599 | spu_free_irqs(spu); | |
e28b0031 GL |
600 | out_destroy: |
601 | spu_destroy_spu(spu); | |
67207b96 AB |
602 | out_free: |
603 | kfree(spu); | |
604 | out: | |
605 | return ret; | |
606 | } | |
607 | ||
fe2f896d CH |
608 | static const char *spu_state_names[] = { |
609 | "user", "system", "iowait", "idle" | |
610 | }; | |
611 | ||
612 | static unsigned long long spu_acct_time(struct spu *spu, | |
613 | enum spu_utilization_state state) | |
614 | { | |
27ec41d3 | 615 | struct timespec ts; |
fe2f896d CH |
616 | unsigned long long time = spu->stats.times[state]; |
617 | ||
27ec41d3 AD |
618 | /* |
619 | * If the spu is idle or the context is stopped, utilization | |
620 | * statistics are not updated. Apply the time delta from the | |
621 | * last recorded state of the spu. | |
622 | */ | |
623 | if (spu->stats.util_state == state) { | |
624 | ktime_get_ts(&ts); | |
625 | time += timespec_to_ns(&ts) - spu->stats.tstamp; | |
626 | } | |
fe2f896d | 627 | |
27ec41d3 | 628 | return time / NSEC_PER_MSEC; |
fe2f896d CH |
629 | } |
630 | ||
631 | ||
632 | static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf) | |
633 | { | |
634 | struct spu *spu = container_of(sysdev, struct spu, sysdev); | |
635 | ||
636 | return sprintf(buf, "%s %llu %llu %llu %llu " | |
637 | "%llu %llu %llu %llu %llu %llu %llu %llu\n", | |
27ec41d3 | 638 | spu_state_names[spu->stats.util_state], |
fe2f896d CH |
639 | spu_acct_time(spu, SPU_UTIL_USER), |
640 | spu_acct_time(spu, SPU_UTIL_SYSTEM), | |
641 | spu_acct_time(spu, SPU_UTIL_IOWAIT), | |
27ec41d3 | 642 | spu_acct_time(spu, SPU_UTIL_IDLE_LOADED), |
fe2f896d CH |
643 | spu->stats.vol_ctx_switch, |
644 | spu->stats.invol_ctx_switch, | |
645 | spu->stats.slb_flt, | |
646 | spu->stats.hash_flt, | |
647 | spu->stats.min_flt, | |
648 | spu->stats.maj_flt, | |
649 | spu->stats.class2_intr, | |
650 | spu->stats.libassist); | |
651 | } | |
652 | ||
653 | static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL); | |
654 | ||
aa6d5b20 AB |
655 | struct cbe_spu_info cbe_spu_info[MAX_NUMNODES]; |
656 | EXPORT_SYMBOL_GPL(cbe_spu_info); | |
657 | ||
67207b96 AB |
658 | static int __init init_spu_base(void) |
659 | { | |
befdc746 | 660 | int i, ret = 0; |
67207b96 | 661 | |
aa6d5b20 AB |
662 | for (i = 0; i < MAX_NUMNODES; i++) { |
663 | INIT_LIST_HEAD(&cbe_spu_info[i].spus); | |
664 | INIT_LIST_HEAD(&cbe_spu_info[i].free_spus); | |
665 | } | |
ccf17e9d | 666 | |
da06aa08 | 667 | if (!spu_management_ops) |
befdc746 | 668 | goto out; |
da06aa08 | 669 | |
1d64093f JK |
670 | /* create sysdev class for spus */ |
671 | ret = sysdev_class_register(&spu_sysdev_class); | |
672 | if (ret) | |
befdc746 | 673 | goto out; |
1d64093f | 674 | |
e28b0031 GL |
675 | ret = spu_enumerate_spus(create_spu); |
676 | ||
bce94513 | 677 | if (ret < 0) { |
e28b0031 GL |
678 | printk(KERN_WARNING "%s: Error initializing spus\n", |
679 | __FUNCTION__); | |
befdc746 | 680 | goto out_unregister_sysdev_class; |
67207b96 | 681 | } |
ff8a8f25 | 682 | |
bce94513 GU |
683 | if (ret > 0) { |
684 | /* | |
685 | * We cannot put the forward declaration in | |
686 | * <linux/linux_logo.h> because of conflicting session type | |
687 | * conflicts for const and __initdata with different compiler | |
688 | * versions | |
689 | */ | |
690 | extern const struct linux_logo logo_spe_clut224; | |
691 | ||
692 | fb_append_extra_logo(&logo_spe_clut224, ret); | |
693 | } | |
694 | ||
ff8a8f25 | 695 | xmon_register_spus(&spu_full_list); |
8d2655e6 | 696 | crash_register_spus(&spu_full_list); |
fe2f896d CH |
697 | spu_add_sysdev_attr(&attr_stat); |
698 | ||
befdc746 CH |
699 | return 0; |
700 | ||
701 | out_unregister_sysdev_class: | |
702 | sysdev_class_unregister(&spu_sysdev_class); | |
703 | out: | |
704 | ||
67207b96 AB |
705 | return ret; |
706 | } | |
707 | module_init(init_spu_base); | |
708 | ||
709 | MODULE_LICENSE("GPL"); | |
710 | MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>"); |