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19fe0475 AB |
1 | /* |
2 | * SMP support for BPA machines. | |
3 | * | |
4 | * Dave Engebretsen, Peter Bergner, and | |
5 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
6 | * | |
7 | * Plus various changes from other IBM teams... | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | #undef DEBUG | |
16 | ||
19fe0475 AB |
17 | #include <linux/kernel.h> |
18 | #include <linux/module.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/smp.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/spinlock.h> | |
25 | #include <linux/cache.h> | |
26 | #include <linux/err.h> | |
27 | #include <linux/sysdev.h> | |
28 | #include <linux/cpu.h> | |
29 | ||
30 | #include <asm/ptrace.h> | |
31 | #include <asm/atomic.h> | |
32 | #include <asm/irq.h> | |
33 | #include <asm/page.h> | |
34 | #include <asm/pgtable.h> | |
35 | #include <asm/io.h> | |
36 | #include <asm/prom.h> | |
37 | #include <asm/smp.h> | |
38 | #include <asm/paca.h> | |
19fe0475 AB |
39 | #include <asm/machdep.h> |
40 | #include <asm/cputable.h> | |
41 | #include <asm/firmware.h> | |
42 | #include <asm/system.h> | |
43 | #include <asm/rtas.h> | |
8d089085 | 44 | #include <asm/cputhreads.h> |
19fe0475 AB |
45 | |
46 | #include "interrupt.h" | |
aa39be09 | 47 | #include <asm/udbg.h> |
19fe0475 AB |
48 | |
49 | #ifdef DEBUG | |
50 | #define DBG(fmt...) udbg_printf(fmt) | |
51 | #else | |
52 | #define DBG(fmt...) | |
53 | #endif | |
54 | ||
55 | /* | |
6a75a6b8 MM |
56 | * The Primary thread of each non-boot processor was started from the OF client |
57 | * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop. | |
19fe0475 AB |
58 | */ |
59 | static cpumask_t of_spin_map; | |
60 | ||
19fe0475 AB |
61 | /** |
62 | * smp_startup_cpu() - start the given cpu | |
63 | * | |
64 | * At boot time, there is nothing to do for primary threads which were | |
65 | * started from Open Firmware. For anything else, call RTAS with the | |
66 | * appropriate start location. | |
67 | * | |
68 | * Returns: | |
69 | * 0 - failure | |
70 | * 1 - success | |
71 | */ | |
72 | static inline int __devinit smp_startup_cpu(unsigned int lcpu) | |
73 | { | |
74 | int status; | |
75 | unsigned long start_here = __pa((u32)*((unsigned long *) | |
f39b7a55 | 76 | generic_secondary_smp_init)); |
19fe0475 AB |
77 | unsigned int pcpu; |
78 | int start_cpu; | |
79 | ||
80 | if (cpu_isset(lcpu, of_spin_map)) | |
81 | /* Already started by OF and sitting in spin loop */ | |
82 | return 1; | |
83 | ||
84 | pcpu = get_hard_smp_processor_id(lcpu); | |
85 | ||
86 | /* Fixup atomic count: it exited inside IRQ handler. */ | |
b5e2fc1c | 87 | task_thread_info(paca[lcpu].__current)->preempt_count = 0; |
19fe0475 AB |
88 | |
89 | /* | |
90 | * If the RTAS start-cpu token does not exist then presume the | |
91 | * cpu is already spinning. | |
92 | */ | |
93 | start_cpu = rtas_token("start-cpu"); | |
94 | if (start_cpu == RTAS_UNKNOWN_SERVICE) | |
95 | return 1; | |
96 | ||
97 | status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, lcpu); | |
98 | if (status != 0) { | |
99 | printk(KERN_ERR "start-cpu failed: %i\n", status); | |
100 | return 0; | |
101 | } | |
102 | ||
103 | return 1; | |
104 | } | |
105 | ||
106 | static void smp_iic_message_pass(int target, int msg) | |
107 | { | |
108 | unsigned int i; | |
109 | ||
110 | if (target < NR_CPUS) { | |
111 | iic_cause_IPI(target, msg); | |
112 | } else { | |
113 | for_each_online_cpu(i) { | |
114 | if (target == MSG_ALL_BUT_SELF | |
115 | && i == smp_processor_id()) | |
116 | continue; | |
117 | iic_cause_IPI(i, msg); | |
118 | } | |
119 | } | |
120 | } | |
121 | ||
122 | static int __init smp_iic_probe(void) | |
123 | { | |
124 | iic_request_IPIs(); | |
125 | ||
126 | return cpus_weight(cpu_possible_map); | |
127 | } | |
128 | ||
960cedb4 | 129 | static void __devinit smp_cell_setup_cpu(int cpu) |
19fe0475 AB |
130 | { |
131 | if (cpu != boot_cpuid) | |
132 | iic_setup_cpu(); | |
960cedb4 AB |
133 | |
134 | /* | |
135 | * change default DABRX to allow user watchpoints | |
136 | */ | |
137 | mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER); | |
19fe0475 AB |
138 | } |
139 | ||
19fe0475 AB |
140 | static void __devinit smp_cell_kick_cpu(int nr) |
141 | { | |
142 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
143 | ||
144 | if (!smp_startup_cpu(nr)) | |
145 | return; | |
146 | ||
147 | /* | |
148 | * The processor is currently spinning, waiting for the | |
149 | * cpu_start field to become non-zero After we set cpu_start, | |
150 | * the processor will continue on to secondary_start | |
151 | */ | |
152 | paca[nr].cpu_start = 1; | |
153 | } | |
154 | ||
155 | static int smp_cell_cpu_bootable(unsigned int nr) | |
156 | { | |
157 | /* Special case - we inhibit secondary thread startup | |
158 | * during boot if the user requests it. Odd-numbered | |
159 | * cpus are assumed to be secondary threads. | |
160 | */ | |
161 | if (system_state < SYSTEM_RUNNING && | |
162 | cpu_has_feature(CPU_FTR_SMT) && | |
8d089085 | 163 | !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0) |
19fe0475 AB |
164 | return 0; |
165 | ||
166 | return 1; | |
167 | } | |
168 | static struct smp_ops_t bpa_iic_smp_ops = { | |
169 | .message_pass = smp_iic_message_pass, | |
170 | .probe = smp_iic_probe, | |
171 | .kick_cpu = smp_cell_kick_cpu, | |
960cedb4 | 172 | .setup_cpu = smp_cell_setup_cpu, |
19fe0475 AB |
173 | .cpu_bootable = smp_cell_cpu_bootable, |
174 | }; | |
175 | ||
176 | /* This is called very early */ | |
177 | void __init smp_init_cell(void) | |
178 | { | |
179 | int i; | |
180 | ||
181 | DBG(" -> smp_init_cell()\n"); | |
182 | ||
183 | smp_ops = &bpa_iic_smp_ops; | |
184 | ||
185 | /* Mark threads which are still spinning in hold loops. */ | |
186 | if (cpu_has_feature(CPU_FTR_SMT)) { | |
187 | for_each_present_cpu(i) { | |
6a75a6b8 | 188 | if (cpu_thread_in_core(i) == 0) |
19fe0475 AB |
189 | cpu_set(i, of_spin_map); |
190 | } | |
191 | } else { | |
192 | of_spin_map = cpu_present_map; | |
193 | } | |
194 | ||
195 | cpu_clear(boot_cpuid, of_spin_map); | |
196 | ||
197 | /* Non-lpar has additional take/give timebase */ | |
198 | if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) { | |
c4007a2f BH |
199 | smp_ops->give_timebase = rtas_give_timebase; |
200 | smp_ops->take_timebase = rtas_take_timebase; | |
19fe0475 AB |
201 | } |
202 | ||
203 | DBG(" <- smp_init_cell()\n"); | |
204 | } |