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19fe0475 AB |
1 | /* |
2 | * SMP support for BPA machines. | |
3 | * | |
4 | * Dave Engebretsen, Peter Bergner, and | |
5 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
6 | * | |
7 | * Plus various changes from other IBM teams... | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | #undef DEBUG | |
16 | ||
19fe0475 AB |
17 | #include <linux/kernel.h> |
18 | #include <linux/module.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/smp.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/spinlock.h> | |
25 | #include <linux/cache.h> | |
26 | #include <linux/err.h> | |
27 | #include <linux/sysdev.h> | |
28 | #include <linux/cpu.h> | |
29 | ||
30 | #include <asm/ptrace.h> | |
31 | #include <asm/atomic.h> | |
32 | #include <asm/irq.h> | |
33 | #include <asm/page.h> | |
34 | #include <asm/pgtable.h> | |
35 | #include <asm/io.h> | |
36 | #include <asm/prom.h> | |
37 | #include <asm/smp.h> | |
38 | #include <asm/paca.h> | |
39 | #include <asm/time.h> | |
40 | #include <asm/machdep.h> | |
41 | #include <asm/cputable.h> | |
42 | #include <asm/firmware.h> | |
43 | #include <asm/system.h> | |
44 | #include <asm/rtas.h> | |
8d089085 | 45 | #include <asm/cputhreads.h> |
19fe0475 AB |
46 | |
47 | #include "interrupt.h" | |
aa39be09 | 48 | #include <asm/udbg.h> |
19fe0475 AB |
49 | |
50 | #ifdef DEBUG | |
51 | #define DBG(fmt...) udbg_printf(fmt) | |
52 | #else | |
53 | #define DBG(fmt...) | |
54 | #endif | |
55 | ||
56 | /* | |
57 | * The primary thread of each non-boot processor is recorded here before | |
58 | * smp init. | |
59 | */ | |
60 | static cpumask_t of_spin_map; | |
61 | ||
f39b7a55 | 62 | extern void generic_secondary_smp_init(unsigned long); |
19fe0475 AB |
63 | |
64 | /** | |
65 | * smp_startup_cpu() - start the given cpu | |
66 | * | |
67 | * At boot time, there is nothing to do for primary threads which were | |
68 | * started from Open Firmware. For anything else, call RTAS with the | |
69 | * appropriate start location. | |
70 | * | |
71 | * Returns: | |
72 | * 0 - failure | |
73 | * 1 - success | |
74 | */ | |
75 | static inline int __devinit smp_startup_cpu(unsigned int lcpu) | |
76 | { | |
77 | int status; | |
78 | unsigned long start_here = __pa((u32)*((unsigned long *) | |
f39b7a55 | 79 | generic_secondary_smp_init)); |
19fe0475 AB |
80 | unsigned int pcpu; |
81 | int start_cpu; | |
82 | ||
83 | if (cpu_isset(lcpu, of_spin_map)) | |
84 | /* Already started by OF and sitting in spin loop */ | |
85 | return 1; | |
86 | ||
87 | pcpu = get_hard_smp_processor_id(lcpu); | |
88 | ||
89 | /* Fixup atomic count: it exited inside IRQ handler. */ | |
b5e2fc1c | 90 | task_thread_info(paca[lcpu].__current)->preempt_count = 0; |
19fe0475 AB |
91 | |
92 | /* | |
93 | * If the RTAS start-cpu token does not exist then presume the | |
94 | * cpu is already spinning. | |
95 | */ | |
96 | start_cpu = rtas_token("start-cpu"); | |
97 | if (start_cpu == RTAS_UNKNOWN_SERVICE) | |
98 | return 1; | |
99 | ||
100 | status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, lcpu); | |
101 | if (status != 0) { | |
102 | printk(KERN_ERR "start-cpu failed: %i\n", status); | |
103 | return 0; | |
104 | } | |
105 | ||
106 | return 1; | |
107 | } | |
108 | ||
109 | static void smp_iic_message_pass(int target, int msg) | |
110 | { | |
111 | unsigned int i; | |
112 | ||
113 | if (target < NR_CPUS) { | |
114 | iic_cause_IPI(target, msg); | |
115 | } else { | |
116 | for_each_online_cpu(i) { | |
117 | if (target == MSG_ALL_BUT_SELF | |
118 | && i == smp_processor_id()) | |
119 | continue; | |
120 | iic_cause_IPI(i, msg); | |
121 | } | |
122 | } | |
123 | } | |
124 | ||
125 | static int __init smp_iic_probe(void) | |
126 | { | |
127 | iic_request_IPIs(); | |
128 | ||
129 | return cpus_weight(cpu_possible_map); | |
130 | } | |
131 | ||
132 | static void __devinit smp_iic_setup_cpu(int cpu) | |
133 | { | |
134 | if (cpu != boot_cpuid) | |
135 | iic_setup_cpu(); | |
136 | } | |
137 | ||
138 | static DEFINE_SPINLOCK(timebase_lock); | |
139 | static unsigned long timebase = 0; | |
140 | ||
141 | static void __devinit cell_give_timebase(void) | |
142 | { | |
143 | spin_lock(&timebase_lock); | |
144 | rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL); | |
145 | timebase = get_tb(); | |
146 | spin_unlock(&timebase_lock); | |
147 | ||
148 | while (timebase) | |
149 | barrier(); | |
150 | rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL); | |
151 | } | |
152 | ||
153 | static void __devinit cell_take_timebase(void) | |
154 | { | |
155 | while (!timebase) | |
156 | barrier(); | |
157 | spin_lock(&timebase_lock); | |
158 | set_tb(timebase >> 32, timebase & 0xffffffff); | |
159 | timebase = 0; | |
160 | spin_unlock(&timebase_lock); | |
161 | } | |
162 | ||
163 | static void __devinit smp_cell_kick_cpu(int nr) | |
164 | { | |
165 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
166 | ||
167 | if (!smp_startup_cpu(nr)) | |
168 | return; | |
169 | ||
170 | /* | |
171 | * The processor is currently spinning, waiting for the | |
172 | * cpu_start field to become non-zero After we set cpu_start, | |
173 | * the processor will continue on to secondary_start | |
174 | */ | |
175 | paca[nr].cpu_start = 1; | |
176 | } | |
177 | ||
178 | static int smp_cell_cpu_bootable(unsigned int nr) | |
179 | { | |
180 | /* Special case - we inhibit secondary thread startup | |
181 | * during boot if the user requests it. Odd-numbered | |
182 | * cpus are assumed to be secondary threads. | |
183 | */ | |
184 | if (system_state < SYSTEM_RUNNING && | |
185 | cpu_has_feature(CPU_FTR_SMT) && | |
8d089085 | 186 | !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0) |
19fe0475 AB |
187 | return 0; |
188 | ||
189 | return 1; | |
190 | } | |
191 | static struct smp_ops_t bpa_iic_smp_ops = { | |
192 | .message_pass = smp_iic_message_pass, | |
193 | .probe = smp_iic_probe, | |
194 | .kick_cpu = smp_cell_kick_cpu, | |
195 | .setup_cpu = smp_iic_setup_cpu, | |
196 | .cpu_bootable = smp_cell_cpu_bootable, | |
197 | }; | |
198 | ||
199 | /* This is called very early */ | |
200 | void __init smp_init_cell(void) | |
201 | { | |
202 | int i; | |
203 | ||
204 | DBG(" -> smp_init_cell()\n"); | |
205 | ||
206 | smp_ops = &bpa_iic_smp_ops; | |
207 | ||
208 | /* Mark threads which are still spinning in hold loops. */ | |
209 | if (cpu_has_feature(CPU_FTR_SMT)) { | |
210 | for_each_present_cpu(i) { | |
211 | if (i % 2 == 0) | |
212 | /* | |
213 | * Even-numbered logical cpus correspond to | |
214 | * primary threads. | |
215 | */ | |
216 | cpu_set(i, of_spin_map); | |
217 | } | |
218 | } else { | |
219 | of_spin_map = cpu_present_map; | |
220 | } | |
221 | ||
222 | cpu_clear(boot_cpuid, of_spin_map); | |
223 | ||
224 | /* Non-lpar has additional take/give timebase */ | |
225 | if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) { | |
226 | smp_ops->give_timebase = cell_give_timebase; | |
227 | smp_ops->take_timebase = cell_take_timebase; | |
228 | } | |
229 | ||
230 | DBG(" <- smp_init_cell()\n"); | |
231 | } |