[POWERPC] Add new interrupt mapping core and change platforms to use it
[linux-2.6-block.git] / arch / powerpc / platforms / cell / setup.c
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fef1c772 1/*
f3f66f59 2 * linux/arch/powerpc/platforms/cell/cell_setup.c
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3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
f3f66f59 8 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
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9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15#undef DEBUG
16
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17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/stddef.h>
21#include <linux/unistd.h>
22#include <linux/slab.h>
23#include <linux/user.h>
24#include <linux/reboot.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/irq.h>
28#include <linux/seq_file.h>
29#include <linux/root_dev.h>
30#include <linux/console.h>
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31#include <linux/mutex.h>
32#include <linux/memory_hotplug.h>
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33
34#include <asm/mmu.h>
35#include <asm/processor.h>
36#include <asm/io.h>
3d1229d6 37#include <asm/kexec.h>
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38#include <asm/pgtable.h>
39#include <asm/prom.h>
40#include <asm/rtas.h>
41#include <asm/pci-bridge.h>
42#include <asm/iommu.h>
43#include <asm/dma.h>
44#include <asm/machdep.h>
45#include <asm/time.h>
46#include <asm/nvram.h>
47#include <asm/cputable.h>
d387899f 48#include <asm/ppc-pci.h>
40ef8cbc 49#include <asm/irq.h>
bed120c6 50#include <asm/spu.h>
540270d8 51#include <asm/spu_priv1.h>
609c9991 52#include <asm/udbg.h>
fef1c772 53
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54#include "interrupt.h"
55#include "iommu.h"
acf7d768 56#include "cbe_regs.h"
c902be71 57#include "pervasive.h"
acf7d768 58#include "ras.h"
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59
60#ifdef DEBUG
61#define DBG(fmt...) udbg_printf(fmt)
62#else
63#define DBG(fmt...)
64#endif
65
8fce10a3 66static void cell_show_cpuinfo(struct seq_file *m)
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67{
68 struct device_node *root;
69 const char *model = "";
70
71 root = of_find_node_by_path("/");
72 if (root)
73 model = get_property(root, "model", NULL);
f3f66f59 74 seq_printf(m, "machine\t\t: CHRP %s\n", model);
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75 of_node_put(root);
76}
77
f3f66f59 78static void cell_progress(char *s, unsigned short hex)
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79{
80 printk("*** %04x : %s\n", hex, s ? s : "");
81}
82
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83static void __init cell_pcibios_fixup(void)
84{
85 struct pci_dev *dev = NULL;
86
87 for_each_pci_dev(dev)
88 pci_read_irq_line(dev);
89}
90
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91static void __init cell_init_irq(void)
92{
93 iic_init_IRQ();
94 spider_init_IRQ();
95}
96
f3f66f59 97static void __init cell_setup_arch(void)
fef1c772 98{
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99#ifdef CONFIG_SPU_BASE
100 spu_priv1_ops = &spu_priv1_mmio_ops;
101#endif
cebf589c 102
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103 cbe_regs_init();
104
105#ifdef CONFIG_CBE_RAS
106 cbe_ras_init();
107#endif
108
fef1c772 109#ifdef CONFIG_SMP
f3f66f59 110 smp_init_cell();
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111#endif
112
113 /* init to some ~sane value until calibrate_delay() runs */
114 loops_per_jiffy = 50000000;
115
116 if (ROOT_DEV == 0) {
117 printk("No ramdisk, default root is /dev/hda2\n");
118 ROOT_DEV = Root_HDA2;
119 }
120
121 /* Find and initialize PCI host bridges */
122 init_pci_config_tokens();
123 find_and_init_phbs();
acf7d768 124 cbe_pervasive_init();
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125#ifdef CONFIG_DUMMY_CONSOLE
126 conswitchp = &dummy_con;
127#endif
128
f3f66f59 129 mmio_nvram_init();
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130}
131
132/*
133 * Early initialization. Relocation is on but do not reference unbolted pages
134 */
f3f66f59 135static void __init cell_init_early(void)
fef1c772 136{
f3f66f59 137 DBG(" -> cell_init_early()\n");
fef1c772 138
f3f66f59 139 cell_init_iommu();
fef1c772 140
f3f66f59 141 DBG(" <- cell_init_early()\n");
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142}
143
144
e8222502 145static int __init cell_probe(void)
fef1c772 146{
e8222502 147 unsigned long root = of_get_flat_dt_root();
fef1c772 148
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149 if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
150 !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
151 return 0;
152
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153#ifdef CONFIG_UDBG_RTAS_CONSOLE
154 udbg_init_rtas_console();
155#endif
156
7d0daae4 157 hpte_init_native();
133dda1e 158
7d0daae4 159 return 1;
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160}
161
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162/*
163 * Cell has no legacy IO; anything calling this function has to
164 * fail or bad things will happen
165 */
166static int cell_check_legacy_ioport(unsigned int baseport)
167{
168 return -ENODEV;
169}
170
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171define_machine(cell) {
172 .name = "Cell",
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173 .probe = cell_probe,
174 .setup_arch = cell_setup_arch,
175 .init_early = cell_init_early,
176 .show_cpuinfo = cell_show_cpuinfo,
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177 .restart = rtas_restart,
178 .power_off = rtas_power_off,
179 .halt = rtas_halt,
180 .get_boot_time = rtas_get_boot_time,
181 .get_rtc_time = rtas_get_rtc_time,
182 .set_rtc_time = rtas_set_rtc_time,
183 .calibrate_decr = generic_calibrate_decr,
d52771fc 184 .check_legacy_ioport = cell_check_legacy_ioport,
f3f66f59 185 .progress = cell_progress,
b9e5b4e6 186 .init_IRQ = cell_init_irq,
0ebfff14 187 .pcibios_fixup = cell_pcibios_fixup,
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188#ifdef CONFIG_KEXEC
189 .machine_kexec = default_machine_kexec,
190 .machine_kexec_prepare = default_machine_kexec_prepare,
cc532915 191 .machine_crash_shutdown = default_machine_crash_shutdown,
3d1229d6 192#endif
fef1c772 193};