powerpc/hugetlb: enable hugetlb migration for ppc64
[linux-2.6-block.git] / arch / powerpc / platforms / Kconfig.cputype
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1config PPC64
2 bool "64-bit kernel"
3 default n
78989f0a 4 select ZLIB_DEFLATE
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5 help
6 This option selects whether a 32-bit or a 64-bit kernel
7 will be built.
8
9menu "Processor support"
10choice
11 prompt "Processor Type"
12 depends on PPC32
a0ae9c7c 13 help
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14 There are five families of 32 bit PowerPC chips supported.
15 The most common ones are the desktop and server CPUs (601, 603,
16 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
e177edcd 17 embedded 512x/52xx/82xx/83xx/86xx counterparts.
b140e5b2 18 The other embedded parts, namely 4xx, 8xx, e200 (55xx) and e500
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19 (85xx) each form a family of their own that is not compatible
20 with the others.
21
22 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
23
48c93112 24config PPC_BOOK3S_32
e177edcd 25 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
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26 select PPC_FPU
27
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28config PPC_85xx
29 bool "Freescale 85xx"
30 select E500
a0ae9c7c 31
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32config PPC_8xx
33 bool "Freescale 8xx"
34 select FSL_SOC
35 select 8xx
1088a209 36 select PPC_LIB_RHEAP
4b914286 37 select SYS_SUPPORTS_HUGETLBFS
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38
39config 40x
40 bool "AMCC 40x"
41 select PPC_DCR_NATIVE
9dae8afd 42 select PPC_UDBG_16550
93173ce2 43 select 4xx_SOC
b500563b 44 select PPC_PCI_CHOICE
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45
46config 44x
e7f75ad0 47 bool "AMCC 44x, 46x or 47x"
a0ae9c7c 48 select PPC_DCR_NATIVE
1d5499b5 49 select PPC_UDBG_16550
93173ce2 50 select 4xx_SOC
b500563b 51 select PPC_PCI_CHOICE
4ee7084e 52 select PHYS_64BIT
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53
54config E200
55 bool "Freescale e200"
56
57endchoice
58
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59choice
60 prompt "Processor Type"
5b7c3c91 61 depends on PPC64
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62 help
63 There are two families of 64 bit PowerPC chips supported.
64 The most common ones are the desktop and server CPUs
0f369103 65 (POWER4, POWER5, 970, POWER5+, POWER6, POWER7, POWER8 ...)
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66
67 The other are the "embedded" processors compliant with the
68 "Book 3E" variant of the architecture
69
70config PPC_BOOK3S_64
71 bool "Server processors"
5b7c3c91 72 select PPC_FPU
5adfd346 73 select PPC_HAVE_PMU_SUPPORT
41151e77 74 select SYS_SUPPORTS_HUGETLBFS
ab624762 75 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
c34a51ce 76 select ARCH_SUPPORTS_NUMA_BALANCING
527518f1 77 select IRQ_WORK
c762c69e 78 select HAVE_KERNEL_XZ
5b7c3c91 79
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80config PPC_BOOK3E_64
81 bool "Embedded processors"
82 select PPC_FPU # Make it a choice ?
1ece355b 83 select PPC_SMP_MUXED_IPI
440bc685 84 select PPC_DOORBELL
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85
86endchoice
87
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88choice
89 prompt "CPU selection"
90 depends on PPC64
e2ad477c 91 default POWER8_CPU if CPU_LITTLE_ENDIAN
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92 default GENERIC_CPU
93 help
94 This will create a kernel which is optimised for a particular CPU.
95 The resulting kernel may not run on other CPUs, so use this with care.
96
97 If unsure, select Generic.
98
99config GENERIC_CPU
100 bool "Generic"
686245be 101 depends on !CPU_LITTLE_ENDIAN
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102
103config CELL_CPU
104 bool "Cell Broadband Engine"
686245be 105 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
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106
107config POWER4_CPU
108 bool "POWER4"
686245be 109 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
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110
111config POWER5_CPU
112 bool "POWER5"
686245be 113 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
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114
115config POWER6_CPU
116 bool "POWER6"
686245be 117 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
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118
119config POWER7_CPU
120 bool "POWER7"
01718ba6 121 depends on PPC_BOOK3S_64
423216ed 122 select ARCH_HAS_FAST_MULTIPLIER
01718ba6 123
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124config POWER8_CPU
125 bool "POWER8"
126 depends on PPC_BOOK3S_64
423216ed 127 select ARCH_HAS_FAST_MULTIPLIER
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128
129config E5500_CPU
130 bool "Freescale e5500"
131 depends on E500
132
133config E6500_CPU
134 bool "Freescale e6500"
135 depends on E500
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136
137endchoice
138
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139config PPC_BOOK3S
140 def_bool y
141 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
28794d34 142
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143config PPC_BOOK3E
144 def_bool y
145 depends on PPC_BOOK3E_64
146
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147config 6xx
148 def_bool y
149 depends on PPC32 && PPC_BOOK3S
7325927e 150 select PPC_HAVE_PMU_SUPPORT
5b7c3c91 151
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152# this is temp to handle compat with arch=ppc
153config 8xx
154 bool
155
a0ae9c7c 156config E500
39aef685 157 select FSL_EMB_PERFMON
4490c06b 158 select PPC_FSL_BOOK3E
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159 bool
160
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161config PPC_E500MC
162 bool "e500mc Support"
163 select PPC_FPU
555eae97 164 select COMMON_CLK
3dfa8773 165 depends on E500
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166 help
167 This must be enabled for running on e500mc (and derivatives
168 such as e5500/e6500), and must be disabled for running on
169 e500v1 or e500v2.
3dfa8773 170
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171config PPC_FPU
172 bool
173 default y if PPC64
174
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175config PPC_8xx_PERF_EVENT
176 bool "PPC 8xx perf events"
177 depends on PPC_8xx && PERF_EVENTS
178 help
179 This is Performance Events support for PPC 8xx. The 8xx doesn't
180 have a PMU but some events are emulated using 8xx features.
181
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182config FSL_EMB_PERFMON
183 bool "Freescale Embedded Perfmon"
184 depends on E500 || PPC_83xx
185 help
186 This is the Performance Monitor support found on the e500 core
187 and some e300 cores (c3 and c4). Select this only if your
188 core supports the Embedded Performance Monitor APU
189
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190config FSL_EMB_PERF_EVENT
191 bool
192 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
193 default y
194
195config FSL_EMB_PERF_EVENT_E500
196 bool
197 depends on FSL_EMB_PERF_EVENT && E500
198 default y
199
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200config 4xx
201 bool
202 depends on 40x || 44x
203 default y
204
205config BOOKE
206 bool
2d27cfd3 207 depends on E200 || E500 || 44x || PPC_BOOK3E
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208 default y
209
210config FSL_BOOKE
211 bool
4490c06b 212 depends on (E200 || E500) && PPC32
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213 default y
214
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215# this is for common code between PPC32 & PPC64 FSL BOOKE
216config PPC_FSL_BOOK3E
217 bool
218 select FSL_EMB_PERFMON
1ece355b 219 select PPC_SMP_MUXED_IPI
a475c8ec 220 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
440bc685 221 select PPC_DOORBELL
4490c06b 222 default y if FSL_BOOKE
39aef685 223
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224config PTE_64BIT
225 bool
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226 depends on 44x || E500 || PPC_86xx
227 default y if PHYS_64BIT
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228
229config PHYS_64BIT
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230 bool 'Large physical address support' if E500 || PPC_86xx
231 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
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232 ---help---
233 This option enables kernel support for larger than 32-bit physical
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234 addresses. This feature may not be available on all cores.
235
236 If you have more than 3.5GB of RAM or so, you also need to enable
237 SWIOTLB under Kernel Options for this to work. The actual number
238 is platform-dependent.
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239
240 If in doubt, say N here.
241
242config ALTIVEC
243 bool "AltiVec Support"
804ece07 244 depends on 6xx || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
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245 ---help---
246 This option enables kernel support for the Altivec extensions to the
247 PowerPC processor. The kernel currently supports saving and restoring
248 altivec registers, and turning on the 'altivec enable' bit so user
249 processes can execute altivec instructions.
250
251 This option is only usefully if you have a processor that supports
252 altivec (G4, otherwise known as 74xx series), but does not have
253 any affect on a non-altivec cpu (it does, however add code to the
254 kernel).
255
256 If in doubt, say Y here.
257
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258config VSX
259 bool "VSX Support"
804ece07 260 depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU
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261 ---help---
262
263 This option enables kernel support for the Vector Scaler extensions
264 to the PowerPC processor. The kernel currently supports saving and
265 restoring VSX registers, and turning on the 'VSX enable' bit so user
266 processes can execute VSX instructions.
267
268 This option is only useful if you have a processor that supports
269 VSX (P7 and above), but does not have any affect on a non-VSX
270 CPUs (it does, however add code to the kernel).
271
272 If in doubt, say Y here.
273
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274config PPC_ICSWX
275 bool "Support for PowerPC icswx coprocessor instruction"
804ece07 276 depends on PPC_BOOK3S_64
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277 default n
278 ---help---
279
280 This option enables kernel support for the PowerPC Initiate
281 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
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282 and POWER8 processors. POWER9 uses new copy/paste instructions
283 to invoke the coprocessor.
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284
285 This option is only useful if you have a processor that supports
286 the icswx coprocessor instruction. It does not have any effect
287 on processors without the icswx coprocessor instruction.
288
289 This option slightly increases kernel memory usage.
290
291 If in doubt, say N here.
292
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293config PPC_ICSWX_PID
294 bool "icswx requires direct PID management"
804ece07 295 depends on PPC_ICSWX
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296 default y
297 ---help---
c3dcf53a 298 The PID register in server is used explicitly for ICSWX. In
6b2aac42 299 embedded systems PID management is done by the system.
9d670280 300
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301config PPC_ICSWX_USE_SIGILL
302 bool "Should a bad CT cause a SIGILL?"
303 depends on PPC_ICSWX
304 default n
305 ---help---
306 Should a bad CT used for "non-record form ICSWX" cause an
6b2aac42 307 illegal instruction signal or should it be silent as
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308 architected.
309
310 If in doubt, say N here.
311
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312config SPE_POSSIBLE
313 def_bool y
314 depends on E200 || (E500 && !PPC_E500MC)
315
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316config SPE
317 bool "SPE Support"
3477e71d 318 depends on SPE_POSSIBLE
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319 default y
320 ---help---
321 This option enables kernel support for the Signal Processing
322 Extensions (SPE) to the PowerPC processor. The kernel currently
323 supports saving and restoring SPE registers, and turning on the
324 'spe enable' bit so user processes can execute SPE instructions.
325
326 This option is only useful if you have a processor that supports
327 SPE (e500, otherwise known as 85xx series), but does not have any
328 effect on a non-spe cpu (it does, however add code to the kernel).
329
330 If in doubt, say Y here.
331
332config PPC_STD_MMU
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333 def_bool y
334 depends on PPC_BOOK3S
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335
336config PPC_STD_MMU_32
337 def_bool y
338 depends on PPC_STD_MMU && PPC32
339
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340config PPC_STD_MMU_64
341 def_bool y
342 depends on PPC_STD_MMU && PPC64
343
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344config PPC_RADIX_MMU
345 bool "Radix MMU Support"
346 depends on PPC_BOOK3S_64
347 default y
348 help
349 Enable support for the Power ISA 3.0 Radix style MMU. Currently this
350 is only implemented by IBM Power9 CPUs, if you don't have one of them
351 you can probably disable this.
352
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353config ARCH_ENABLE_HUGEPAGE_MIGRATION
354 def_bool y
355 depends on PPC_BOOK3S_64 && HUGETLB_PAGE && MIGRATION
356
357
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358config PPC_MMU_NOHASH
359 def_bool y
360 depends on !PPC_STD_MMU
361
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362config PPC_BOOK3E_MMU
363 def_bool y
2d27cfd3 364 depends on FSL_BOOKE || PPC_BOOK3E
70fe3af8 365
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366config PPC_MM_SLICES
367 bool
b42279f0 368 default y if PPC_STD_MMU_64
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369 default n
370
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371config PPC_HAVE_PMU_SUPPORT
372 bool
373
374config PPC_PERF_CTRS
375 def_bool y
cdd6c482 376 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
105988c0 377 help
cdd6c482 378 This enables the powerpc-specific perf_event back-end.
105988c0 379
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380config FORCE_SMP
381 # Allow platforms to force SMP=y by selecting this
382 bool
383 default n
384 select SMP
385
a0ae9c7c 386config SMP
e7f75ad0 387 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
a978e139 388 select GENERIC_IRQ_MIGRATION
ebbe9d7d 389 bool "Symmetric multi-processing support" if !FORCE_SMP
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390 ---help---
391 This enables support for systems with more than one CPU. If you have
392 a system with only one CPU, say N. If you have a system with more
393 than one CPU, say Y. Note that the kernel does not currently
394 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
395 since they have inadequate hardware support for multiprocessor
396 operation.
397
398 If you say N here, the kernel will run on single and multiprocessor
399 machines, but will use only one CPU of a multiprocessor machine. If
400 you say Y here, the kernel will run on single-processor machines.
401 On a single-processor machine, the kernel will run faster if you say
402 N here.
403
404 If you don't know what to do here, say N.
405
406config NR_CPUS
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407 int "Maximum number of CPUs (2-8192)"
408 range 2 8192
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409 depends on SMP
410 default "32" if PPC64
411 default "4"
412
413config NOT_COHERENT_CACHE
414 bool
b91a143b 415 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
e7f75ad0 416 default n if PPC_47x
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417 default y
418
f8eb77d6 419config CHECK_CACHE_COHERENCY
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420 bool
421
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422config PPC_DOORBELL
423 bool
424 default n
425
a0ae9c7c 426endmenu
7c105b63 427
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428config VDSO32
429 def_bool y
430 depends on PPC32 || CPU_BIG_ENDIAN
431 help
432 This symbol controls whether we build the 32-bit VDSO. We obviously
433 want to do that if we're building a 32-bit kernel. If we're building
434 a 64-bit kernel then we only want a 32-bit VDSO if we're building for
435 big endian. That is because the only little endian configuration we
436 support is ppc64le which is 64-bit only.
437
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438choice
439 prompt "Endianness selection"
440 default CPU_BIG_ENDIAN
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441 help
442 This option selects whether a big endian or little endian kernel will
443 be built.
444
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445config CPU_BIG_ENDIAN
446 bool "Build big endian kernel"
447 help
448 Build a big endian kernel.
449
450 If unsure, select this option.
451
452config CPU_LITTLE_ENDIAN
453 bool "Build little endian kernel"
d4d4add9 454 depends on PPC_BOOK3S_64
147c0516 455 select PPC64_BOOT_WRAPPER
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456 help
457 Build a little endian kernel.
458
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459 Note that if cross compiling a little endian kernel,
460 CROSS_COMPILE must point to a toolchain capable of targeting
461 little endian powerpc.
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462
463endchoice
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464
465config PPC64_BOOT_WRAPPER
466 def_bool n
467 depends on CPU_LITTLE_ENDIAN