Commit | Line | Data |
---|---|---|
a0ae9c7c AB |
1 | config PPC64 |
2 | bool "64-bit kernel" | |
3 | default n | |
105988c0 | 4 | select PPC_HAVE_PMU_SUPPORT |
a0ae9c7c AB |
5 | help |
6 | This option selects whether a 32-bit or a 64-bit kernel | |
7 | will be built. | |
8 | ||
9 | menu "Processor support" | |
10 | choice | |
11 | prompt "Processor Type" | |
12 | depends on PPC32 | |
a0ae9c7c | 13 | help |
b9fd305d AB |
14 | There are five families of 32 bit PowerPC chips supported. |
15 | The most common ones are the desktop and server CPUs (601, 603, | |
16 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their | |
e177edcd | 17 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
b9fd305d AB |
18 | The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
19 | (85xx) each form a family of their own that is not compatible | |
20 | with the others. | |
21 | ||
22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. | |
23 | ||
48c93112 | 24 | config PPC_BOOK3S_32 |
e177edcd | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
a0ae9c7c AB |
26 | select PPC_FPU |
27 | ||
a0ae9c7c AB |
28 | config PPC_85xx |
29 | bool "Freescale 85xx" | |
30 | select E500 | |
a0ae9c7c | 31 | |
a0ae9c7c AB |
32 | config PPC_8xx |
33 | bool "Freescale 8xx" | |
34 | select FSL_SOC | |
35 | select 8xx | |
1088a209 | 36 | select PPC_LIB_RHEAP |
a0ae9c7c AB |
37 | |
38 | config 40x | |
39 | bool "AMCC 40x" | |
40 | select PPC_DCR_NATIVE | |
9dae8afd | 41 | select PPC_UDBG_16550 |
93173ce2 | 42 | select 4xx_SOC |
b500563b | 43 | select PPC_PCI_CHOICE |
a0ae9c7c AB |
44 | |
45 | config 44x | |
e7f75ad0 | 46 | bool "AMCC 44x, 46x or 47x" |
a0ae9c7c | 47 | select PPC_DCR_NATIVE |
1d5499b5 | 48 | select PPC_UDBG_16550 |
93173ce2 | 49 | select 4xx_SOC |
b500563b | 50 | select PPC_PCI_CHOICE |
4ee7084e | 51 | select PHYS_64BIT |
a0ae9c7c AB |
52 | |
53 | config E200 | |
54 | bool "Freescale e200" | |
55 | ||
56 | endchoice | |
57 | ||
2d27cfd3 BH |
58 | choice |
59 | prompt "Processor Type" | |
5b7c3c91 | 60 | depends on PPC64 |
2d27cfd3 BH |
61 | help |
62 | There are two families of 64 bit PowerPC chips supported. | |
63 | The most common ones are the desktop and server CPUs | |
64 | (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...) | |
65 | ||
66 | The other are the "embedded" processors compliant with the | |
67 | "Book 3E" variant of the architecture | |
68 | ||
69 | config PPC_BOOK3S_64 | |
70 | bool "Server processors" | |
5b7c3c91 BH |
71 | select PPC_FPU |
72 | ||
2d27cfd3 BH |
73 | config PPC_BOOK3E_64 |
74 | bool "Embedded processors" | |
75 | select PPC_FPU # Make it a choice ? | |
76 | ||
77 | endchoice | |
78 | ||
48c93112 BH |
79 | config PPC_BOOK3S |
80 | def_bool y | |
81 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 | |
28794d34 | 82 | |
2d27cfd3 BH |
83 | config PPC_BOOK3E |
84 | def_bool y | |
85 | depends on PPC_BOOK3E_64 | |
86 | ||
a0ae9c7c AB |
87 | config POWER4_ONLY |
88 | bool "Optimize for POWER4" | |
28794d34 | 89 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
90 | default n |
91 | ---help--- | |
92 | Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. | |
93 | The resulting binary will not work on POWER3 or RS64 processors | |
94 | when compiled with binutils 2.15 or later. | |
95 | ||
5b7c3c91 BH |
96 | config 6xx |
97 | def_bool y | |
98 | depends on PPC32 && PPC_BOOK3S | |
7325927e | 99 | select PPC_HAVE_PMU_SUPPORT |
5b7c3c91 | 100 | |
a0ae9c7c AB |
101 | config POWER3 |
102 | bool | |
28794d34 | 103 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
104 | default y if !POWER4_ONLY |
105 | ||
106 | config POWER4 | |
28794d34 | 107 | depends on PPC64 && PPC_BOOK3S |
a0ae9c7c AB |
108 | def_bool y |
109 | ||
3164cccd AB |
110 | config TUNE_CELL |
111 | bool "Optimize for Cell Broadband Engine" | |
28794d34 | 112 | depends on PPC64 && PPC_BOOK3S |
3164cccd AB |
113 | help |
114 | Cause the compiler to optimize for the PPE of the Cell Broadband | |
115 | Engine. This will make the code run considerably faster on Cell | |
116 | but somewhat slower on other machines. This option only changes | |
117 | the scheduling of instructions, not the selection of instructions | |
118 | itself, so the resulting kernel will keep running on all other | |
119 | machines. When building a kernel that is supposed to run only | |
120 | on Cell, you should also select the POWER4_ONLY option. | |
121 | ||
a0ae9c7c AB |
122 | # this is temp to handle compat with arch=ppc |
123 | config 8xx | |
124 | bool | |
125 | ||
a0ae9c7c | 126 | config E500 |
39aef685 | 127 | select FSL_EMB_PERFMON |
4490c06b | 128 | select PPC_FSL_BOOK3E |
a0ae9c7c AB |
129 | bool |
130 | ||
3dfa8773 KG |
131 | config PPC_E500MC |
132 | bool "e500mc Support" | |
133 | select PPC_FPU | |
134 | depends on E500 | |
135 | ||
a0ae9c7c AB |
136 | config PPC_FPU |
137 | bool | |
138 | default y if PPC64 | |
139 | ||
5753c082 KG |
140 | config FSL_EMB_PERFMON |
141 | bool "Freescale Embedded Perfmon" | |
142 | depends on E500 || PPC_83xx | |
143 | help | |
144 | This is the Performance Monitor support found on the e500 core | |
145 | and some e300 cores (c3 and c4). Select this only if your | |
146 | core supports the Embedded Performance Monitor APU | |
147 | ||
a1110654 SW |
148 | config FSL_EMB_PERF_EVENT |
149 | bool | |
150 | depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS | |
151 | default y | |
152 | ||
153 | config FSL_EMB_PERF_EVENT_E500 | |
154 | bool | |
155 | depends on FSL_EMB_PERF_EVENT && E500 | |
156 | default y | |
157 | ||
a0ae9c7c AB |
158 | config 4xx |
159 | bool | |
160 | depends on 40x || 44x | |
161 | default y | |
162 | ||
163 | config BOOKE | |
164 | bool | |
2d27cfd3 | 165 | depends on E200 || E500 || 44x || PPC_BOOK3E |
a0ae9c7c AB |
166 | default y |
167 | ||
168 | config FSL_BOOKE | |
169 | bool | |
4490c06b | 170 | depends on (E200 || E500) && PPC32 |
a0ae9c7c AB |
171 | default y |
172 | ||
4490c06b KG |
173 | # this is for common code between PPC32 & PPC64 FSL BOOKE |
174 | config PPC_FSL_BOOK3E | |
175 | bool | |
176 | select FSL_EMB_PERFMON | |
177 | default y if FSL_BOOKE | |
39aef685 | 178 | |
a0ae9c7c AB |
179 | config PTE_64BIT |
180 | bool | |
4ee7084e BB |
181 | depends on 44x || E500 || PPC_86xx |
182 | default y if PHYS_64BIT | |
a0ae9c7c AB |
183 | |
184 | config PHYS_64BIT | |
4ee7084e BB |
185 | bool 'Large physical address support' if E500 || PPC_86xx |
186 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx | |
a0ae9c7c AB |
187 | ---help--- |
188 | This option enables kernel support for larger than 32-bit physical | |
4ee7084e BB |
189 | addresses. This feature may not be available on all cores. |
190 | ||
191 | If you have more than 3.5GB of RAM or so, you also need to enable | |
192 | SWIOTLB under Kernel Options for this to work. The actual number | |
193 | is platform-dependent. | |
a0ae9c7c AB |
194 | |
195 | If in doubt, say N here. | |
196 | ||
197 | config ALTIVEC | |
198 | bool "AltiVec Support" | |
28794d34 | 199 | depends on 6xx || POWER4 |
a0ae9c7c AB |
200 | ---help--- |
201 | This option enables kernel support for the Altivec extensions to the | |
202 | PowerPC processor. The kernel currently supports saving and restoring | |
203 | altivec registers, and turning on the 'altivec enable' bit so user | |
204 | processes can execute altivec instructions. | |
205 | ||
206 | This option is only usefully if you have a processor that supports | |
207 | altivec (G4, otherwise known as 74xx series), but does not have | |
208 | any affect on a non-altivec cpu (it does, however add code to the | |
209 | kernel). | |
210 | ||
211 | If in doubt, say Y here. | |
212 | ||
96d5b52c MN |
213 | config VSX |
214 | bool "VSX Support" | |
215 | depends on POWER4 && ALTIVEC && PPC_FPU | |
216 | ---help--- | |
217 | ||
218 | This option enables kernel support for the Vector Scaler extensions | |
219 | to the PowerPC processor. The kernel currently supports saving and | |
220 | restoring VSX registers, and turning on the 'VSX enable' bit so user | |
221 | processes can execute VSX instructions. | |
222 | ||
223 | This option is only useful if you have a processor that supports | |
224 | VSX (P7 and above), but does not have any affect on a non-VSX | |
225 | CPUs (it does, however add code to the kernel). | |
226 | ||
227 | If in doubt, say Y here. | |
228 | ||
a0ae9c7c AB |
229 | config SPE |
230 | bool "SPE Support" | |
3dfa8773 | 231 | depends on E200 || (E500 && !PPC_E500MC) |
a0ae9c7c AB |
232 | default y |
233 | ---help--- | |
234 | This option enables kernel support for the Signal Processing | |
235 | Extensions (SPE) to the PowerPC processor. The kernel currently | |
236 | supports saving and restoring SPE registers, and turning on the | |
237 | 'spe enable' bit so user processes can execute SPE instructions. | |
238 | ||
239 | This option is only useful if you have a processor that supports | |
240 | SPE (e500, otherwise known as 85xx series), but does not have any | |
241 | effect on a non-spe cpu (it does, however add code to the kernel). | |
242 | ||
243 | If in doubt, say Y here. | |
244 | ||
245 | config PPC_STD_MMU | |
5b7c3c91 BH |
246 | def_bool y |
247 | depends on PPC_BOOK3S | |
a0ae9c7c AB |
248 | |
249 | config PPC_STD_MMU_32 | |
250 | def_bool y | |
251 | depends on PPC_STD_MMU && PPC32 | |
252 | ||
5e696617 BH |
253 | config PPC_STD_MMU_64 |
254 | def_bool y | |
255 | depends on PPC_STD_MMU && PPC64 | |
256 | ||
257 | config PPC_MMU_NOHASH | |
258 | def_bool y | |
259 | depends on !PPC_STD_MMU | |
260 | ||
2d27cfd3 BH |
261 | config PPC_MMU_NOHASH_32 |
262 | def_bool y | |
263 | depends on PPC_MMU_NOHASH && PPC32 | |
264 | ||
265 | config PPC_MMU_NOHASH_64 | |
266 | def_bool y | |
267 | depends on PPC_MMU_NOHASH && PPC64 | |
268 | ||
70fe3af8 KG |
269 | config PPC_BOOK3E_MMU |
270 | def_bool y | |
2d27cfd3 | 271 | depends on FSL_BOOKE || PPC_BOOK3E |
70fe3af8 | 272 | |
a0ae9c7c AB |
273 | config PPC_MM_SLICES |
274 | bool | |
ca9153a3 | 275 | default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
a0ae9c7c AB |
276 | default n |
277 | ||
278 | config VIRT_CPU_ACCOUNTING | |
279 | bool "Deterministic task and CPU time accounting" | |
280 | depends on PPC64 | |
281 | default y | |
282 | help | |
283 | Select this option to enable more accurate task and CPU time | |
284 | accounting. This is done by reading a CPU counter on each | |
285 | kernel entry and exit and on transitions within the kernel | |
286 | between system, softirq and hardirq state, so there is a | |
287 | small performance impact. This also enables accounting of | |
288 | stolen time on logically-partitioned systems running on | |
289 | IBM POWER5-based machines. | |
290 | ||
291 | If in doubt, say Y here. | |
292 | ||
105988c0 PM |
293 | config PPC_HAVE_PMU_SUPPORT |
294 | bool | |
295 | ||
296 | config PPC_PERF_CTRS | |
297 | def_bool y | |
cdd6c482 | 298 | depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT |
105988c0 | 299 | help |
cdd6c482 | 300 | This enables the powerpc-specific perf_event back-end. |
105988c0 | 301 | |
a0ae9c7c | 302 | config SMP |
e7f75ad0 | 303 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x |
a0ae9c7c AB |
304 | bool "Symmetric multi-processing support" |
305 | ---help--- | |
306 | This enables support for systems with more than one CPU. If you have | |
307 | a system with only one CPU, say N. If you have a system with more | |
308 | than one CPU, say Y. Note that the kernel does not currently | |
309 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors | |
310 | since they have inadequate hardware support for multiprocessor | |
311 | operation. | |
312 | ||
313 | If you say N here, the kernel will run on single and multiprocessor | |
314 | machines, but will use only one CPU of a multiprocessor machine. If | |
315 | you say Y here, the kernel will run on single-processor machines. | |
316 | On a single-processor machine, the kernel will run faster if you say | |
317 | N here. | |
318 | ||
319 | If you don't know what to do here, say N. | |
320 | ||
321 | config NR_CPUS | |
2d8ae638 MN |
322 | int "Maximum number of CPUs (2-8192)" |
323 | range 2 8192 | |
a0ae9c7c AB |
324 | depends on SMP |
325 | default "32" if PPC64 | |
326 | default "4" | |
327 | ||
328 | config NOT_COHERENT_CACHE | |
329 | bool | |
b91a143b | 330 | depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON |
e7f75ad0 | 331 | default n if PPC_47x |
a0ae9c7c AB |
332 | default y |
333 | ||
f8eb77d6 | 334 | config CHECK_CACHE_COHERENCY |
a0ae9c7c AB |
335 | bool |
336 | ||
337 | endmenu |