[linux-2.6-block.git] / arch / powerpc / platforms / Kconfig.cputype

config PPC64
	bool "64-bit kernel"
	default n
	select HAVE_VIRT_CPU_ACCOUNTING
	help
	  This option selects whether a 32-bit or a 64-bit kernel
	  will be built.

menu "Processor support"
choice
	prompt "Processor Type"
	depends on PPC32
	help
	  There are five families of 32 bit PowerPC chips supported.
	  The most common ones are the desktop and server CPUs (601, 603,
	  604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
	  embedded 512x/52xx/82xx/83xx/86xx counterparts.
	  The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
	  (85xx) each form a family of their own that is not compatible
	  with the others.

	  If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.

config PPC_BOOK3S_32
	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
	select PPC_FPU

config PPC_85xx
	bool "Freescale 85xx"
	select E500

config PPC_8xx
	bool "Freescale 8xx"
	select FSL_SOC
	select 8xx
	select PPC_LIB_RHEAP

config 40x
	bool "AMCC 40x"
	select PPC_DCR_NATIVE
	select PPC_UDBG_16550
	select 4xx_SOC
	select PPC_PCI_CHOICE

config 44x
	bool "AMCC 44x, 46x or 47x"
	select PPC_DCR_NATIVE
	select PPC_UDBG_16550
	select 4xx_SOC
	select PPC_PCI_CHOICE
	select PHYS_64BIT

config E200
	bool "Freescale e200"

endchoice

choice
	prompt "Processor Type"
	depends on PPC64
	help
	  There are two families of 64 bit PowerPC chips supported.
	  The most common ones are the desktop and server CPUs
	  (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)

	  The other are the "embedded" processors compliant with the
	  "Book 3E" variant of the architecture

config PPC_BOOK3S_64
	bool "Server processors"
	select PPC_FPU
	select PPC_HAVE_PMU_SUPPORT
	select SYS_SUPPORTS_HUGETLBFS
	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if PPC_64K_PAGES

config PPC_BOOK3E_64
	bool "Embedded processors"
	select PPC_FPU # Make it a choice ?
	select PPC_SMP_MUXED_IPI
	select PPC_DOORBELL

endchoice

choice
	prompt "CPU selection"
	depends on PPC64
	default GENERIC_CPU
	help
	  This will create a kernel which is optimised for a particular CPU.
	  The resulting kernel may not run on other CPUs, so use this with care.

	  If unsure, select Generic.

config GENERIC_CPU
	bool "Generic"
	depends on !CPU_LITTLE_ENDIAN

config CELL_CPU
	bool "Cell Broadband Engine"
	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN

config POWER4_CPU
	bool "POWER4"
	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN

config POWER5_CPU
	bool "POWER5"
	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN

config POWER6_CPU
	bool "POWER6"
	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN

config POWER7_CPU
	bool "POWER7"
	depends on PPC_BOOK3S_64

config E5500_CPU
	bool "Freescale e5500"
	depends on E500

config E6500_CPU
	bool "Freescale e6500"
	depends on E500

endchoice

config PPC_BOOK3S
	def_bool y
	depends on PPC_BOOK3S_32 || PPC_BOOK3S_64

config PPC_BOOK3E
	def_bool y
	depends on PPC_BOOK3E_64

config 6xx
	def_bool y
	depends on PPC32 && PPC_BOOK3S
	select PPC_HAVE_PMU_SUPPORT

config POWER3
	depends on PPC64 && PPC_BOOK3S
	def_bool y

config POWER4
	depends on PPC64 && PPC_BOOK3S
	def_bool y

config PPC_A2
	bool
	depends on PPC_BOOK3E_64

config TUNE_CELL
	bool "Optimize for Cell Broadband Engine"
	depends on PPC64 && PPC_BOOK3S
	help
	  Cause the compiler to optimize for the PPE of the Cell Broadband
	  Engine. This will make the code run considerably faster on Cell
	  but somewhat slower on other machines. This option only changes
	  the scheduling of instructions, not the selection of instructions
	  itself, so the resulting kernel will keep running on all other
	  machines.

# this is temp to handle compat with arch=ppc
config 8xx
	bool

config E500
	select FSL_EMB_PERFMON
	select PPC_FSL_BOOK3E
	bool

config PPC_E500MC
	bool "e500mc Support"
	select PPC_FPU
	select COMMON_CLK
	depends on E500
	help
	  This must be enabled for running on e500mc (and derivatives
	  such as e5500/e6500), and must be disabled for running on
	  e500v1 or e500v2.

config PPC_FPU
	bool
	default y if PPC64

config FSL_EMB_PERFMON
	bool "Freescale Embedded Perfmon"
	depends on E500 || PPC_83xx
	help
	  This is the Performance Monitor support found on the e500 core
	  and some e300 cores (c3 and c4).  Select this only if your
	  core supports the Embedded Performance Monitor APU

config FSL_EMB_PERF_EVENT
	bool
	depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
	default y

config FSL_EMB_PERF_EVENT_E500
	bool
	depends on FSL_EMB_PERF_EVENT && E500
	default y

config 4xx
	bool
	depends on 40x || 44x
	default y

config BOOKE
	bool
	depends on E200 || E500 || 44x || PPC_BOOK3E
	default y

config FSL_BOOKE
	bool
	depends on (E200 || E500) && PPC32
	default y

# this is for common code between PPC32 & PPC64 FSL BOOKE
config PPC_FSL_BOOK3E
	bool
	select FSL_EMB_PERFMON
	select PPC_SMP_MUXED_IPI
	select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
	select PPC_DOORBELL
	default y if FSL_BOOKE

config PTE_64BIT
	bool
	depends on 44x || E500 || PPC_86xx
	default y if PHYS_64BIT

config PHYS_64BIT
	bool 'Large physical address support' if E500 || PPC_86xx
	depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
	---help---
	  This option enables kernel support for larger than 32-bit physical
	  addresses.  This feature may not be available on all cores.

	  If you have more than 3.5GB of RAM or so, you also need to enable
	  SWIOTLB under Kernel Options for this to work.  The actual number
	  is platform-dependent.

	  If in doubt, say N here.

config ALTIVEC
	bool "AltiVec Support"
	depends on 6xx || POWER4 || (PPC_E500MC && PPC64)
	---help---
	  This option enables kernel support for the Altivec extensions to the
	  PowerPC processor. The kernel currently supports saving and restoring
	  altivec registers, and turning on the 'altivec enable' bit so user
	  processes can execute altivec instructions.

	  This option is only usefully if you have a processor that supports
	  altivec (G4, otherwise known as 74xx series), but does not have
	  any affect on a non-altivec cpu (it does, however add code to the
	  kernel).

	  If in doubt, say Y here.

config VSX
	bool "VSX Support"
	depends on POWER4 && ALTIVEC && PPC_FPU
	---help---

	  This option enables kernel support for the Vector Scaler extensions
	  to the PowerPC processor. The kernel currently supports saving and
	  restoring VSX registers, and turning on the 'VSX enable' bit so user
	  processes can execute VSX instructions.

	  This option is only useful if you have a processor that supports
	  VSX (P7 and above), but does not have any affect on a non-VSX
	  CPUs (it does, however add code to the kernel).

	  If in doubt, say Y here.

config PPC_ICSWX
	bool "Support for PowerPC icswx coprocessor instruction"
	depends on POWER4 || PPC_A2
	default n
	---help---

	  This option enables kernel support for the PowerPC Initiate
	  Coprocessor Store Word (icswx) coprocessor instruction on POWER7
	  or newer processors.

	  This option is only useful if you have a processor that supports
	  the icswx coprocessor instruction. It does not have any effect
	  on processors without the icswx coprocessor instruction.

	  This option slightly increases kernel memory usage.

	  If in doubt, say N here.

config PPC_ICSWX_PID
	bool "icswx requires direct PID management"
	depends on PPC_ICSWX && POWER4
	default y
	---help---
	  The PID register in server is used explicitly for ICSWX.  In
	  embedded systems PID management is done by the system.

config PPC_ICSWX_USE_SIGILL
	bool "Should a bad CT cause a SIGILL?"
	depends on PPC_ICSWX
	default n
	---help---
	  Should a bad CT used for "non-record form ICSWX" cause an
	  illegal instruction signal or should it be silent as
	  architected.

	  If in doubt, say N here.

config SPE
	bool "SPE Support"
	depends on E200 || (E500 && !PPC_E500MC)
	default y
	---help---
	  This option enables kernel support for the Signal Processing
	  Extensions (SPE) to the PowerPC processor. The kernel currently
	  supports saving and restoring SPE registers, and turning on the
	  'spe enable' bit so user processes can execute SPE instructions.

	  This option is only useful if you have a processor that supports
	  SPE (e500, otherwise known as 85xx series), but does not have any
	  effect on a non-spe cpu (it does, however add code to the kernel).

	  If in doubt, say Y here.

config PPC_STD_MMU
	def_bool y
	depends on PPC_BOOK3S

config PPC_STD_MMU_32
	def_bool y
	depends on PPC_STD_MMU && PPC32

config PPC_STD_MMU_64
	def_bool y
	depends on PPC_STD_MMU && PPC64

config PPC_MMU_NOHASH
	def_bool y
	depends on !PPC_STD_MMU

config PPC_BOOK3E_MMU
	def_bool y
	depends on FSL_BOOKE || PPC_BOOK3E

config PPC_MM_SLICES
	bool
	default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
	default n

config PPC_HAVE_PMU_SUPPORT
       bool

config PPC_PERF_CTRS
       def_bool y
       depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
       help
         This enables the powerpc-specific perf_event back-end.

config SMP
	depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
	bool "Symmetric multi-processing support"
	---help---
	  This enables support for systems with more than one CPU. If you have
	  a system with only one CPU, say N. If you have a system with more
	  than one CPU, say Y.  Note that the kernel does not currently
	  support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
	  since they have inadequate hardware support for multiprocessor
	  operation.

	  If you say N here, the kernel will run on single and multiprocessor
	  machines, but will use only one CPU of a multiprocessor machine. If
	  you say Y here, the kernel will run on single-processor machines.
	  On a single-processor machine, the kernel will run faster if you say
	  N here.

	  If you don't know what to do here, say N.

config NR_CPUS
	int "Maximum number of CPUs (2-8192)"
	range 2 8192
	depends on SMP
	default "32" if PPC64
	default "4"

config NOT_COHERENT_CACHE
	bool
	depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
	default n if PPC_47x
	default y

config CHECK_CACHE_COHERENCY
	bool

config PPC_DOORBELL
	bool
	default n

endmenu

choice
	prompt "Endianness selection"
	default CPU_BIG_ENDIAN
	help
	  This option selects whether a big endian or little endian kernel will
	  be built.

config CPU_BIG_ENDIAN
	bool "Build big endian kernel"
	help
	  Build a big endian kernel.

	  If unsure, select this option.

config CPU_LITTLE_ENDIAN
	bool "Build little endian kernel"
	help
	  Build a little endian kernel.

	  Note that if cross compiling a little endian kernel,
	  CROSS_COMPILE must point to a toolchain capable of targeting
	  little endian powerpc.

endchoice
Commit	Line	Data
a0ae9c7c AB	1	config PPC64
	2	bool "64-bit kernel"
	3	default n
b952741c	4	select HAVE_VIRT_CPU_ACCOUNTING
a0ae9c7c AB	5	help
	6	This option selects whether a 32-bit or a 64-bit kernel
	7	will be built.
	8
	9	menu "Processor support"
	10	choice
	11	prompt "Processor Type"
	12	depends on PPC32
a0ae9c7c	13	help
b9fd305d AB	14	There are five families of 32 bit PowerPC chips supported.
	15	The most common ones are the desktop and server CPUs (601, 603,
	16	604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
e177edcd	17	embedded 512x/52xx/82xx/83xx/86xx counterparts.
b9fd305d AB	18	The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
	19	(85xx) each form a family of their own that is not compatible
	20	with the others.
	21
	22	If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
	23
48c93112	24	config PPC_BOOK3S_32
e177edcd	25	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
a0ae9c7c AB	26	select PPC_FPU
a0ae9c7c AB	27
a0ae9c7c AB	28	config PPC_85xx
	29	bool "Freescale 85xx"
	30	select E500
a0ae9c7c	31
a0ae9c7c AB	32	config PPC_8xx
	33	bool "Freescale 8xx"
	34	select FSL_SOC
	35	select 8xx
1088a209	36	select PPC_LIB_RHEAP
a0ae9c7c AB	37
	38	config 40x
	39	bool "AMCC 40x"
	40	select PPC_DCR_NATIVE
9dae8afd	41	select PPC_UDBG_16550
93173ce2	42	select 4xx_SOC
b500563b	43	select PPC_PCI_CHOICE
a0ae9c7c AB	44
a0ae9c7c AB	45	config 44x
e7f75ad0	46	bool "AMCC 44x, 46x or 47x"
a0ae9c7c	47	select PPC_DCR_NATIVE
1d5499b5	48	select PPC_UDBG_16550
93173ce2	49	select 4xx_SOC
b500563b	50	select PPC_PCI_CHOICE
4ee7084e	51	select PHYS_64BIT
a0ae9c7c AB	52
	53	config E200
	54	bool "Freescale e200"
	55
	56	endchoice
	57
2d27cfd3 BH	58	choice
2d27cfd3 BH	59	prompt "Processor Type"
5b7c3c91	60	depends on PPC64
2d27cfd3 BH	61	help
	62	There are two families of 64 bit PowerPC chips supported.
	63	The most common ones are the desktop and server CPUs
	64	(POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
	65
	66	The other are the "embedded" processors compliant with the
	67	"Book 3E" variant of the architecture
	68
	69	config PPC_BOOK3S_64
	70	bool "Server processors"
5b7c3c91	71	select PPC_FPU
5adfd346	72	select PPC_HAVE_PMU_SUPPORT
41151e77	73	select SYS_SUPPORTS_HUGETLBFS
074c2eae	74	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if PPC_64K_PAGES
5b7c3c91	75
2d27cfd3 BH	76	config PPC_BOOK3E_64
	77	bool "Embedded processors"
	78	select PPC_FPU # Make it a choice ?
1ece355b	79	select PPC_SMP_MUXED_IPI
440bc685	80	select PPC_DOORBELL
2d27cfd3 BH	81
	82	endchoice
	83
d23c6fb4 AB	84	choice
	85	prompt "CPU selection"
	86	depends on PPC64
	87	default GENERIC_CPU
	88	help
	89	This will create a kernel which is optimised for a particular CPU.
	90	The resulting kernel may not run on other CPUs, so use this with care.
	91
	92	If unsure, select Generic.
	93
	94	config GENERIC_CPU
	95	bool "Generic"
686245be	96	depends on !CPU_LITTLE_ENDIAN
d23c6fb4 AB	97
	98	config CELL_CPU
	99	bool "Cell Broadband Engine"
686245be	100	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
d23c6fb4 AB	101
	102	config POWER4_CPU
	103	bool "POWER4"
686245be	104	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
d23c6fb4 AB	105
	106	config POWER5_CPU
	107	bool "POWER5"
686245be	108	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
d23c6fb4 AB	109
	110	config POWER6_CPU
	111	bool "POWER6"
686245be	112	depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
d23c6fb4 AB	113
	114	config POWER7_CPU
	115	bool "POWER7"
01718ba6 SW	116	depends on PPC_BOOK3S_64
	117
	118	config E5500_CPU
	119	bool "Freescale e5500"
	120	depends on E500
	121
	122	config E6500_CPU
	123	bool "Freescale e6500"
	124	depends on E500
d23c6fb4 AB	125
	126	endchoice
	127
48c93112 BH	128	config PPC_BOOK3S
	129	def_bool y
	130	depends on PPC_BOOK3S_32 \|\| PPC_BOOK3S_64
28794d34	131
2d27cfd3 BH	132	config PPC_BOOK3E
	133	def_bool y
	134	depends on PPC_BOOK3E_64
	135
5b7c3c91 BH	136	config 6xx
	137	def_bool y
	138	depends on PPC32 && PPC_BOOK3S
7325927e	139	select PPC_HAVE_PMU_SUPPORT
5b7c3c91	140
a0ae9c7c	141	config POWER3
28794d34	142	depends on PPC64 && PPC_BOOK3S
ff2d7587	143	def_bool y
a0ae9c7c AB	144
a0ae9c7c AB	145	config POWER4
28794d34	146	depends on PPC64 && PPC_BOOK3S
a0ae9c7c AB	147	def_bool y
a0ae9c7c AB	148
76b4eda8 BH	149	config PPC_A2
	150	bool
	151	depends on PPC_BOOK3E_64
	152
3164cccd AB	153	config TUNE_CELL
3164cccd AB	154	bool "Optimize for Cell Broadband Engine"
28794d34	155	depends on PPC64 && PPC_BOOK3S
3164cccd AB	156	help
	157	Cause the compiler to optimize for the PPE of the Cell Broadband
	158	Engine. This will make the code run considerably faster on Cell
	159	but somewhat slower on other machines. This option only changes
	160	the scheduling of instructions, not the selection of instructions
	161	itself, so the resulting kernel will keep running on all other
ff2d7587	162	machines.
3164cccd	163
a0ae9c7c AB	164	# this is temp to handle compat with arch=ppc
	165	config 8xx
	166	bool
	167
a0ae9c7c	168	config E500
39aef685	169	select FSL_EMB_PERFMON
4490c06b	170	select PPC_FSL_BOOK3E
a0ae9c7c AB	171	bool
a0ae9c7c AB	172
3dfa8773 KG	173	config PPC_E500MC
	174	bool "e500mc Support"
	175	select PPC_FPU
555eae97	176	select COMMON_CLK
3dfa8773	177	depends on E500
9653018b SW	178	help
	179	This must be enabled for running on e500mc (and derivatives
	180	such as e5500/e6500), and must be disabled for running on
	181	e500v1 or e500v2.
3dfa8773	182
a0ae9c7c AB	183	config PPC_FPU
	184	bool
	185	default y if PPC64
	186
5753c082 KG	187	config FSL_EMB_PERFMON
	188	bool "Freescale Embedded Perfmon"
	189	depends on E500 \|\| PPC_83xx
	190	help
	191	This is the Performance Monitor support found on the e500 core
	192	and some e300 cores (c3 and c4). Select this only if your
	193	core supports the Embedded Performance Monitor APU
	194
a1110654 SW	195	config FSL_EMB_PERF_EVENT
	196	bool
	197	depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
	198	default y
	199
	200	config FSL_EMB_PERF_EVENT_E500
	201	bool
	202	depends on FSL_EMB_PERF_EVENT && E500
	203	default y
	204
a0ae9c7c AB	205	config 4xx
	206	bool
	207	depends on 40x \|\| 44x
	208	default y
	209
	210	config BOOKE
	211	bool
2d27cfd3	212	depends on E200 \|\| E500 \|\| 44x \|\| PPC_BOOK3E
a0ae9c7c AB	213	default y
	214
	215	config FSL_BOOKE
	216	bool
4490c06b	217	depends on (E200 \|\| E500) && PPC32
a0ae9c7c AB	218	default y
a0ae9c7c AB	219
4490c06b KG	220	# this is for common code between PPC32 & PPC64 FSL BOOKE
	221	config PPC_FSL_BOOK3E
	222	bool
	223	select FSL_EMB_PERFMON
1ece355b	224	select PPC_SMP_MUXED_IPI
a475c8ec	225	select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT \|\| PPC64
440bc685	226	select PPC_DOORBELL
4490c06b	227	default y if FSL_BOOKE
39aef685	228
a0ae9c7c AB	229	config PTE_64BIT
a0ae9c7c AB	230	bool
4ee7084e BB	231	depends on 44x \|\| E500 \|\| PPC_86xx
4ee7084e BB	232	default y if PHYS_64BIT
a0ae9c7c AB	233
a0ae9c7c AB	234	config PHYS_64BIT
4ee7084e BB	235	bool 'Large physical address support' if E500 \|\| PPC_86xx
4ee7084e BB	236	depends on (44x \|\| E500 \|\| PPC_86xx) && !PPC_83xx && !PPC_82xx
a0ae9c7c AB	237	---help---
a0ae9c7c AB	238	This option enables kernel support for larger than 32-bit physical
4ee7084e BB	239	addresses. This feature may not be available on all cores.
	240
	241	If you have more than 3.5GB of RAM or so, you also need to enable
	242	SWIOTLB under Kernel Options for this to work. The actual number
	243	is platform-dependent.
a0ae9c7c AB	244
	245	If in doubt, say N here.
	246
	247	config ALTIVEC
	248	bool "AltiVec Support"
cd66cc2e	249	depends on 6xx \|\| POWER4 \|\| (PPC_E500MC && PPC64)
a0ae9c7c AB	250	---help---
	251	This option enables kernel support for the Altivec extensions to the
	252	PowerPC processor. The kernel currently supports saving and restoring
	253	altivec registers, and turning on the 'altivec enable' bit so user
	254	processes can execute altivec instructions.
	255
	256	This option is only usefully if you have a processor that supports
	257	altivec (G4, otherwise known as 74xx series), but does not have
	258	any affect on a non-altivec cpu (it does, however add code to the
	259	kernel).
	260
	261	If in doubt, say Y here.
	262
96d5b52c MN	263	config VSX
	264	bool "VSX Support"
	265	depends on POWER4 && ALTIVEC && PPC_FPU
	266	---help---
	267
	268	This option enables kernel support for the Vector Scaler extensions
	269	to the PowerPC processor. The kernel currently supports saving and
	270	restoring VSX registers, and turning on the 'VSX enable' bit so user
	271	processes can execute VSX instructions.
	272
	273	This option is only useful if you have a processor that supports
	274	VSX (P7 and above), but does not have any affect on a non-VSX
	275	CPUs (it does, however add code to the kernel).
	276
	277	If in doubt, say Y here.
	278
851d2e2f THFL	279	config PPC_ICSWX
851d2e2f THFL	280	bool "Support for PowerPC icswx coprocessor instruction"
fac26ad4	281	depends on POWER4 \|\| PPC_A2
851d2e2f THFL	282	default n
	283	---help---
	284
	285	This option enables kernel support for the PowerPC Initiate
	286	Coprocessor Store Word (icswx) coprocessor instruction on POWER7
	287	or newer processors.
	288
	289	This option is only useful if you have a processor that supports
	290	the icswx coprocessor instruction. It does not have any effect
	291	on processors without the icswx coprocessor instruction.
	292
	293	This option slightly increases kernel memory usage.
	294
	295	If in doubt, say N here.
	296
9d670280 JX	297	config PPC_ICSWX_PID
	298	bool "icswx requires direct PID management"
	299	depends on PPC_ICSWX && POWER4
	300	default y
	301	---help---
c3dcf53a	302	The PID register in server is used explicitly for ICSWX. In
6b2aac42	303	embedded systems PID management is done by the system.
9d670280	304
c3dcf53a JX	305	config PPC_ICSWX_USE_SIGILL
	306	bool "Should a bad CT cause a SIGILL?"
	307	depends on PPC_ICSWX
	308	default n
	309	---help---
	310	Should a bad CT used for "non-record form ICSWX" cause an
6b2aac42	311	illegal instruction signal or should it be silent as
c3dcf53a JX	312	architected.
	313
	314	If in doubt, say N here.
	315
a0ae9c7c AB	316	config SPE
a0ae9c7c AB	317	bool "SPE Support"
3dfa8773	318	depends on E200 \|\| (E500 && !PPC_E500MC)
a0ae9c7c AB	319	default y
	320	---help---
	321	This option enables kernel support for the Signal Processing
	322	Extensions (SPE) to the PowerPC processor. The kernel currently
	323	supports saving and restoring SPE registers, and turning on the
	324	'spe enable' bit so user processes can execute SPE instructions.
	325
	326	This option is only useful if you have a processor that supports
	327	SPE (e500, otherwise known as 85xx series), but does not have any
	328	effect on a non-spe cpu (it does, however add code to the kernel).
	329
	330	If in doubt, say Y here.
	331
	332	config PPC_STD_MMU
5b7c3c91 BH	333	def_bool y
5b7c3c91 BH	334	depends on PPC_BOOK3S
a0ae9c7c AB	335
	336	config PPC_STD_MMU_32
	337	def_bool y
	338	depends on PPC_STD_MMU && PPC32
	339
5e696617 BH	340	config PPC_STD_MMU_64
	341	def_bool y
	342	depends on PPC_STD_MMU && PPC64
	343
	344	config PPC_MMU_NOHASH
	345	def_bool y
	346	depends on !PPC_STD_MMU
	347
70fe3af8 KG	348	config PPC_BOOK3E_MMU
70fe3af8 KG	349	def_bool y
2d27cfd3	350	depends on FSL_BOOKE \|\| PPC_BOOK3E
70fe3af8	351
a0ae9c7c AB	352	config PPC_MM_SLICES
a0ae9c7c AB	353	bool
a475c8ec	354	default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) \|\| (PPC_STD_MMU_64 && PPC_64K_PAGES)
a0ae9c7c AB	355	default n
a0ae9c7c AB	356
105988c0 PM	357	config PPC_HAVE_PMU_SUPPORT
	358	bool
	359
	360	config PPC_PERF_CTRS
	361	def_bool y
cdd6c482	362	depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
105988c0	363	help
cdd6c482	364	This enables the powerpc-specific perf_event back-end.
105988c0	365
a0ae9c7c	366	config SMP
e7f75ad0	367	depends on PPC_BOOK3S \|\| PPC_BOOK3E \|\| FSL_BOOKE \|\| PPC_47x
a0ae9c7c AB	368	bool "Symmetric multi-processing support"
	369	---help---
	370	This enables support for systems with more than one CPU. If you have
	371	a system with only one CPU, say N. If you have a system with more
	372	than one CPU, say Y. Note that the kernel does not currently
	373	support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
	374	since they have inadequate hardware support for multiprocessor
	375	operation.
	376
	377	If you say N here, the kernel will run on single and multiprocessor
	378	machines, but will use only one CPU of a multiprocessor machine. If
	379	you say Y here, the kernel will run on single-processor machines.
	380	On a single-processor machine, the kernel will run faster if you say
	381	N here.
	382
	383	If you don't know what to do here, say N.
	384
	385	config NR_CPUS
2d8ae638 MN	386	int "Maximum number of CPUs (2-8192)"
2d8ae638 MN	387	range 2 8192
a0ae9c7c AB	388	depends on SMP
	389	default "32" if PPC64
	390	default "4"
	391
	392	config NOT_COHERENT_CACHE
	393	bool
b91a143b	394	depends on 4xx \|\| 8xx \|\| E200 \|\| PPC_MPC512x \|\| GAMECUBE_COMMON
e7f75ad0	395	default n if PPC_47x
a0ae9c7c AB	396	default y
a0ae9c7c AB	397
f8eb77d6	398	config CHECK_CACHE_COHERENCY
a0ae9c7c AB	399	bool
a0ae9c7c AB	400
440bc685 IM	401	config PPC_DOORBELL
	402	bool
	403	default n
	404
a0ae9c7c	405	endmenu
7c105b63	406
962bc221 AB	407	choice
	408	prompt "Endianness selection"
	409	default CPU_BIG_ENDIAN
7c105b63 AB	410	help
	411	This option selects whether a big endian or little endian kernel will
	412	be built.
	413
962bc221 AB	414	config CPU_BIG_ENDIAN
	415	bool "Build big endian kernel"
	416	help
	417	Build a big endian kernel.
	418
	419	If unsure, select this option.
	420
	421	config CPU_LITTLE_ENDIAN
	422	bool "Build little endian kernel"
	423	help
	424	Build a little endian kernel.
	425
7c105b63 AB	426	Note that if cross compiling a little endian kernel,
	427	CROSS_COMPILE must point to a toolchain capable of targeting
	428	little endian powerpc.
962bc221 AB	429
962bc221 AB	430	endchoice