powerpc/eeh: Cleanup for EEH core
[linux-2.6-block.git] / arch / powerpc / platforms / Kconfig
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4330f5da 1menu "Platform support"
4330f5da 2
55190f88 3source "arch/powerpc/platforms/powernv/Kconfig"
4330f5da 4source "arch/powerpc/platforms/pseries/Kconfig"
4330f5da 5source "arch/powerpc/platforms/chrp/Kconfig"
e177edcd 6source "arch/powerpc/platforms/512x/Kconfig"
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7source "arch/powerpc/platforms/52xx/Kconfig"
8source "arch/powerpc/platforms/powermac/Kconfig"
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9source "arch/powerpc/platforms/maple/Kconfig"
10source "arch/powerpc/platforms/pasemi/Kconfig"
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11source "arch/powerpc/platforms/ps3/Kconfig"
12source "arch/powerpc/platforms/cell/Kconfig"
c8a55f3d 13source "arch/powerpc/platforms/8xx/Kconfig"
d6071f88 14source "arch/powerpc/platforms/82xx/Kconfig"
b5a48346 15source "arch/powerpc/platforms/83xx/Kconfig"
db947808 16source "arch/powerpc/platforms/85xx/Kconfig"
4a89f7fa 17source "arch/powerpc/platforms/86xx/Kconfig"
98750261 18source "arch/powerpc/platforms/embedded6xx/Kconfig"
f6dfc805 19source "arch/powerpc/platforms/44x/Kconfig"
545c069c 20source "arch/powerpc/platforms/40x/Kconfig"
54b318aa 21source "arch/powerpc/platforms/amigaone/Kconfig"
a1d0d98d 22source "arch/powerpc/platforms/wsp/Kconfig"
4330f5da 23
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24config KVM_GUEST
25 bool "KVM Guest support"
643ba4e3 26 default n
2e1ae9c0 27 select EPAPR_PARAVIRT
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28 ---help---
29 This option enables various optimizations for running under the KVM
30 hypervisor. Overhead for the kernel when not running inside KVM should
31 be minimal.
32
33 In case of doubt, say Y
34
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35config EPAPR_PARAVIRT
36 bool "ePAPR para-virtualization support"
37 default n
38 help
39 Enables ePAPR para-virtualization support for guests.
40
41 In case of doubt, say Y
42
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43config PPC_NATIVE
44 bool
28794d34 45 depends on 6xx || PPC64
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46 help
47 Support for running natively on the hardware, i.e. without
48 a hypervisor. This option is not user-selectable but should
49 be selected by all platforms that need it.
50
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51config PPC_OF_BOOT_TRAMPOLINE
52 bool "Support booting from Open Firmware or yaboot"
53 depends on 6xx || PPC64
54 default y
55 help
56 Support from booting from Open Firmware or yaboot using an
57 Open Firmware client interface. This enables the kernel to
f65e51d7 58 communicate with open firmware to retrieve system information
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59 such as the device tree.
60
61 In case of doubt, say Y
62
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63config UDBG_RTAS_CONSOLE
64 bool "RTAS based debug console"
65 depends on PPC_RTAS
66 default n
67
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68config PPC_SMP_MUXED_IPI
69 bool
70 help
71 Select this opton if your platform supports SMP and your
72 interrupt controller provides less than 4 interrupts to each
73 cpu. This will enable the generic code to multiplex the 4
74 messages on to one ipi.
75
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76config PPC_UDBG_BEAT
77 bool "BEAT based debug console"
78 depends on PPC_CELLEB
79 default n
80
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81config IPIC
82 bool
83 default n
84
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85config MPIC
86 bool
87 default n
88
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89config PPC_EPAPR_HV_PIC
90 bool
91 default n
40656397 92 select EPAPR_PARAVIRT
3a93261f 93
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94config MPIC_WEIRD
95 bool
96 default n
97
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98config MPIC_MSGR
99 bool "MPIC message register support"
100 depends on MPIC
101 default n
102 help
103 Enables support for the MPIC message registers. These
104 registers are used for inter-processor communication.
105
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106config PPC_I8259
107 bool
108 default n
109
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110config U3_DART
111 bool
28794d34 112 depends on PPC64
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113 default n
114
115config PPC_RTAS
116 bool
117 default n
118
119config RTAS_ERROR_LOGGING
120 bool
121 depends on PPC_RTAS
122 default n
123
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124config PPC_RTAS_DAEMON
125 bool
126 depends on PPC_RTAS
127 default n
128
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129config RTAS_PROC
130 bool "Proc interface to RTAS"
b80ec3dc 131 depends on PPC_RTAS && PROC_FS
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132 default y
133
134config RTAS_FLASH
135 tristate "Firmware flash interface"
136 depends on PPC64 && RTAS_PROC
137
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138config MMIO_NVRAM
139 bool
140 default n
141
6cfef5b2 142config MPIC_U3_HT_IRQS
4330f5da 143 bool
314b389b 144 default n
4330f5da 145
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146config MPIC_BROKEN_REGREAD
147 bool
148 depends on MPIC
149 help
150 This option enables a MPIC driver workaround for some chips
151 that have a bug that causes some interrupt source information
152 to not read back properly. It is safe to use on other chips as
153 well, but enabling it uses about 8KB of memory to keep copies
154 of the register contents in software.
155
4330f5da 156config IBMVIO
3d066d77 157 depends on PPC_PSERIES
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158 bool
159 default y
160
161config IBMEBUS
162 depends on PPC_PSERIES
163 bool "Support for GX bus based adapters"
164 help
165 Bus device driver for GX bus based adapters.
166
167config PPC_MPC106
168 bool
169 default n
170
171config PPC_970_NAP
172 bool
173 default n
174
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175config PPC_P7_NAP
176 bool
177 default n
178
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179config PPC_INDIRECT_IO
180 bool
181 select GENERIC_IOMAP
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182
183config PPC_INDIRECT_PIO
184 bool
185 select PPC_INDIRECT_IO
186
187config PPC_INDIRECT_MMIO
188 bool
189 select PPC_INDIRECT_IO
4330f5da 190
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191config PPC_IO_WORKAROUNDS
192 bool
193
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194source "drivers/cpufreq/Kconfig"
195
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196menu "CPU Frequency drivers"
197 depends on CPU_FREQ
198
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199config CPU_FREQ_PMAC
200 bool "Support for Apple PowerBooks"
c146c958 201 depends on ADB_PMU && PPC32
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202 select CPU_FREQ_TABLE
203 help
204 This adds support for frequency switching on Apple PowerBooks,
205 this currently includes some models of iBook & Titanium
206 PowerBook.
207
208config CPU_FREQ_PMAC64
209 bool "Support for some Apple G5s"
c146c958 210 depends on PPC_PMAC && PPC64
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211 select CPU_FREQ_TABLE
212 help
213 This adds support for frequency switching on Apple iMac G5,
214 and some of the more recent desktop G5 machines as well.
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215
216config PPC_PASEMI_CPUFREQ
217 bool "Support for PA Semi PWRficient"
c146c958 218 depends on PPC_PASEMI
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219 default y
220 select CPU_FREQ_TABLE
221 help
222 This adds the support for frequency switching on PA Semi
223 PWRficient processors.
224
164a460d 225endmenu
4330f5da 226
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227menu "CPUIdle driver"
228
229source "drivers/cpuidle/Kconfig"
230
231endmenu
232
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233config PPC601_SYNC_FIX
234 bool "Workarounds for PPC601 bugs"
933ee711 235 depends on 6xx && PPC_PMAC
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236 help
237 Some versions of the PPC601 (the first PowerPC chip) have bugs which
238 mean that extra synchronization instructions are required near
239 certain instructions, typically those that make major changes to the
240 CPU state. These extra instructions reduce performance slightly.
241 If you say N here, these extra instructions will not be included,
242 resulting in a kernel which will run faster but may not run at all
243 on some systems with the PPC601 chip.
244
245 If in doubt, say Y here.
246
247config TAU
248 bool "On-chip CPU temperature sensor support"
28794d34 249 depends on 6xx
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250 help
251 G3 and G4 processors have an on-chip temperature sensor called the
252 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
253 temperature within 2-4 degrees Celsius. This option shows the current
254 on-die temperature in /proc/cpuinfo if the cpu supports it.
255
256 Unfortunately, on some chip revisions, this sensor is very inaccurate
257 and in many cases, does not work at all, so don't assume the cpu
258 temp is actually what /proc/cpuinfo says it is.
259
260config TAU_INT
261 bool "Interrupt driven TAU driver (DANGEROUS)"
262 depends on TAU
263 ---help---
264 The TAU supports an interrupt driven mode which causes an interrupt
265 whenever the temperature goes out of range. This is the fastest way
266 to get notified the temp has exceeded a range. With this option off,
267 a timer is used to re-check the temperature periodically.
268
269 However, on some cpus it appears that the TAU interrupt hardware
270 is buggy and can cause a situation which would lead unexplained hard
271 lockups.
272
273 Unless you are extending the TAU driver, or enjoy kernel/hardware
274 debugging, leave this option off.
275
276config TAU_AVERAGE
277 bool "Average high and low temp"
278 depends on TAU
279 ---help---
280 The TAU hardware can compare the temperature to an upper and lower
281 bound. The default behavior is to show both the upper and lower
282 bound in /proc/cpuinfo. If the range is large, the temperature is
283 either changing a lot, or the TAU hardware is broken (likely on some
284 G4's). If the range is small (around 4 degrees), the temperature is
285 relatively stable. If you say Y here, a single temperature value,
286 halfway between the upper and lower bounds, will be reported in
287 /proc/cpuinfo.
288
289 If in doubt, say N here.
290
98750261 291config QUICC_ENGINE
4e330bcf 292 bool "Freescale QUICC Engine (QE) Support"
47fe819e 293 depends on FSL_SOC && PPC32
1088a209 294 select PPC_LIB_RHEAP
bc556ba9 295 select CRC32
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296 help
297 The QUICC Engine (QE) is a new generation of communications
298 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
299 Selecting this option means that you wish to build a kernel
300 for a machine with a QE coprocessor.
301
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302config QE_GPIO
303 bool "QE GPIO support"
304 depends on QUICC_ENGINE
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305 select ARCH_REQUIRE_GPIOLIB
306 help
307 Say Y here if you're going to use hardware that connects to the
308 QE GPIOs.
309
d6071f88 310config CPM2
b8b3caf3 311 bool "Enable support for the CPM2 (Communications Processor Module)"
5753c082 312 depends on (FSL_SOC_BOOKE && PPC32) || 8260
c374e00e 313 select CPM
1088a209 314 select PPC_LIB_RHEAP
b500563b 315 select PPC_PCI_CHOICE
e193325e 316 select ARCH_REQUIRE_GPIOLIB
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317 help
318 The CPM2 (Communications Processor Module) is a coprocessor on
319 embedded CPUs made by Freescale. Selecting this option means that
320 you wish to build a kernel for a machine with a CPM2 coprocessor
321 on it (826x, 827x, 8560).
322
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323config AXON_RAM
324 tristate "Axon DDR2 memory device driver"
ebf0f334 325 depends on PPC_IBM_CELL_BLADE && BLOCK
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326 default m
327 help
328 It registers one block device per Axon's DDR2 memory bank found
329 on a system. Block devices are called axonram?, their major and
330 minor numbers are available in /proc/devices, /proc/partitions or
331 in /sys/block/axonram?/dev.
332
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333config FSL_ULI1575
334 bool
335 default n
fb4f0e88 336 select GENERIC_ISA_DMA
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337 help
338 Supports for the ULI1575 PCIe south bridge that exists on some
339 Freescale reference boards. The boards all use the ULI in pretty
340 much the same way.
341
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342config CPM
343 bool
344
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345config OF_RTC
346 bool
347 help
692105b8 348 Uses information from the OF or flattened device tree to instantiate
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349 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
350
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351config SIMPLE_GPIO
352 bool "Support for simple, memory-mapped GPIO controllers"
353 depends on PPC
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354 select ARCH_REQUIRE_GPIOLIB
355 help
356 Say Y here to support simple, memory-mapped GPIO controllers.
357 These are usually BCSRs used to control board's switches, LEDs,
358 chip-selects, Ethernet/USB PHY's power and various other small
359 on-board peripherals.
360
ea0105ea 361config MCU_MPC8349EMITX
6ca6ca5d 362 bool "MPC8349E-mITX MCU driver"
82640a6b 363 depends on I2C=y && PPC_83xx
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364 select ARCH_REQUIRE_GPIOLIB
365 help
366 Say Y here to enable soft power-off functionality on the Freescale
367 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
368 also register MCU GPIOs with the generic GPIO API, so you'll able
369 to use MCU pins as GPIOs.
370
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371config XILINX_PCI
372 bool "Xilinx PCI host bridge support"
373 depends on PCI && XILINX_VIRTEX
374
4330f5da 375endmenu