powerpc/fsl_udc_core: Fix dumb typo
[linux-2.6-block.git] / arch / powerpc / platforms / Kconfig
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4330f5da 1menu "Platform support"
4330f5da 2
55190f88 3source "arch/powerpc/platforms/powernv/Kconfig"
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4source "arch/powerpc/platforms/pseries/Kconfig"
5source "arch/powerpc/platforms/iseries/Kconfig"
6source "arch/powerpc/platforms/chrp/Kconfig"
e177edcd 7source "arch/powerpc/platforms/512x/Kconfig"
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8source "arch/powerpc/platforms/52xx/Kconfig"
9source "arch/powerpc/platforms/powermac/Kconfig"
10source "arch/powerpc/platforms/prep/Kconfig"
11source "arch/powerpc/platforms/maple/Kconfig"
12source "arch/powerpc/platforms/pasemi/Kconfig"
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13source "arch/powerpc/platforms/ps3/Kconfig"
14source "arch/powerpc/platforms/cell/Kconfig"
c8a55f3d 15source "arch/powerpc/platforms/8xx/Kconfig"
d6071f88 16source "arch/powerpc/platforms/82xx/Kconfig"
b5a48346 17source "arch/powerpc/platforms/83xx/Kconfig"
db947808 18source "arch/powerpc/platforms/85xx/Kconfig"
4a89f7fa 19source "arch/powerpc/platforms/86xx/Kconfig"
98750261 20source "arch/powerpc/platforms/embedded6xx/Kconfig"
f6dfc805 21source "arch/powerpc/platforms/44x/Kconfig"
545c069c 22source "arch/powerpc/platforms/40x/Kconfig"
54b318aa 23source "arch/powerpc/platforms/amigaone/Kconfig"
a1d0d98d 24source "arch/powerpc/platforms/wsp/Kconfig"
4330f5da 25
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26config KVM_GUEST
27 bool "KVM Guest support"
643ba4e3 28 default n
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29 ---help---
30 This option enables various optimizations for running under the KVM
31 hypervisor. Overhead for the kernel when not running inside KVM should
32 be minimal.
33
34 In case of doubt, say Y
35
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36config PPC_NATIVE
37 bool
28794d34 38 depends on 6xx || PPC64
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39 help
40 Support for running natively on the hardware, i.e. without
41 a hypervisor. This option is not user-selectable but should
42 be selected by all platforms that need it.
43
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44config PPC_OF_BOOT_TRAMPOLINE
45 bool "Support booting from Open Firmware or yaboot"
46 depends on 6xx || PPC64
47 default y
48 help
49 Support from booting from Open Firmware or yaboot using an
50 Open Firmware client interface. This enables the kernel to
f65e51d7 51 communicate with open firmware to retrieve system information
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52 such as the device tree.
53
54 In case of doubt, say Y
55
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56config UDBG_RTAS_CONSOLE
57 bool "RTAS based debug console"
58 depends on PPC_RTAS
59 default n
60
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61config PPC_SMP_MUXED_IPI
62 bool
63 help
64 Select this opton if your platform supports SMP and your
65 interrupt controller provides less than 4 interrupts to each
66 cpu. This will enable the generic code to multiplex the 4
67 messages on to one ipi.
68
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69config PPC_UDBG_BEAT
70 bool "BEAT based debug console"
71 depends on PPC_CELLEB
72 default n
73
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74config IPIC
75 bool
76 default n
77
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78config MPIC
79 bool
80 default n
81
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82config PPC_EPAPR_HV_PIC
83 bool
84 default n
85
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86config MPIC_WEIRD
87 bool
88 default n
89
90config PPC_I8259
91 bool
92 default n
93
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94config U3_DART
95 bool
28794d34 96 depends on PPC64
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97 default n
98
99config PPC_RTAS
100 bool
101 default n
102
103config RTAS_ERROR_LOGGING
104 bool
105 depends on PPC_RTAS
106 default n
107
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108config PPC_RTAS_DAEMON
109 bool
110 depends on PPC_RTAS
111 default n
112
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113config RTAS_PROC
114 bool "Proc interface to RTAS"
115 depends on PPC_RTAS
116 default y
117
118config RTAS_FLASH
119 tristate "Firmware flash interface"
120 depends on PPC64 && RTAS_PROC
121
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122config MMIO_NVRAM
123 bool
124 default n
125
6cfef5b2 126config MPIC_U3_HT_IRQS
4330f5da 127 bool
314b389b 128 default n
4330f5da 129
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130config MPIC_BROKEN_REGREAD
131 bool
132 depends on MPIC
133 help
134 This option enables a MPIC driver workaround for some chips
135 that have a bug that causes some interrupt source information
136 to not read back properly. It is safe to use on other chips as
137 well, but enabling it uses about 8KB of memory to keep copies
138 of the register contents in software.
139
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140config IBMVIO
141 depends on PPC_PSERIES || PPC_ISERIES
142 bool
143 default y
144
145config IBMEBUS
146 depends on PPC_PSERIES
147 bool "Support for GX bus based adapters"
148 help
149 Bus device driver for GX bus based adapters.
150
151config PPC_MPC106
152 bool
153 default n
154
155config PPC_970_NAP
156 bool
157 default n
158
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159config PPC_P7_NAP
160 bool
161 default n
162
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163config PPC_INDIRECT_IO
164 bool
165 select GENERIC_IOMAP
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166
167config PPC_INDIRECT_PIO
168 bool
169 select PPC_INDIRECT_IO
170
171config PPC_INDIRECT_MMIO
172 bool
173 select PPC_INDIRECT_IO
4330f5da 174
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175config PPC_IO_WORKAROUNDS
176 bool
177
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178config GENERIC_IOMAP
179 bool
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180
181source "drivers/cpufreq/Kconfig"
182
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183menu "CPU Frequency drivers"
184 depends on CPU_FREQ
185
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186config CPU_FREQ_PMAC
187 bool "Support for Apple PowerBooks"
c146c958 188 depends on ADB_PMU && PPC32
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189 select CPU_FREQ_TABLE
190 help
191 This adds support for frequency switching on Apple PowerBooks,
192 this currently includes some models of iBook & Titanium
193 PowerBook.
194
195config CPU_FREQ_PMAC64
196 bool "Support for some Apple G5s"
c146c958 197 depends on PPC_PMAC && PPC64
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198 select CPU_FREQ_TABLE
199 help
200 This adds support for frequency switching on Apple iMac G5,
201 and some of the more recent desktop G5 machines as well.
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202
203config PPC_PASEMI_CPUFREQ
204 bool "Support for PA Semi PWRficient"
c146c958 205 depends on PPC_PASEMI
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206 default y
207 select CPU_FREQ_TABLE
208 help
209 This adds the support for frequency switching on PA Semi
210 PWRficient processors.
211
164a460d 212endmenu
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213
214config PPC601_SYNC_FIX
215 bool "Workarounds for PPC601 bugs"
216 depends on 6xx && (PPC_PREP || PPC_PMAC)
217 help
218 Some versions of the PPC601 (the first PowerPC chip) have bugs which
219 mean that extra synchronization instructions are required near
220 certain instructions, typically those that make major changes to the
221 CPU state. These extra instructions reduce performance slightly.
222 If you say N here, these extra instructions will not be included,
223 resulting in a kernel which will run faster but may not run at all
224 on some systems with the PPC601 chip.
225
226 If in doubt, say Y here.
227
228config TAU
229 bool "On-chip CPU temperature sensor support"
28794d34 230 depends on 6xx
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231 help
232 G3 and G4 processors have an on-chip temperature sensor called the
233 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
234 temperature within 2-4 degrees Celsius. This option shows the current
235 on-die temperature in /proc/cpuinfo if the cpu supports it.
236
237 Unfortunately, on some chip revisions, this sensor is very inaccurate
238 and in many cases, does not work at all, so don't assume the cpu
239 temp is actually what /proc/cpuinfo says it is.
240
241config TAU_INT
242 bool "Interrupt driven TAU driver (DANGEROUS)"
243 depends on TAU
244 ---help---
245 The TAU supports an interrupt driven mode which causes an interrupt
246 whenever the temperature goes out of range. This is the fastest way
247 to get notified the temp has exceeded a range. With this option off,
248 a timer is used to re-check the temperature periodically.
249
250 However, on some cpus it appears that the TAU interrupt hardware
251 is buggy and can cause a situation which would lead unexplained hard
252 lockups.
253
254 Unless you are extending the TAU driver, or enjoy kernel/hardware
255 debugging, leave this option off.
256
257config TAU_AVERAGE
258 bool "Average high and low temp"
259 depends on TAU
260 ---help---
261 The TAU hardware can compare the temperature to an upper and lower
262 bound. The default behavior is to show both the upper and lower
263 bound in /proc/cpuinfo. If the range is large, the temperature is
264 either changing a lot, or the TAU hardware is broken (likely on some
265 G4's). If the range is small (around 4 degrees), the temperature is
266 relatively stable. If you say Y here, a single temperature value,
267 halfway between the upper and lower bounds, will be reported in
268 /proc/cpuinfo.
269
270 If in doubt, say N here.
271
98750261 272config QUICC_ENGINE
4e330bcf 273 bool "Freescale QUICC Engine (QE) Support"
47fe819e 274 depends on FSL_SOC && PPC32
1088a209 275 select PPC_LIB_RHEAP
bc556ba9 276 select CRC32
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277 help
278 The QUICC Engine (QE) is a new generation of communications
279 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
280 Selecting this option means that you wish to build a kernel
281 for a machine with a QE coprocessor.
282
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283config QE_GPIO
284 bool "QE GPIO support"
285 depends on QUICC_ENGINE
286 select GENERIC_GPIO
287 select ARCH_REQUIRE_GPIOLIB
288 help
289 Say Y here if you're going to use hardware that connects to the
290 QE GPIOs.
291
d6071f88 292config CPM2
b8b3caf3 293 bool "Enable support for the CPM2 (Communications Processor Module)"
5753c082 294 depends on (FSL_SOC_BOOKE && PPC32) || 8260
c374e00e 295 select CPM
1088a209 296 select PPC_LIB_RHEAP
b500563b 297 select PPC_PCI_CHOICE
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298 select ARCH_REQUIRE_GPIOLIB
299 select GENERIC_GPIO
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300 help
301 The CPM2 (Communications Processor Module) is a coprocessor on
302 embedded CPUs made by Freescale. Selecting this option means that
303 you wish to build a kernel for a machine with a CPM2 coprocessor
304 on it (826x, 827x, 8560).
305
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306config AXON_RAM
307 tristate "Axon DDR2 memory device driver"
ebf0f334 308 depends on PPC_IBM_CELL_BLADE && BLOCK
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309 default m
310 help
311 It registers one block device per Axon's DDR2 memory bank found
312 on a system. Block devices are called axonram?, their major and
313 minor numbers are available in /proc/devices, /proc/partitions or
314 in /sys/block/axonram?/dev.
315
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316config FSL_ULI1575
317 bool
318 default n
fb4f0e88 319 select GENERIC_ISA_DMA
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320 help
321 Supports for the ULI1575 PCIe south bridge that exists on some
322 Freescale reference boards. The boards all use the ULI in pretty
323 much the same way.
324
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325config CPM
326 bool
80776554 327 select PPC_CLOCK
c374e00e 328
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329config OF_RTC
330 bool
331 help
692105b8 332 Uses information from the OF or flattened device tree to instantiate
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333 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
334
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335source "arch/powerpc/sysdev/bestcomm/Kconfig"
336
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337config SIMPLE_GPIO
338 bool "Support for simple, memory-mapped GPIO controllers"
339 depends on PPC
340 select GENERIC_GPIO
341 select ARCH_REQUIRE_GPIOLIB
342 help
343 Say Y here to support simple, memory-mapped GPIO controllers.
344 These are usually BCSRs used to control board's switches, LEDs,
345 chip-selects, Ethernet/USB PHY's power and various other small
346 on-board peripherals.
347
ea0105ea 348config MCU_MPC8349EMITX
6ca6ca5d 349 bool "MPC8349E-mITX MCU driver"
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350 depends on I2C && PPC_83xx
351 select GENERIC_GPIO
352 select ARCH_REQUIRE_GPIOLIB
353 help
354 Say Y here to enable soft power-off functionality on the Freescale
355 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
356 also register MCU GPIOs with the generic GPIO API, so you'll able
357 to use MCU pins as GPIOs.
358
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359config XILINX_PCI
360 bool "Xilinx PCI host bridge support"
361 depends on PCI && XILINX_VIRTEX
362
4330f5da 363endmenu