projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 7d13d21a KG |
1 | #ifndef __MPC83XX_H__ |
| 2 | #define __MPC83XX_H__ | |
| 3 | ||
| 4 | #include <linux/init.h> | |
| 5 | #include <linux/device.h> | |
| 7d52c7b0 | 6 | #include <asm/pci-bridge.h> |
| 7d13d21a | 7 | |
| c1616982 LY |
8 | /* System Clock Control Register */ |
| 9 | #define MPC83XX_SCCR_OFFS 0xA08 | |
| e5a94af8 | 10 | #define MPC83XX_SCCR_USB_MASK 0x00f00000 |
| c1616982 LY |
11 | #define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000 |
| 12 | #define MPC83XX_SCCR_USB_MPHCM_01 0x00400000 | |
| 13 | #define MPC83XX_SCCR_USB_MPHCM_10 0x00800000 | |
| 14 | #define MPC83XX_SCCR_USB_DRCM_11 0x00300000 | |
| 15 | #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 | |
| 16 | #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 | |
| b74a7e50 KP |
17 | #define MPC8315_SCCR_USB_MASK 0x00c00000 |
| 18 | #define MPC8315_SCCR_USB_DRCM_11 0x00c00000 | |
| 1a9ebc0c | 19 | #define MPC8315_SCCR_USB_DRCM_01 0x00400000 |
| e10241d8 | 20 | #define MPC837X_SCCR_USB_DRCM_11 0x00c00000 |
| c1616982 LY |
21 | |
| 22 | /* system i/o configuration register low */ | |
| 23 | #define MPC83XX_SICRL_OFFS 0x114 | |
| e5a94af8 | 24 | #define MPC834X_SICRL_USB_MASK 0x60000000 |
| b7d66c88 PK |
25 | #define MPC834X_SICRL_USB0 0x20000000 |
| 26 | #define MPC834X_SICRL_USB1 0x40000000 | |
| e5a94af8 LY |
27 | #define MPC831X_SICRL_USB_MASK 0x00000c00 |
| 28 | #define MPC831X_SICRL_USB_ULPI 0x00000800 | |
| c0a20159 AV |
29 | #define MPC8315_SICRL_USB_MASK 0x000000fc |
| 30 | #define MPC8315_SICRL_USB_ULPI 0x00000054 | |
| e10241d8 LY |
31 | #define MPC837X_SICRL_USB_MASK 0xf0000000 |
| 32 | #define MPC837X_SICRL_USB_ULPI 0x50000000 | |
| 89f37296 AV |
33 | #define MPC837X_SICRL_USBB_MASK 0x30000000 |
| 34 | #define MPC837X_SICRL_SD 0x20000000 | |
| c1616982 LY |
35 | |
| 36 | /* system i/o configuration register high */ | |
| 37 | #define MPC83XX_SICRH_OFFS 0x118 | |
| fd066e85 IY |
38 | #define MPC8308_SICRH_USB_MASK 0x000c0000 |
| 39 | #define MPC8308_SICRH_USB_ULPI 0x00040000 | |
| e5a94af8 LY |
40 | #define MPC834X_SICRH_USB_UTMI 0x00020000 |
| 41 | #define MPC831X_SICRH_USB_MASK 0x000000e0 | |
| 42 | #define MPC831X_SICRH_USB_ULPI 0x000000a0 | |
| c0a20159 AV |
43 | #define MPC8315_SICRH_USB_MASK 0x0000ff00 |
| 44 | #define MPC8315_SICRH_USB_ULPI 0x00000000 | |
| 89f37296 AV |
45 | #define MPC837X_SICRH_SPI_MASK 0x00000003 |
| 46 | #define MPC837X_SICRH_SD 0x00000001 | |
| e5a94af8 LY |
47 | |
| 48 | /* USB Control Register */ | |
| 49 | #define FSL_USB2_CONTROL_OFFS 0x500 | |
| 50 | #define CONTROL_UTMI_PHY_EN 0x00000200 | |
| 1a9ebc0c | 51 | #define CONTROL_REFSEL_24MHZ 0x00000040 |
| e5a94af8 LY |
52 | #define CONTROL_REFSEL_48MHZ 0x00000080 |
| 53 | #define CONTROL_PHY_CLK_SEL_ULPI 0x00000400 | |
| 54 | #define CONTROL_OTG_PORT 0x00000020 | |
| 55 | ||
| 56 | /* USB PORTSC Registers */ | |
| 57 | #define FSL_USB2_PORTSC1_OFFS 0x184 | |
| 58 | #define FSL_USB2_PORTSC2_OFFS 0x188 | |
| 59 | #define PORTSCX_PTW_16BIT 0x10000000 | |
| 60 | #define PORTSCX_PTS_UTMI 0x00000000 | |
| 61 | #define PORTSCX_PTS_ULPI 0x80000000 | |
| c1616982 | 62 | |
| 7d13d21a KG |
63 | /* |
| 64 | * Declaration for the various functions exported by the | |
| 65 | * mpc83xx_* files. Mostly for use by mpc83xx_setup | |
| 66 | */ | |
| 67 | ||
| 30f59336 KG |
68 | extern void mpc83xx_restart(char *cmd); |
| 69 | extern long mpc83xx_time_init(void); | |
| 81b36a0b | 70 | extern int mpc837x_usb_cfg(void); |
| e5a94af8 LY |
71 | extern int mpc834x_usb_cfg(void); |
| 72 | extern int mpc831x_usb_cfg(void); | |
| d4fb5ebd DES |
73 | extern void mpc83xx_ipic_init_IRQ(void); |
| 74 | #ifdef CONFIG_QUICC_ENGINE | |
| 75 | extern void mpc83xx_qe_init_IRQ(void); | |
| 76 | extern void mpc83xx_ipic_and_qe_init_IRQ(void); | |
| 77 | #else | |
| 78 | static inline void __init mpc83xx_qe_init_IRQ(void) {} | |
| 79 | #define mpc83xx_ipic_and_qe_init_IRQ mpc83xx_ipic_init_IRQ | |
| 80 | #endif /* CONFIG_QUICC_ENGINE */ | |
| 81 | ||
| bede480d DES |
82 | #ifdef CONFIG_PCI |
| 83 | extern void mpc83xx_setup_pci(void); | |
| 84 | #else | |
| 85 | #define mpc83xx_setup_pci() do {} while (0) | |
| 86 | #endif | |
| 87 | ||
| 7669d58c | 88 | extern int mpc83xx_declare_of_platform_devices(void); |
| 7d13d21a | 89 | |
| e060e084 | 90 | #endif /* __MPC83XX_H__ */ |