[linux-2.6-block.git] / arch / powerpc / mm / pgtable_64.c

/*
 *  This file contains ioremap and related functions for 64-bit machines.
 *
 *  Derived from arch/ppc64/mm/init.c
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
 *    Copyright (C) 1996 Paul Mackerras
 *
 *  Derived from "arch/i386/mm/init.c"
 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
 *
 *  Dave Engebretsen <engebret@us.ibm.com>
 *      Rework for PPC64 port.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/export.h>
#include <linux/types.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/stddef.h>
#include <linux/vmalloc.h>
#include <linux/memblock.h>
#include <linux/slab.h>
#include <linux/hugetlb.h>

#include <asm/pgalloc.h>
#include <asm/page.h>
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/smp.h>
#include <asm/machdep.h>
#include <asm/tlb.h>
#include <asm/trace.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/sections.h>
#include <asm/firmware.h>
#include <asm/dma.h>
#include <asm/powernv.h>

#include "mmu_decl.h"

#ifdef CONFIG_PPC_BOOK3S_64
#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
#error TASK_SIZE_USER64 exceeds user VSID range
#endif
#endif

#ifdef CONFIG_PPC_BOOK3S_64
/*
 * partition table and process table for ISA 3.0
 */
struct prtb_entry *process_tb;
struct patb_entry *partition_tb;
/*
 * page table size
 */
unsigned long __pte_index_size;
EXPORT_SYMBOL(__pte_index_size);
unsigned long __pmd_index_size;
EXPORT_SYMBOL(__pmd_index_size);
unsigned long __pud_index_size;
EXPORT_SYMBOL(__pud_index_size);
unsigned long __pgd_index_size;
EXPORT_SYMBOL(__pgd_index_size);
unsigned long __pmd_cache_index;
EXPORT_SYMBOL(__pmd_cache_index);
unsigned long __pud_cache_index;
EXPORT_SYMBOL(__pud_cache_index);
unsigned long __pte_table_size;
EXPORT_SYMBOL(__pte_table_size);
unsigned long __pmd_table_size;
EXPORT_SYMBOL(__pmd_table_size);
unsigned long __pud_table_size;
EXPORT_SYMBOL(__pud_table_size);
unsigned long __pgd_table_size;
EXPORT_SYMBOL(__pgd_table_size);
unsigned long __pmd_val_bits;
EXPORT_SYMBOL(__pmd_val_bits);
unsigned long __pud_val_bits;
EXPORT_SYMBOL(__pud_val_bits);
unsigned long __pgd_val_bits;
EXPORT_SYMBOL(__pgd_val_bits);
unsigned long __kernel_virt_start;
EXPORT_SYMBOL(__kernel_virt_start);
unsigned long __kernel_virt_size;
EXPORT_SYMBOL(__kernel_virt_size);
unsigned long __vmalloc_start;
EXPORT_SYMBOL(__vmalloc_start);
unsigned long __vmalloc_end;
EXPORT_SYMBOL(__vmalloc_end);
unsigned long __kernel_io_start;
EXPORT_SYMBOL(__kernel_io_start);
struct page *vmemmap;
EXPORT_SYMBOL(vmemmap);
unsigned long __pte_frag_nr;
EXPORT_SYMBOL(__pte_frag_nr);
unsigned long __pte_frag_size_shift;
EXPORT_SYMBOL(__pte_frag_size_shift);
unsigned long ioremap_bot;
#else /* !CONFIG_PPC_BOOK3S_64 */
unsigned long ioremap_bot = IOREMAP_BASE;
#endif

/**
 * __ioremap_at - Low level function to establish the page tables
 *                for an IO mapping
 */
void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
			    unsigned long flags)
{
	unsigned long i;

	/* Make sure we have the base flags */
	if ((flags & _PAGE_PRESENT) == 0)
		flags |= pgprot_val(PAGE_KERNEL);

	/* We don't support the 4K PFN hack with ioremap */
	if (flags & H_PAGE_4K_PFN)
		return NULL;

	WARN_ON(pa & ~PAGE_MASK);
	WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
	WARN_ON(size & ~PAGE_MASK);

	for (i = 0; i < size; i += PAGE_SIZE)
		if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
			return NULL;

	return (void __iomem *)ea;
}

/**
 * __iounmap_from - Low level function to tear down the page tables
 *                  for an IO mapping. This is used for mappings that
 *                  are manipulated manually, like partial unmapping of
 *                  PCI IOs or ISA space.
 */
void __iounmap_at(void *ea, unsigned long size)
{
	WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
	WARN_ON(size & ~PAGE_MASK);

	unmap_kernel_range((unsigned long)ea, size);
}

void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
				unsigned long flags, void *caller)
{
	phys_addr_t paligned;
	void __iomem *ret;

	/*
	 * Choose an address to map it to.
	 * Once the imalloc system is running, we use it.
	 * Before that, we map using addresses going
	 * up from ioremap_bot.  imalloc will use
	 * the addresses from ioremap_bot through
	 * IMALLOC_END
	 * 
	 */
	paligned = addr & PAGE_MASK;
	size = PAGE_ALIGN(addr + size) - paligned;

	if ((size == 0) || (paligned == 0))
		return NULL;

	if (slab_is_available()) {
		struct vm_struct *area;

		area = __get_vm_area_caller(size, VM_IOREMAP,
					    ioremap_bot, IOREMAP_END,
					    caller);
		if (area == NULL)
			return NULL;

		area->phys_addr = paligned;
		ret = __ioremap_at(paligned, area->addr, size, flags);
		if (!ret)
			vunmap(area->addr);
	} else {
		ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
		if (ret)
			ioremap_bot += size;
	}

	if (ret)
		ret += addr & ~PAGE_MASK;
	return ret;
}

void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
			 unsigned long flags)
{
	return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
}

void __iomem * ioremap(phys_addr_t addr, unsigned long size)
{
	unsigned long flags = pgprot_val(pgprot_noncached(__pgprot(0)));
	void *caller = __builtin_return_address(0);

	if (ppc_md.ioremap)
		return ppc_md.ioremap(addr, size, flags, caller);
	return __ioremap_caller(addr, size, flags, caller);
}

void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
{
	unsigned long flags = pgprot_val(pgprot_noncached_wc(__pgprot(0)));
	void *caller = __builtin_return_address(0);

	if (ppc_md.ioremap)
		return ppc_md.ioremap(addr, size, flags, caller);
	return __ioremap_caller(addr, size, flags, caller);
}

void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
			     unsigned long flags)
{
	void *caller = __builtin_return_address(0);

	/* writeable implies dirty for kernel addresses */
	if (flags & _PAGE_WRITE)
		flags |= _PAGE_DIRTY;

	/* we don't want to let _PAGE_EXEC leak out */
	flags &= ~_PAGE_EXEC;
	/*
	 * Force kernel mapping.
	 */
	flags &= ~_PAGE_USER;
	flags |= _PAGE_PRIVILEGED;

	if (ppc_md.ioremap)
		return ppc_md.ioremap(addr, size, flags, caller);
	return __ioremap_caller(addr, size, flags, caller);
}


/*  
 * Unmap an IO region and remove it from imalloc'd list.
 * Access to IO memory should be serialized by driver.
 */
void __iounmap(volatile void __iomem *token)
{
	void *addr;

	if (!slab_is_available())
		return;
	
	addr = (void *) ((unsigned long __force)
			 PCI_FIX_ADDR(token) & PAGE_MASK);
	if ((unsigned long)addr < ioremap_bot) {
		printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
		       " at 0x%p\n", addr);
		return;
	}
	vunmap(addr);
}

void iounmap(volatile void __iomem *token)
{
	if (ppc_md.iounmap)
		ppc_md.iounmap(token);
	else
		__iounmap(token);
}

EXPORT_SYMBOL(ioremap);
EXPORT_SYMBOL(ioremap_wc);
EXPORT_SYMBOL(ioremap_prot);
EXPORT_SYMBOL(__ioremap);
EXPORT_SYMBOL(__ioremap_at);
EXPORT_SYMBOL(iounmap);
EXPORT_SYMBOL(__iounmap);
EXPORT_SYMBOL(__iounmap_at);

#ifndef __PAGETABLE_PUD_FOLDED
/* 4 level page table */
struct page *pgd_page(pgd_t pgd)
{
	if (pgd_huge(pgd))
		return pte_page(pgd_pte(pgd));
	return virt_to_page(pgd_page_vaddr(pgd));
}
#endif

struct page *pud_page(pud_t pud)
{
	if (pud_huge(pud))
		return pte_page(pud_pte(pud));
	return virt_to_page(pud_page_vaddr(pud));
}

/*
 * For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
 * For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
 */
struct page *pmd_page(pmd_t pmd)
{
	if (pmd_trans_huge(pmd) || pmd_huge(pmd) || pmd_devmap(pmd))
		return pte_page(pmd_pte(pmd));
	return virt_to_page(pmd_page_vaddr(pmd));
}

#ifdef CONFIG_PPC_64K_PAGES
static pte_t *get_from_cache(struct mm_struct *mm)
{
	void *pte_frag, *ret;

	spin_lock(&mm->page_table_lock);
	ret = mm->context.pte_frag;
	if (ret) {
		pte_frag = ret + PTE_FRAG_SIZE;
		/*
		 * If we have taken up all the fragments mark PTE page NULL
		 */
		if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
			pte_frag = NULL;
		mm->context.pte_frag = pte_frag;
	}
	spin_unlock(&mm->page_table_lock);
	return (pte_t *)ret;
}

static pte_t *__alloc_for_cache(struct mm_struct *mm, int kernel)
{
	void *ret = NULL;
	struct page *page;

	if (!kernel) {
		page = alloc_page(PGALLOC_GFP | __GFP_ACCOUNT);
		if (!page)
			return NULL;
		if (!pgtable_page_ctor(page)) {
			__free_page(page);
			return NULL;
		}
	} else {
		page = alloc_page(PGALLOC_GFP);
		if (!page)
			return NULL;
	}

	ret = page_address(page);
	spin_lock(&mm->page_table_lock);
	/*
	 * If we find pgtable_page set, we return
	 * the allocated page with single fragement
	 * count.
	 */
	if (likely(!mm->context.pte_frag)) {
		set_page_count(page, PTE_FRAG_NR);
		mm->context.pte_frag = ret + PTE_FRAG_SIZE;
	}
	spin_unlock(&mm->page_table_lock);

	return (pte_t *)ret;
}

pte_t *pte_fragment_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
{
	pte_t *pte;

	pte = get_from_cache(mm);
	if (pte)
		return pte;

	return __alloc_for_cache(mm, kernel);
}
#endif /* CONFIG_PPC_64K_PAGES */

void pte_fragment_free(unsigned long *table, int kernel)
{
	struct page *page = virt_to_page(table);
	if (put_page_testzero(page)) {
		if (!kernel)
			pgtable_page_dtor(page);
		free_unref_page(page);
	}
}

#ifdef CONFIG_SMP
void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
{
	unsigned long pgf = (unsigned long)table;

	BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
	pgf |= shift;
	tlb_remove_table(tlb, (void *)pgf);
}

void __tlb_remove_table(void *_table)
{
	void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
	unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;

	if (!shift)
		/* PTE page needs special handling */
		pte_fragment_free(table, 0);
	else {
		BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
		kmem_cache_free(PGT_CACHE(shift), table);
	}
}
#else
void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
{
	if (!shift) {
		/* PTE page needs special handling */
		pte_fragment_free(table, 0);
	} else {
		BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
		kmem_cache_free(PGT_CACHE(shift), table);
	}
}
#endif

#ifdef CONFIG_PPC_BOOK3S_64
void __init mmu_partition_table_init(void)
{
	unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;
	unsigned long ptcr;

	BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 36), "Partition table size too large.");
	partition_tb = __va(memblock_alloc_base(patb_size, patb_size,
						MEMBLOCK_ALLOC_ANYWHERE));

	/* Initialize the Partition Table with no entries */
	memset((void *)partition_tb, 0, patb_size);

	/*
	 * update partition table control register,
	 * 64 K size.
	 */
	ptcr = __pa(partition_tb) | (PATB_SIZE_SHIFT - 12);
	mtspr(SPRN_PTCR, ptcr);
	powernv_set_nmmu_ptcr(ptcr);
}

void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
				   unsigned long dw1)
{
	unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);

	partition_tb[lpid].patb0 = cpu_to_be64(dw0);
	partition_tb[lpid].patb1 = cpu_to_be64(dw1);

	/*
	 * Global flush of TLBs and partition table caches for this lpid.
	 * The type of flush (hash or radix) depends on what the previous
	 * use of this partition ID was, not the new use.
	 */
	asm volatile("ptesync" : : : "memory");
	if (old & PATB_HR) {
		asm volatile(PPC_TLBIE_5(%0,%1,2,0,1) : :
			     "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
		asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
			     "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
		trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 1);
	} else {
		asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
			     "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
		trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 0);
	}
	asm volatile("eieio; tlbsync; ptesync" : : : "memory");
}
EXPORT_SYMBOL_GPL(mmu_partition_table_set_entry);
#endif /* CONFIG_PPC_BOOK3S_64 */

#ifdef CONFIG_STRICT_KERNEL_RWX
void mark_rodata_ro(void)
{
	if (!mmu_has_feature(MMU_FTR_KERNEL_RO)) {
		pr_warn("Warning: Unable to mark rodata read only on this CPU.\n");
		return;
	}

	if (radix_enabled())
		radix__mark_rodata_ro();
	else
		hash__mark_rodata_ro();
}

void mark_initmem_nx(void)
{
	if (radix_enabled())
		radix__mark_initmem_nx();
	else
		hash__mark_initmem_nx();
}
#endif
Commit	Line	Data
14cf11af PM	1	/*
	2	* This file contains ioremap and related functions for 64-bit machines.
	3	*
	4	* Derived from arch/ppc64/mm/init.c
	5	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	6	*
	7	* Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
	8	* and Cort Dougan (PReP) (cort@cs.nmt.edu)
	9	* Copyright (C) 1996 Paul Mackerras
14cf11af PM	10	*
	11	* Derived from "arch/i386/mm/init.c"
	12	* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
	13	*
	14	* Dave Engebretsen <engebret@us.ibm.com>
	15	* Rework for PPC64 port.
	16	*
	17	* This program is free software; you can redistribute it and/or
	18	* modify it under the terms of the GNU General Public License
	19	* as published by the Free Software Foundation; either version
	20	* 2 of the License, or (at your option) any later version.
	21	*
	22	*/
	23
14cf11af PM	24	#include <linux/signal.h>
	25	#include <linux/sched.h>
	26	#include <linux/kernel.h>
	27	#include <linux/errno.h>
	28	#include <linux/string.h>
66b15db6	29	#include <linux/export.h>
14cf11af PM	30	#include <linux/types.h>
	31	#include <linux/mman.h>
	32	#include <linux/mm.h>
	33	#include <linux/swap.h>
	34	#include <linux/stddef.h>
	35	#include <linux/vmalloc.h>
95f72d1e	36	#include <linux/memblock.h>
5a0e3ad6	37	#include <linux/slab.h>
06743521	38	#include <linux/hugetlb.h>
14cf11af PM	39
	40	#include <asm/pgalloc.h>
	41	#include <asm/page.h>
	42	#include <asm/prom.h>
14cf11af PM	43	#include <asm/io.h>
	44	#include <asm/mmu_context.h>
	45	#include <asm/pgtable.h>
	46	#include <asm/mmu.h>
14cf11af PM	47	#include <asm/smp.h>
	48	#include <asm/machdep.h>
	49	#include <asm/tlb.h>
0428491c	50	#include <asm/trace.h>
14cf11af	51	#include <asm/processor.h>
14cf11af	52	#include <asm/cputable.h>
14cf11af	53	#include <asm/sections.h>
5e203d68	54	#include <asm/firmware.h>
68cf0d64	55	#include <asm/dma.h>
1d0761d2	56	#include <asm/powernv.h>
800fc3ee DG	57
800fc3ee DG	58	#include "mmu_decl.h"
14cf11af	59
4e003747	60	#ifdef CONFIG_PPC_BOOK3S_64
af81d787	61	#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
78f1dbde AK	62	#error TASK_SIZE_USER64 exceeds user VSID range
	63	#endif
	64	#endif
14cf11af	65
50de596d AK	66	#ifdef CONFIG_PPC_BOOK3S_64
	67	/*
	68	* partition table and process table for ISA 3.0
	69	*/
	70	struct prtb_entry *process_tb;
	71	struct patb_entry *partition_tb;
dd1842a2 AK	72	/*
	73	* page table size
	74	*/
	75	unsigned long __pte_index_size;
	76	EXPORT_SYMBOL(__pte_index_size);
	77	unsigned long __pmd_index_size;
	78	EXPORT_SYMBOL(__pmd_index_size);
	79	unsigned long __pud_index_size;
	80	EXPORT_SYMBOL(__pud_index_size);
	81	unsigned long __pgd_index_size;
	82	EXPORT_SYMBOL(__pgd_index_size);
	83	unsigned long __pmd_cache_index;
	84	EXPORT_SYMBOL(__pmd_cache_index);
fae22116 AK	85	unsigned long __pud_cache_index;
fae22116 AK	86	EXPORT_SYMBOL(__pud_cache_index);
dd1842a2 AK	87	unsigned long __pte_table_size;
	88	EXPORT_SYMBOL(__pte_table_size);
	89	unsigned long __pmd_table_size;
	90	EXPORT_SYMBOL(__pmd_table_size);
	91	unsigned long __pud_table_size;
	92	EXPORT_SYMBOL(__pud_table_size);
	93	unsigned long __pgd_table_size;
	94	EXPORT_SYMBOL(__pgd_table_size);
a2f41eb9 AK	95	unsigned long __pmd_val_bits;
	96	EXPORT_SYMBOL(__pmd_val_bits);
	97	unsigned long __pud_val_bits;
	98	EXPORT_SYMBOL(__pud_val_bits);
	99	unsigned long __pgd_val_bits;
	100	EXPORT_SYMBOL(__pgd_val_bits);
d6a9996e AK	101	unsigned long __kernel_virt_start;
	102	EXPORT_SYMBOL(__kernel_virt_start);
	103	unsigned long __kernel_virt_size;
	104	EXPORT_SYMBOL(__kernel_virt_size);
	105	unsigned long __vmalloc_start;
	106	EXPORT_SYMBOL(__vmalloc_start);
	107	unsigned long __vmalloc_end;
	108	EXPORT_SYMBOL(__vmalloc_end);
63ee9b2f ME	109	unsigned long __kernel_io_start;
63ee9b2f ME	110	EXPORT_SYMBOL(__kernel_io_start);
d6a9996e AK	111	struct page *vmemmap;
d6a9996e AK	112	EXPORT_SYMBOL(vmemmap);
5ed7ecd0 AK	113	unsigned long __pte_frag_nr;
	114	EXPORT_SYMBOL(__pte_frag_nr);
	115	unsigned long __pte_frag_size_shift;
	116	EXPORT_SYMBOL(__pte_frag_size_shift);
d6a9996e AK	117	unsigned long ioremap_bot;
d6a9996e AK	118	#else /* !CONFIG_PPC_BOOK3S_64 */
78f1dbde	119	unsigned long ioremap_bot = IOREMAP_BASE;
d6a9996e	120	#endif
a245067e	121
3d5134ee BH	122	/**
	123	* __ioremap_at - Low level function to establish the page tables
	124	* for an IO mapping
	125	*/
	126	void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
14cf11af PM	127	unsigned long flags)
	128	{
	129	unsigned long i;
	130
a1f242ff	131	/* Make sure we have the base flags */
14cf11af PM	132	if ((flags & _PAGE_PRESENT) == 0)
	133	flags \|= pgprot_val(PAGE_KERNEL);
	134
a1f242ff	135	/* We don't support the 4K PFN hack with ioremap */
945537df	136	if (flags & H_PAGE_4K_PFN)
a1f242ff BH	137	return NULL;
a1f242ff BH	138
3d5134ee BH	139	WARN_ON(pa & ~PAGE_MASK);
	140	WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
	141	WARN_ON(size & ~PAGE_MASK);
	142
14cf11af	143	for (i = 0; i < size; i += PAGE_SIZE)
a245067e	144	if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
14cf11af PM	145	return NULL;
14cf11af PM	146
3d5134ee BH	147	return (void __iomem *)ea;
	148	}
	149
	150	/**
	151	* __iounmap_from - Low level function to tear down the page tables
	152	* for an IO mapping. This is used for mappings that
	153	* are manipulated manually, like partial unmapping of
	154	* PCI IOs or ISA space.
	155	*/
	156	void __iounmap_at(void *ea, unsigned long size)
	157	{
	158	WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
	159	WARN_ON(size & ~PAGE_MASK);
	160
	161	unmap_kernel_range((unsigned long)ea, size);
14cf11af PM	162	}
14cf11af PM	163
1cdab55d BH	164	void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
1cdab55d BH	165	unsigned long flags, void *caller)
14cf11af	166	{
3d5134ee	167	phys_addr_t paligned;
14cf11af PM	168	void __iomem *ret;
	169
	170	/*
	171	* Choose an address to map it to.
	172	* Once the imalloc system is running, we use it.
	173	* Before that, we map using addresses going
	174	* up from ioremap_bot. imalloc will use
	175	* the addresses from ioremap_bot through
	176	* IMALLOC_END
	177	*
	178	*/
3d5134ee BH	179	paligned = addr & PAGE_MASK;
3d5134ee BH	180	size = PAGE_ALIGN(addr + size) - paligned;
14cf11af	181
3d5134ee	182	if ((size == 0) \|\| (paligned == 0))
14cf11af PM	183	return NULL;
14cf11af PM	184
f691fa10	185	if (slab_is_available()) {
14cf11af	186	struct vm_struct *area;
3d5134ee	187
1cdab55d BH	188	area = __get_vm_area_caller(size, VM_IOREMAP,
	189	ioremap_bot, IOREMAP_END,
	190	caller);
14cf11af PM	191	if (area == NULL)
14cf11af PM	192	return NULL;
7a9d1256 ME	193
7a9d1256 ME	194	area->phys_addr = paligned;
3d5134ee	195	ret = __ioremap_at(paligned, area->addr, size, flags);
14cf11af	196	if (!ret)
3d5134ee	197	vunmap(area->addr);
14cf11af	198	} else {
3d5134ee	199	ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
14cf11af PM	200	if (ret)
	201	ioremap_bot += size;
	202	}
3d5134ee BH	203
	204	if (ret)
	205	ret += addr & ~PAGE_MASK;
14cf11af PM	206	return ret;
	207	}
	208
1cdab55d BH	209	void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
	210	unsigned long flags)
	211	{
	212	return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
	213	}
4cb3cee0	214
68a64357	215	void __iomem * ioremap(phys_addr_t addr, unsigned long size)
4cb3cee0	216	{
72176dd0	217	unsigned long flags = pgprot_val(pgprot_noncached(__pgprot(0)));
1cdab55d	218	void *caller = __builtin_return_address(0);
4cb3cee0 BH	219
4cb3cee0 BH	220	if (ppc_md.ioremap)
1cdab55d BH	221	return ppc_md.ioremap(addr, size, flags, caller);
1cdab55d BH	222	return __ioremap_caller(addr, size, flags, caller);
4cb3cee0 BH	223	}
4cb3cee0 BH	224
be135f40 AB	225	void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
be135f40 AB	226	{
72176dd0	227	unsigned long flags = pgprot_val(pgprot_noncached_wc(__pgprot(0)));
be135f40 AB	228	void *caller = __builtin_return_address(0);
	229
	230	if (ppc_md.ioremap)
	231	return ppc_md.ioremap(addr, size, flags, caller);
	232	return __ioremap_caller(addr, size, flags, caller);
	233	}
	234
40f1ce7f	235	void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
4cb3cee0 BH	236	unsigned long flags)
4cb3cee0 BH	237	{
1cdab55d BH	238	void *caller = __builtin_return_address(0);
1cdab55d BH	239
a1f242ff	240	/* writeable implies dirty for kernel addresses */
c7d54842	241	if (flags & _PAGE_WRITE)
a1f242ff BH	242	flags \|= _PAGE_DIRTY;
a1f242ff BH	243
ac29c640 AK	244	/* we don't want to let _PAGE_EXEC leak out */
	245	flags &= ~_PAGE_EXEC;
	246	/*
	247	* Force kernel mapping.
	248	*/
ac29c640	249	flags &= ~_PAGE_USER;
812fadcb	250	flags \|= _PAGE_PRIVILEGED;
55052eec	251
4cb3cee0	252	if (ppc_md.ioremap)
1cdab55d BH	253	return ppc_md.ioremap(addr, size, flags, caller);
1cdab55d BH	254	return __ioremap_caller(addr, size, flags, caller);
4cb3cee0 BH	255	}
	256
	257
14cf11af PM	258	/*
	259	* Unmap an IO region and remove it from imalloc'd list.
	260	* Access to IO memory should be serialized by driver.
14cf11af	261	*/
68a64357	262	void __iounmap(volatile void __iomem *token)
14cf11af PM	263	{
	264	void *addr;
	265
f691fa10	266	if (!slab_is_available())
14cf11af PM	267	return;
14cf11af PM	268
3d5134ee BH	269	addr = (void *) ((unsigned long __force)
	270	PCI_FIX_ADDR(token) & PAGE_MASK);
	271	if ((unsigned long)addr < ioremap_bot) {
	272	printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
	273	" at 0x%p\n", addr);
	274	return;
	275	}
	276	vunmap(addr);
14cf11af PM	277	}
14cf11af PM	278
68a64357	279	void iounmap(volatile void __iomem *token)
4cb3cee0 BH	280	{
	281	if (ppc_md.iounmap)
	282	ppc_md.iounmap(token);
	283	else
	284	__iounmap(token);
	285	}
	286
14cf11af	287	EXPORT_SYMBOL(ioremap);
be135f40	288	EXPORT_SYMBOL(ioremap_wc);
40f1ce7f	289	EXPORT_SYMBOL(ioremap_prot);
14cf11af	290	EXPORT_SYMBOL(__ioremap);
a302cb9d	291	EXPORT_SYMBOL(__ioremap_at);
14cf11af	292	EXPORT_SYMBOL(iounmap);
4cb3cee0	293	EXPORT_SYMBOL(__iounmap);
a302cb9d	294	EXPORT_SYMBOL(__iounmap_at);
5c1f6ee9	295
06743521 AK	296	#ifndef __PAGETABLE_PUD_FOLDED
	297	/* 4 level page table */
	298	struct page *pgd_page(pgd_t pgd)
	299	{
	300	if (pgd_huge(pgd))
	301	return pte_page(pgd_pte(pgd));
	302	return virt_to_page(pgd_page_vaddr(pgd));
	303	}
	304	#endif
	305
	306	struct page *pud_page(pud_t pud)
	307	{
	308	if (pud_huge(pud))
	309	return pte_page(pud_pte(pud));
	310	return virt_to_page(pud_page_vaddr(pud));
	311	}
	312
074c2eae AK	313	/*
	314	* For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
	315	* For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
	316	*/
	317	struct page *pmd_page(pmd_t pmd)
	318	{
ebd31197	319	if (pmd_trans_huge(pmd) \|\| pmd_huge(pmd) \|\| pmd_devmap(pmd))
e34aa03c	320	return pte_page(pmd_pte(pmd));
074c2eae AK	321	return virt_to_page(pmd_page_vaddr(pmd));
	322	}
	323
5c1f6ee9 AK	324	#ifdef CONFIG_PPC_64K_PAGES
	325	static pte_t get_from_cache(struct mm_struct mm)
	326	{
	327	void pte_frag, ret;
	328
	329	spin_lock(&mm->page_table_lock);
	330	ret = mm->context.pte_frag;
	331	if (ret) {
	332	pte_frag = ret + PTE_FRAG_SIZE;
	333	/*
	334	* If we have taken up all the fragments mark PTE page NULL
	335	*/
	336	if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
	337	pte_frag = NULL;
	338	mm->context.pte_frag = pte_frag;
	339	}
	340	spin_unlock(&mm->page_table_lock);
	341	return (pte_t *)ret;
	342	}
	343
	344	static pte_t __alloc_for_cache(struct mm_struct mm, int kernel)
	345	{
	346	void *ret = NULL;
de3b8761 BS	347	struct page *page;
	348
	349	if (!kernel) {
	350	page = alloc_page(PGALLOC_GFP \| __GFP_ACCOUNT);
	351	if (!page)
	352	return NULL;
	353	if (!pgtable_page_ctor(page)) {
	354	__free_page(page);
	355	return NULL;
	356	}
	357	} else {
	358	page = alloc_page(PGALLOC_GFP);
	359	if (!page)
	360	return NULL;
4f804943	361	}
5c1f6ee9 AK	362
	363	ret = page_address(page);
	364	spin_lock(&mm->page_table_lock);
	365	/*
	366	* If we find pgtable_page set, we return
	367	* the allocated page with single fragement
	368	* count.
	369	*/
	370	if (likely(!mm->context.pte_frag)) {
fe896d18	371	set_page_count(page, PTE_FRAG_NR);
5c1f6ee9 AK	372	mm->context.pte_frag = ret + PTE_FRAG_SIZE;
	373	}
	374	spin_unlock(&mm->page_table_lock);
	375
5c1f6ee9 AK	376	return (pte_t *)ret;
	377	}
	378
74701d59	379	pte_t pte_fragment_alloc(struct mm_struct mm, unsigned long vmaddr, int kernel)
5c1f6ee9 AK	380	{
	381	pte_t *pte;
	382
	383	pte = get_from_cache(mm);
	384	if (pte)
	385	return pte;
	386
	387	return __alloc_for_cache(mm, kernel);
	388	}
934828ed	389	#endif /* CONFIG_PPC_64K_PAGES */
5c1f6ee9	390
74701d59	391	void pte_fragment_free(unsigned long *table, int kernel)
5c1f6ee9 AK	392	{
	393	struct page *page = virt_to_page(table);
	394	if (put_page_testzero(page)) {
	395	if (!kernel)
	396	pgtable_page_dtor(page);
2d4894b5	397	free_unref_page(page);
5c1f6ee9 AK	398	}
	399	}
	400
	401	#ifdef CONFIG_SMP
5c1f6ee9 AK	402	void pgtable_free_tlb(struct mmu_gather tlb, void table, int shift)
	403	{
	404	unsigned long pgf = (unsigned long)table;
	405
	406	BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
	407	pgf \|= shift;
	408	tlb_remove_table(tlb, (void *)pgf);
	409	}
	410
	411	void __tlb_remove_table(void *_table)
	412	{
	413	void table = (void )((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
	414	unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
	415
	416	if (!shift)
	417	/* PTE page needs special handling */
74701d59	418	pte_fragment_free(table, 0);
5c1f6ee9 AK	419	else {
	420	BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
	421	kmem_cache_free(PGT_CACHE(shift), table);
	422	}
	423	}
	424	#else
	425	void pgtable_free_tlb(struct mmu_gather tlb, void table, int shift)
	426	{
	427	if (!shift) {
	428	/* PTE page needs special handling */
74701d59	429	pte_fragment_free(table, 0);
5c1f6ee9 AK	430	} else {
	431	BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
	432	kmem_cache_free(PGT_CACHE(shift), table);
	433	}
	434	}
	435	#endif
9d661958 PM	436
	437	#ifdef CONFIG_PPC_BOOK3S_64
	438	void __init mmu_partition_table_init(void)
	439	{
	440	unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;
1d0761d2	441	unsigned long ptcr;
9d661958 PM	442
	443	BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 36), "Partition table size too large.");
	444	partition_tb = __va(memblock_alloc_base(patb_size, patb_size,
	445	MEMBLOCK_ALLOC_ANYWHERE));
	446
	447	/* Initialize the Partition Table with no entries */
	448	memset((void *)partition_tb, 0, patb_size);
	449
	450	/*
	451	* update partition table control register,
	452	* 64 K size.
	453	*/
1d0761d2 AP	454	ptcr = __pa(partition_tb) \| (PATB_SIZE_SHIFT - 12);
	455	mtspr(SPRN_PTCR, ptcr);
	456	powernv_set_nmmu_ptcr(ptcr);
9d661958 PM	457	}
	458
	459	void mmu_partition_table_set_entry(unsigned int lpid, unsigned long dw0,
	460	unsigned long dw1)
	461	{
16ed1416 PM	462	unsigned long old = be64_to_cpu(partition_tb[lpid].patb0);
16ed1416 PM	463
9d661958 PM	464	partition_tb[lpid].patb0 = cpu_to_be64(dw0);
	465	partition_tb[lpid].patb1 = cpu_to_be64(dw1);
	466
16ed1416 PM	467	/*
	468	* Global flush of TLBs and partition table caches for this lpid.
	469	* The type of flush (hash or radix) depends on what the previous
	470	* use of this partition ID was, not the new use.
	471	*/
9d661958	472	asm volatile("ptesync" : : : "memory");
0428491c	473	if (old & PATB_HR) {
16ed1416 PM	474	asm volatile(PPC_TLBIE_5(%0,%1,2,0,1) : :
16ed1416 PM	475	"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
62e984dd AK	476	asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
62e984dd AK	477	"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
0428491c BS	478	trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 1);
0428491c BS	479	} else {
16ed1416 PM	480	asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : :
16ed1416 PM	481	"r" (TLBIEL_INVAL_SET_LPID), "r" (lpid));
0428491c BS	482	trace_tlbie(lpid, 0, TLBIEL_INVAL_SET_LPID, lpid, 2, 0, 0);
0428491c BS	483	}
9d661958 PM	484	asm volatile("eieio; tlbsync; ptesync" : : : "memory");
	485	}
	486	EXPORT_SYMBOL_GPL(mmu_partition_table_set_entry);
	487	#endif /* CONFIG_PPC_BOOK3S_64 */
cd65d697 BS	488
	489	#ifdef CONFIG_STRICT_KERNEL_RWX
	490	void mark_rodata_ro(void)
	491	{
	492	if (!mmu_has_feature(MMU_FTR_KERNEL_RO)) {
	493	pr_warn("Warning: Unable to mark rodata read only on this CPU.\n");
	494	return;
	495	}
	496
7614ff32 BS	497	if (radix_enabled())
	498	radix__mark_rodata_ro();
	499	else
cd65d697 BS	500	hash__mark_rodata_ro();
cd65d697 BS	501	}
029d9252 ME	502
	503	void mark_initmem_nx(void)
	504	{
	505	if (radix_enabled())
	506	radix__mark_initmem_nx();
	507	else
	508	hash__mark_initmem_nx();
	509	}
cd65d697	510	#endif