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eee24b5a AK |
1 | /* |
2 | * Copyright 2005, Paul Mackerras, IBM Corporation. | |
3 | * Copyright 2009, Benjamin Herrenschmidt, IBM Corporation. | |
4 | * Copyright 2015-2016, Aneesh Kumar K.V, IBM Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/sched.h> | |
589ee628 IM |
13 | #include <linux/mm_types.h> |
14 | ||
eee24b5a AK |
15 | #include <asm/pgalloc.h> |
16 | #include <asm/tlb.h> | |
17 | ||
18 | #include "mmu_decl.h" | |
19 | ||
6a1ea362 AK |
20 | #define CREATE_TRACE_POINTS |
21 | #include <trace/events/thp.h> | |
22 | ||
eee24b5a | 23 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
b0f36c10 AK |
24 | /* |
25 | * vmemmap is the starting address of the virtual address space where | |
26 | * struct pages are allocated for all possible PFNs present on the system | |
27 | * including holes and bad memory (hence sparse). These virtual struct | |
28 | * pages are stored in sequence in this virtual address space irrespective | |
29 | * of the fact whether the corresponding PFN is valid or not. This achieves | |
30 | * constant relationship between address of struct page and its PFN. | |
31 | * | |
32 | * During boot or memory hotplug operation when a new memory section is | |
33 | * added, physical memory allocation (including hash table bolting) will | |
34 | * be performed for the set of struct pages which are part of the memory | |
35 | * section. This saves memory by not allocating struct pages for PFNs | |
36 | * which are not valid. | |
37 | * | |
38 | * ---------------------------------------------- | |
39 | * | PHYSICAL ALLOCATION OF VIRTUAL STRUCT PAGES| | |
40 | * ---------------------------------------------- | |
41 | * | |
42 | * f000000000000000 c000000000000000 | |
43 | * vmemmap +--------------+ +--------------+ | |
44 | * + | page struct | +--------------> | page struct | | |
45 | * | +--------------+ +--------------+ | |
46 | * | | page struct | +--------------> | page struct | | |
47 | * | +--------------+ | +--------------+ | |
48 | * | | page struct | + +------> | page struct | | |
49 | * | +--------------+ | +--------------+ | |
50 | * | | page struct | | +--> | page struct | | |
51 | * | +--------------+ | | +--------------+ | |
52 | * | | page struct | | | | |
53 | * | +--------------+ | | | |
54 | * | | page struct | | | | |
55 | * | +--------------+ | | | |
56 | * | | page struct | | | | |
57 | * | +--------------+ | | | |
58 | * | | page struct | | | | |
59 | * | +--------------+ | | | |
60 | * | | page struct | +-------+ | | |
61 | * | +--------------+ | | |
62 | * | | page struct | +-----------+ | |
63 | * | +--------------+ | |
64 | * | | page struct | No mapping | |
65 | * | +--------------+ | |
66 | * | | page struct | No mapping | |
67 | * v +--------------+ | |
68 | * | |
69 | * ----------------------------------------- | |
70 | * | RELATION BETWEEN STRUCT PAGES AND PFNS| | |
71 | * ----------------------------------------- | |
72 | * | |
73 | * vmemmap +--------------+ +---------------+ | |
74 | * + | page struct | +-------------> | PFN | | |
75 | * | +--------------+ +---------------+ | |
76 | * | | page struct | +-------------> | PFN | | |
77 | * | +--------------+ +---------------+ | |
78 | * | | page struct | +-------------> | PFN | | |
79 | * | +--------------+ +---------------+ | |
80 | * | | page struct | +-------------> | PFN | | |
81 | * | +--------------+ +---------------+ | |
82 | * | | | | |
83 | * | +--------------+ | |
84 | * | | | | |
85 | * | +--------------+ | |
86 | * | | | | |
87 | * | +--------------+ +---------------+ | |
88 | * | | page struct | +-------------> | PFN | | |
89 | * | +--------------+ +---------------+ | |
90 | * | | | | |
91 | * | +--------------+ | |
92 | * | | | | |
93 | * | +--------------+ +---------------+ | |
94 | * | | page struct | +-------------> | PFN | | |
95 | * | +--------------+ +---------------+ | |
96 | * | | page struct | +-------------> | PFN | | |
97 | * v +--------------+ +---------------+ | |
98 | */ | |
eee24b5a AK |
99 | /* |
100 | * On hash-based CPUs, the vmemmap is bolted in the hash table. | |
101 | * | |
102 | */ | |
31a14fae AK |
103 | int __meminit hash__vmemmap_create_mapping(unsigned long start, |
104 | unsigned long page_size, | |
105 | unsigned long phys) | |
eee24b5a AK |
106 | { |
107 | int rc = htab_bolt_mapping(start, start + page_size, phys, | |
108 | pgprot_val(PAGE_KERNEL), | |
109 | mmu_vmemmap_psize, mmu_kernel_ssize); | |
110 | if (rc < 0) { | |
111 | int rc2 = htab_remove_mapping(start, start + page_size, | |
112 | mmu_vmemmap_psize, | |
113 | mmu_kernel_ssize); | |
114 | BUG_ON(rc2 && (rc2 != -ENOENT)); | |
115 | } | |
116 | return rc; | |
117 | } | |
118 | ||
119 | #ifdef CONFIG_MEMORY_HOTPLUG | |
31a14fae AK |
120 | void hash__vmemmap_remove_mapping(unsigned long start, |
121 | unsigned long page_size) | |
eee24b5a AK |
122 | { |
123 | int rc = htab_remove_mapping(start, start + page_size, | |
124 | mmu_vmemmap_psize, | |
125 | mmu_kernel_ssize); | |
126 | BUG_ON((rc < 0) && (rc != -ENOENT)); | |
127 | WARN_ON(rc == -ENOENT); | |
128 | } | |
129 | #endif | |
130 | #endif /* CONFIG_SPARSEMEM_VMEMMAP */ | |
131 | ||
132 | /* | |
133 | * map_kernel_page currently only called by __ioremap | |
134 | * map_kernel_page adds an entry to the ioremap page table | |
135 | * and adds an entry to the HPT, possibly bolting it | |
136 | */ | |
31a14fae | 137 | int hash__map_kernel_page(unsigned long ea, unsigned long pa, unsigned long flags) |
eee24b5a AK |
138 | { |
139 | pgd_t *pgdp; | |
140 | pud_t *pudp; | |
141 | pmd_t *pmdp; | |
142 | pte_t *ptep; | |
143 | ||
dd1842a2 | 144 | BUILD_BUG_ON(TASK_SIZE_USER64 > H_PGTABLE_RANGE); |
eee24b5a AK |
145 | if (slab_is_available()) { |
146 | pgdp = pgd_offset_k(ea); | |
147 | pudp = pud_alloc(&init_mm, pgdp, ea); | |
148 | if (!pudp) | |
149 | return -ENOMEM; | |
150 | pmdp = pmd_alloc(&init_mm, pudp, ea); | |
151 | if (!pmdp) | |
152 | return -ENOMEM; | |
153 | ptep = pte_alloc_kernel(pmdp, ea); | |
154 | if (!ptep) | |
155 | return -ENOMEM; | |
156 | set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT, | |
157 | __pgprot(flags))); | |
158 | } else { | |
159 | /* | |
160 | * If the mm subsystem is not fully up, we cannot create a | |
161 | * linux page table entry for this mapping. Simply bolt an | |
162 | * entry in the hardware page table. | |
163 | * | |
164 | */ | |
165 | if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags, | |
166 | mmu_io_psize, mmu_kernel_ssize)) { | |
167 | printk(KERN_ERR "Failed to do bolted mapping IO " | |
168 | "memory at %016lx !\n", pa); | |
169 | return -ENOMEM; | |
170 | } | |
171 | } | |
172 | ||
173 | smp_wmb(); | |
174 | return 0; | |
175 | } | |
6a1ea362 AK |
176 | |
177 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
178 | ||
3df33f12 AK |
179 | unsigned long hash__pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, |
180 | pmd_t *pmdp, unsigned long clr, | |
181 | unsigned long set) | |
6a1ea362 AK |
182 | { |
183 | __be64 old_be, tmp; | |
184 | unsigned long old; | |
185 | ||
186 | #ifdef CONFIG_DEBUG_VM | |
ebd31197 | 187 | WARN_ON(!hash__pmd_trans_huge(*pmdp) && !pmd_devmap(*pmdp)); |
6a1ea362 AK |
188 | assert_spin_locked(&mm->page_table_lock); |
189 | #endif | |
190 | ||
191 | __asm__ __volatile__( | |
192 | "1: ldarx %0,0,%3\n\ | |
193 | and. %1,%0,%6\n\ | |
194 | bne- 1b \n\ | |
195 | andc %1,%0,%4 \n\ | |
196 | or %1,%1,%7\n\ | |
197 | stdcx. %1,0,%3 \n\ | |
198 | bne- 1b" | |
199 | : "=&r" (old_be), "=&r" (tmp), "=m" (*pmdp) | |
200 | : "r" (pmdp), "r" (cpu_to_be64(clr)), "m" (*pmdp), | |
201 | "r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set)) | |
202 | : "cc" ); | |
203 | ||
204 | old = be64_to_cpu(old_be); | |
205 | ||
206 | trace_hugepage_update(addr, old, clr, set); | |
207 | if (old & H_PAGE_HASHPTE) | |
208 | hpte_do_hugepage_flush(mm, addr, pmdp, old); | |
209 | return old; | |
210 | } | |
211 | ||
3df33f12 AK |
212 | pmd_t hash__pmdp_collapse_flush(struct vm_area_struct *vma, unsigned long address, |
213 | pmd_t *pmdp) | |
6a1ea362 AK |
214 | { |
215 | pmd_t pmd; | |
216 | ||
217 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | |
218 | VM_BUG_ON(pmd_trans_huge(*pmdp)); | |
ebd31197 | 219 | VM_BUG_ON(pmd_devmap(*pmdp)); |
6a1ea362 AK |
220 | |
221 | pmd = *pmdp; | |
222 | pmd_clear(pmdp); | |
223 | /* | |
224 | * Wait for all pending hash_page to finish. This is needed | |
225 | * in case of subpage collapse. When we collapse normal pages | |
226 | * to hugepage, we first clear the pmd, then invalidate all | |
227 | * the PTE entries. The assumption here is that any low level | |
228 | * page fault will see a none pmd and take the slow path that | |
229 | * will wait on mmap_sem. But we could very well be in a | |
230 | * hash_page with local ptep pointer value. Such a hash page | |
231 | * can result in adding new HPTE entries for normal subpages. | |
232 | * That means we could be modifying the page content as we | |
233 | * copy them to a huge page. So wait for parallel hash_page | |
234 | * to finish before invalidating HPTE entries. We can do this | |
235 | * by sending an IPI to all the cpus and executing a dummy | |
236 | * function there. | |
237 | */ | |
238 | kick_all_cpus_sync(); | |
239 | /* | |
240 | * Now invalidate the hpte entries in the range | |
241 | * covered by pmd. This make sure we take a | |
242 | * fault and will find the pmd as none, which will | |
243 | * result in a major fault which takes mmap_sem and | |
244 | * hence wait for collapse to complete. Without this | |
245 | * the __collapse_huge_page_copy can result in copying | |
246 | * the old content. | |
247 | */ | |
248 | flush_tlb_pmd_range(vma->vm_mm, &pmd, address); | |
249 | return pmd; | |
250 | } | |
251 | ||
6a1ea362 AK |
252 | /* |
253 | * We want to put the pgtable in pmd and use pgtable for tracking | |
254 | * the base page size hptes | |
255 | */ | |
3df33f12 AK |
256 | void hash__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, |
257 | pgtable_t pgtable) | |
6a1ea362 AK |
258 | { |
259 | pgtable_t *pgtable_slot; | |
260 | assert_spin_locked(&mm->page_table_lock); | |
261 | /* | |
262 | * we store the pgtable in the second half of PMD | |
263 | */ | |
264 | pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD; | |
265 | *pgtable_slot = pgtable; | |
266 | /* | |
267 | * expose the deposited pgtable to other cpus. | |
268 | * before we set the hugepage PTE at pmd level | |
269 | * hash fault code looks at the deposted pgtable | |
270 | * to store hash index values. | |
271 | */ | |
272 | smp_wmb(); | |
273 | } | |
274 | ||
3df33f12 | 275 | pgtable_t hash__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp) |
6a1ea362 AK |
276 | { |
277 | pgtable_t pgtable; | |
278 | pgtable_t *pgtable_slot; | |
279 | ||
280 | assert_spin_locked(&mm->page_table_lock); | |
281 | pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD; | |
282 | pgtable = *pgtable_slot; | |
283 | /* | |
284 | * Once we withdraw, mark the entry NULL. | |
285 | */ | |
286 | *pgtable_slot = NULL; | |
287 | /* | |
288 | * We store HPTE information in the deposited PTE fragment. | |
289 | * zero out the content on withdraw. | |
290 | */ | |
291 | memset(pgtable, 0, PTE_FRAG_SIZE); | |
292 | return pgtable; | |
293 | } | |
294 | ||
3df33f12 AK |
295 | void hash__pmdp_huge_split_prepare(struct vm_area_struct *vma, |
296 | unsigned long address, pmd_t *pmdp) | |
6a1ea362 AK |
297 | { |
298 | VM_BUG_ON(address & ~HPAGE_PMD_MASK); | |
299 | VM_BUG_ON(REGION_ID(address) != USER_REGION_ID); | |
ebd31197 | 300 | VM_BUG_ON(pmd_devmap(*pmdp)); |
6a1ea362 AK |
301 | |
302 | /* | |
303 | * We can't mark the pmd none here, because that will cause a race | |
304 | * against exit_mmap. We need to continue mark pmd TRANS HUGE, while | |
305 | * we spilt, but at the same time we wan't rest of the ppc64 code | |
306 | * not to insert hash pte on this, because we will be modifying | |
307 | * the deposited pgtable in the caller of this function. Hence | |
308 | * clear the _PAGE_USER so that we move the fault handling to | |
309 | * higher level function and that will serialize against ptl. | |
310 | * We need to flush existing hash pte entries here even though, | |
311 | * the translation is still valid, because we will withdraw | |
312 | * pgtable_t after this. | |
313 | */ | |
314 | pmd_hugepage_update(vma->vm_mm, address, pmdp, 0, _PAGE_PRIVILEGED); | |
315 | } | |
316 | ||
6a1ea362 AK |
317 | /* |
318 | * A linux hugepage PMD was changed and the corresponding hash table entries | |
319 | * neesd to be flushed. | |
320 | */ | |
321 | void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr, | |
322 | pmd_t *pmdp, unsigned long old_pmd) | |
323 | { | |
324 | int ssize; | |
325 | unsigned int psize; | |
326 | unsigned long vsid; | |
327 | unsigned long flags = 0; | |
328 | const struct cpumask *tmp; | |
329 | ||
330 | /* get the base page size,vsid and segment size */ | |
331 | #ifdef CONFIG_DEBUG_VM | |
332 | psize = get_slice_psize(mm, addr); | |
333 | BUG_ON(psize == MMU_PAGE_16M); | |
334 | #endif | |
335 | if (old_pmd & H_PAGE_COMBO) | |
336 | psize = MMU_PAGE_4K; | |
337 | else | |
338 | psize = MMU_PAGE_64K; | |
339 | ||
340 | if (!is_kernel_addr(addr)) { | |
341 | ssize = user_segment_size(addr); | |
342 | vsid = get_vsid(mm->context.id, addr, ssize); | |
343 | WARN_ON(vsid == 0); | |
344 | } else { | |
345 | vsid = get_kernel_vsid(addr, mmu_kernel_ssize); | |
346 | ssize = mmu_kernel_ssize; | |
347 | } | |
348 | ||
349 | tmp = cpumask_of(smp_processor_id()); | |
350 | if (cpumask_equal(mm_cpumask(mm), tmp)) | |
351 | flags |= HPTE_LOCAL_UPDATE; | |
352 | ||
353 | return flush_hash_hugepage(vsid, addr, pmdp, psize, ssize, flags); | |
354 | } | |
355 | ||
3df33f12 AK |
356 | pmd_t hash__pmdp_huge_get_and_clear(struct mm_struct *mm, |
357 | unsigned long addr, pmd_t *pmdp) | |
6a1ea362 AK |
358 | { |
359 | pmd_t old_pmd; | |
360 | pgtable_t pgtable; | |
361 | unsigned long old; | |
362 | pgtable_t *pgtable_slot; | |
363 | ||
364 | old = pmd_hugepage_update(mm, addr, pmdp, ~0UL, 0); | |
365 | old_pmd = __pmd(old); | |
366 | /* | |
367 | * We have pmd == none and we are holding page_table_lock. | |
368 | * So we can safely go and clear the pgtable hash | |
369 | * index info. | |
370 | */ | |
371 | pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD; | |
372 | pgtable = *pgtable_slot; | |
373 | /* | |
374 | * Let's zero out old valid and hash index details | |
375 | * hash fault look at them. | |
376 | */ | |
377 | memset(pgtable, 0, PTE_FRAG_SIZE); | |
378 | /* | |
379 | * Serialize against find_linux_pte_or_hugepte which does lock-less | |
380 | * lookup in page tables with local interrupts disabled. For huge pages | |
381 | * it casts pmd_t to pte_t. Since format of pte_t is different from | |
382 | * pmd_t we want to prevent transit from pmd pointing to page table | |
383 | * to pmd pointing to huge page (and back) while interrupts are disabled. | |
384 | * We clear pmd to possibly replace it with page table pointer in | |
385 | * different code paths. So make sure we wait for the parallel | |
386 | * find_linux_pte_or_hugepage to finish. | |
387 | */ | |
388 | kick_all_cpus_sync(); | |
389 | return old_pmd; | |
390 | } | |
391 | ||
3df33f12 | 392 | int hash__has_transparent_hugepage(void) |
6a1ea362 AK |
393 | { |
394 | ||
395 | if (!mmu_has_feature(MMU_FTR_16M_PAGE)) | |
396 | return 0; | |
397 | /* | |
398 | * We support THP only if PMD_SIZE is 16MB. | |
399 | */ | |
400 | if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT) | |
401 | return 0; | |
402 | /* | |
403 | * We need to make sure that we support 16MB hugepage in a segement | |
404 | * with base page size 64K or 4K. We only enable THP with a PAGE_SIZE | |
405 | * of 64K. | |
406 | */ | |
407 | /* | |
408 | * If we have 64K HPTE, we will be using that by default | |
409 | */ | |
410 | if (mmu_psize_defs[MMU_PAGE_64K].shift && | |
411 | (mmu_psize_defs[MMU_PAGE_64K].penc[MMU_PAGE_16M] == -1)) | |
412 | return 0; | |
413 | /* | |
414 | * Ok we only have 4K HPTE | |
415 | */ | |
416 | if (mmu_psize_defs[MMU_PAGE_4K].penc[MMU_PAGE_16M] == -1) | |
417 | return 0; | |
418 | ||
419 | return 1; | |
420 | } | |
421 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |