Merge branch 'asus' into release
[linux-2.6-block.git] / arch / powerpc / mm / init_64.c
CommitLineData
14cf11af
PM
1/*
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
6 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
7 * Copyright (C) 1996 Paul Mackerras
14cf11af
PM
8 *
9 * Derived from "arch/i386/mm/init.c"
10 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
11 *
12 * Dave Engebretsen <engebret@us.ibm.com>
13 * Rework for PPC64 port.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 *
20 */
21
cec08e7a
BH
22#undef DEBUG
23
14cf11af
PM
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/kernel.h>
27#include <linux/errno.h>
28#include <linux/string.h>
29#include <linux/types.h>
30#include <linux/mman.h>
31#include <linux/mm.h>
32#include <linux/swap.h>
33#include <linux/stddef.h>
34#include <linux/vmalloc.h>
35#include <linux/init.h>
36#include <linux/delay.h>
37#include <linux/bootmem.h>
38#include <linux/highmem.h>
39#include <linux/idr.h>
40#include <linux/nodemask.h>
41#include <linux/module.h>
c9cf5528 42#include <linux/poison.h>
d9b2b2a2 43#include <linux/lmb.h>
a4fe3ce7 44#include <linux/hugetlb.h>
14cf11af
PM
45
46#include <asm/pgalloc.h>
47#include <asm/page.h>
48#include <asm/prom.h>
14cf11af
PM
49#include <asm/rtas.h>
50#include <asm/io.h>
51#include <asm/mmu_context.h>
52#include <asm/pgtable.h>
53#include <asm/mmu.h>
54#include <asm/uaccess.h>
55#include <asm/smp.h>
56#include <asm/machdep.h>
57#include <asm/tlb.h>
58#include <asm/eeh.h>
59#include <asm/processor.h>
60#include <asm/mmzone.h>
61#include <asm/cputable.h>
14cf11af
PM
62#include <asm/sections.h>
63#include <asm/system.h>
64#include <asm/iommu.h>
65#include <asm/abs_addr.h>
66#include <asm/vdso.h>
800fc3ee
DG
67
68#include "mmu_decl.h"
14cf11af 69
94491685 70#ifdef CONFIG_PPC_STD_MMU_64
14cf11af
PM
71#if PGTABLE_RANGE > USER_VSID_RANGE
72#warning Limited user VSID range means pagetable space is wasted
73#endif
74
75#if (TASK_SIZE_USER64 < PGTABLE_RANGE) && (TASK_SIZE_USER64 < USER_VSID_RANGE)
76#warning TASK_SIZE is smaller than it needs to be.
77#endif
94491685 78#endif /* CONFIG_PPC_STD_MMU_64 */
14cf11af 79
37dd2bad
KG
80phys_addr_t memstart_addr = ~0;
81phys_addr_t kernstart_addr;
d7917ba7 82
14cf11af
PM
83void free_initmem(void)
84{
85 unsigned long addr;
86
87 addr = (unsigned long)__init_begin;
88 for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) {
c9cf5528 89 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
14cf11af 90 ClearPageReserved(virt_to_page(addr));
7835e98b 91 init_page_count(virt_to_page(addr));
14cf11af
PM
92 free_page(addr);
93 totalram_pages++;
94 }
95 printk ("Freeing unused kernel memory: %luk freed\n",
96 ((unsigned long)__init_end - (unsigned long)__init_begin) >> 10);
97}
98
99#ifdef CONFIG_BLK_DEV_INITRD
100void free_initrd_mem(unsigned long start, unsigned long end)
101{
102 if (start < end)
103 printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
104 for (; start < end; start += PAGE_SIZE) {
105 ClearPageReserved(virt_to_page(start));
7835e98b 106 init_page_count(virt_to_page(start));
14cf11af
PM
107 free_page(start);
108 totalram_pages++;
109 }
110}
111#endif
112
51cc5068 113static void pgd_ctor(void *addr)
14cf11af 114{
51cc5068
AD
115 memset(addr, 0, PGD_TABLE_SIZE);
116}
117
118static void pmd_ctor(void *addr)
119{
120 memset(addr, 0, PMD_TABLE_SIZE);
14cf11af
PM
121}
122
a0668cdc
DG
123struct kmem_cache *pgtable_cache[MAX_PGTABLE_INDEX_SIZE];
124
125/*
126 * Create a kmem_cache() for pagetables. This is not used for PTE
127 * pages - they're linked to struct page, come from the normal free
128 * pages pool and have a different entry size (see real_pte_t) to
129 * everything else. Caches created by this function are used for all
130 * the higher level pagetables, and for hugepage pagetables.
131 */
132void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
133{
134 char *name;
135 unsigned long table_size = sizeof(void *) << shift;
136 unsigned long align = table_size;
137
138 /* When batching pgtable pointers for RCU freeing, we store
139 * the index size in the low bits. Table alignment must be
a4fe3ce7
DG
140 * big enough to fit it.
141 *
142 * Likewise, hugeapge pagetable pointers contain a (different)
143 * shift value in the low bits. All tables must be aligned so
144 * as to leave enough 0 bits in the address to contain it. */
145 unsigned long minalign = max(MAX_PGTABLE_INDEX_SIZE + 1,
146 HUGEPD_SHIFT_MASK + 1);
a0668cdc
DG
147 struct kmem_cache *new;
148
149 /* It would be nice if this was a BUILD_BUG_ON(), but at the
150 * moment, gcc doesn't seem to recognize is_power_of_2 as a
151 * constant expression, so so much for that. */
152 BUG_ON(!is_power_of_2(minalign));
153 BUG_ON((shift < 1) || (shift > MAX_PGTABLE_INDEX_SIZE));
154
155 if (PGT_CACHE(shift))
156 return; /* Already have a cache of this size */
157
158 align = max_t(unsigned long, align, minalign);
159 name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift);
160 new = kmem_cache_create(name, table_size, align, 0, ctor);
161 PGT_CACHE(shift) = new;
162
163 pr_debug("Allocated pgtable cache for order %d\n", shift);
164}
165
14cf11af
PM
166
167void pgtable_cache_init(void)
168{
a0668cdc
DG
169 pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor);
170 pgtable_cache_add(PMD_INDEX_SIZE, pmd_ctor);
171 if (!PGT_CACHE(PGD_INDEX_SIZE) || !PGT_CACHE(PMD_INDEX_SIZE))
172 panic("Couldn't allocate pgtable caches");
173
174 /* In all current configs, when the PUD index exists it's the
175 * same size as either the pgd or pmd index. Verify that the
176 * initialization above has also created a PUD cache. This
177 * will need re-examiniation if we add new possibilities for
178 * the pagetable layout. */
179 BUG_ON(PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE));
14cf11af 180}
d29eff7b
AW
181
182#ifdef CONFIG_SPARSEMEM_VMEMMAP
183/*
184 * Given an address within the vmemmap, determine the pfn of the page that
185 * represents the start of the section it is within. Note that we have to
186 * do this by hand as the proffered address may not be correctly aligned.
187 * Subtraction of non-aligned pointers produces undefined results.
188 */
09de9ff8 189static unsigned long __meminit vmemmap_section_start(unsigned long page)
d29eff7b
AW
190{
191 unsigned long offset = page - ((unsigned long)(vmemmap));
192
193 /* Return the pfn of the start of the section. */
194 return (offset / sizeof(struct page)) & PAGE_SECTION_MASK;
195}
196
197/*
198 * Check if this vmemmap page is already initialised. If any section
199 * which overlaps this vmemmap page is initialised then this page is
200 * initialised already.
201 */
09de9ff8 202static int __meminit vmemmap_populated(unsigned long start, int page_size)
d29eff7b
AW
203{
204 unsigned long end = start + page_size;
205
206 for (; start < end; start += (PAGES_PER_SECTION * sizeof(struct page)))
207 if (pfn_valid(vmemmap_section_start(start)))
208 return 1;
209
210 return 0;
211}
212
32a74949
BH
213/* On hash-based CPUs, the vmemmap is bolted in the hash table.
214 *
215 * On Book3E CPUs, the vmemmap is currently mapped in the top half of
216 * the vmalloc space using normal page tables, though the size of
217 * pages encoded in the PTEs can be different
218 */
219
220#ifdef CONFIG_PPC_BOOK3E
221static void __meminit vmemmap_create_mapping(unsigned long start,
222 unsigned long page_size,
223 unsigned long phys)
224{
225 /* Create a PTE encoding without page size */
226 unsigned long i, flags = _PAGE_PRESENT | _PAGE_ACCESSED |
227 _PAGE_KERNEL_RW;
228
229 /* PTEs only contain page size encodings up to 32M */
230 BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].enc > 0xf);
231
232 /* Encode the size in the PTE */
233 flags |= mmu_psize_defs[mmu_vmemmap_psize].enc << 8;
234
235 /* For each PTE for that area, map things. Note that we don't
236 * increment phys because all PTEs are of the large size and
237 * thus must have the low bits clear
238 */
239 for (i = 0; i < page_size; i += PAGE_SIZE)
240 BUG_ON(map_kernel_page(start + i, phys, flags));
241}
242#else /* CONFIG_PPC_BOOK3E */
243static void __meminit vmemmap_create_mapping(unsigned long start,
244 unsigned long page_size,
245 unsigned long phys)
246{
247 int mapped = htab_bolt_mapping(start, start + page_size, phys,
248 PAGE_KERNEL, mmu_vmemmap_psize,
249 mmu_kernel_ssize);
250 BUG_ON(mapped < 0);
251}
252#endif /* CONFIG_PPC_BOOK3E */
253
d29eff7b 254int __meminit vmemmap_populate(struct page *start_page,
cec08e7a 255 unsigned long nr_pages, int node)
d29eff7b 256{
d29eff7b
AW
257 unsigned long start = (unsigned long)start_page;
258 unsigned long end = (unsigned long)(start_page + nr_pages);
cec08e7a 259 unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;
d29eff7b 260
d29eff7b
AW
261 /* Align to the page size of the linear mapping. */
262 start = _ALIGN_DOWN(start, page_size);
263
32a74949
BH
264 pr_debug("vmemmap_populate page %p, %ld pages, node %d\n",
265 start_page, nr_pages, node);
266 pr_debug(" -> map %lx..%lx\n", start, end);
267
d29eff7b 268 for (; start < end; start += page_size) {
d29eff7b
AW
269 void *p;
270
271 if (vmemmap_populated(start, page_size))
272 continue;
273
274 p = vmemmap_alloc_block(page_size, node);
275 if (!p)
276 return -ENOMEM;
277
32a74949
BH
278 pr_debug(" * %016lx..%016lx allocated at %p\n",
279 start, start + page_size, p);
d29eff7b 280
32a74949 281 vmemmap_create_mapping(start, page_size, __pa(p));
d29eff7b
AW
282 }
283
284 return 0;
285}
cec08e7a 286#endif /* CONFIG_SPARSEMEM_VMEMMAP */