powerpc/mm/hash/4k: Free hugetlb page table caches correctly.
[linux-2.6-block.git] / arch / powerpc / mm / hugetlbpage.c
CommitLineData
1da177e4 1/*
41151e77 2 * PPC Huge TLB Page Support for Kernel.
1da177e4
LT
3 *
4 * Copyright (C) 2003 David Gibson, IBM Corporation.
41151e77 5 * Copyright (C) 2011 Becky Bruce, Freescale Semiconductor
1da177e4
LT
6 *
7 * Based on the IA-32 version:
8 * Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
9 */
10
1da177e4 11#include <linux/mm.h>
883a3e52 12#include <linux/io.h>
5a0e3ad6 13#include <linux/slab.h>
1da177e4 14#include <linux/hugetlb.h>
342d3db7 15#include <linux/export.h>
41151e77
BB
16#include <linux/of_fdt.h>
17#include <linux/memblock.h>
18#include <linux/bootmem.h>
13020be8 19#include <linux/moduleparam.h>
50791e6d
AK
20#include <linux/swap.h>
21#include <linux/swapops.h>
883a3e52 22#include <asm/pgtable.h>
1da177e4
LT
23#include <asm/pgalloc.h>
24#include <asm/tlb.h>
41151e77 25#include <asm/setup.h>
29409997 26#include <asm/hugetlb.h>
94171b19
AK
27#include <asm/pte-walk.h>
28
29409997
AK
29
30#ifdef CONFIG_HUGETLB_PAGE
1da177e4 31
91224346 32#define PAGE_SHIFT_64K 16
4b914286
CL
33#define PAGE_SHIFT_512K 19
34#define PAGE_SHIFT_8M 23
91224346
JT
35#define PAGE_SHIFT_16M 24
36#define PAGE_SHIFT_16G 34
4ec161cf 37
85975387
HB
38bool hugetlb_disabled = false;
39
41151e77 40unsigned int HPAGE_SHIFT;
7a849a6c 41EXPORT_SYMBOL(HPAGE_SHIFT);
ec4b2c0c 42
20717e1f 43#define hugepd_none(hpd) (hpd_val(hpd) == 0)
a4fe3ce7 44
7868a208 45pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr, unsigned long sz)
a4fe3ce7 46{
94171b19
AK
47 /*
48 * Only called for hugetlbfs pages, hence can ignore THP and the
49 * irq disabled walk.
50 */
51 return __find_linux_pte(mm->pgd, addr, NULL, NULL);
a4fe3ce7
DG
52}
53
f10a04c0 54static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
ed515b68
AK
55 unsigned long address, unsigned int pdshift,
56 unsigned int pshift, spinlock_t *ptl)
f10a04c0 57{
41151e77
BB
58 struct kmem_cache *cachep;
59 pte_t *new;
41151e77 60 int i;
03bb2d65
CL
61 int num_hugepd;
62
63 if (pshift >= pdshift) {
64 cachep = hugepte_cache;
65 num_hugepd = 1 << (pshift - pdshift);
66 } else {
67 cachep = PGT_CACHE(pdshift - pshift);
68 num_hugepd = 1;
69 }
41151e77 70
d2485644 71 new = kmem_cache_zalloc(cachep, pgtable_gfp_flags(mm, GFP_KERNEL));
f10a04c0 72
a4fe3ce7
DG
73 BUG_ON(pshift > HUGEPD_SHIFT_MASK);
74 BUG_ON((unsigned long)new & HUGEPD_SHIFT_MASK);
75
f10a04c0
DG
76 if (! new)
77 return -ENOMEM;
78
0eab46be
SB
79 /*
80 * Make sure other cpus find the hugepd set only after a
81 * properly initialized page table is visible to them.
82 * For more details look for comment in __pte_alloc().
83 */
84 smp_wmb();
85
ed515b68 86 spin_lock(ptl);
41151e77
BB
87 /*
88 * We have multiple higher-level entries that point to the same
89 * actual pte location. Fill in each as we go and backtrack on error.
90 * We need all of these so the DTLB pgtable walk code can find the
91 * right higher-level entry without knowing if it's a hugepage or not.
92 */
93 for (i = 0; i < num_hugepd; i++, hpdp++) {
94 if (unlikely(!hugepd_none(*hpdp)))
95 break;
20717e1f 96 else {
03bb2d65 97#ifdef CONFIG_PPC_BOOK3S_64
20717e1f
AK
98 *hpdp = __hugepd(__pa(new) |
99 (shift_to_mmu_psize(pshift) << 2));
4b914286 100#elif defined(CONFIG_PPC_8xx)
de0f9387 101 *hpdp = __hugepd(__pa(new) | _PMD_USER |
20717e1f
AK
102 (pshift == PAGE_SHIFT_8M ? _PMD_PAGE_8M :
103 _PMD_PAGE_512K) | _PMD_PRESENT);
03bb2d65 104#else
cf9427b8 105 /* We use the old format for PPC_FSL_BOOK3E */
20717e1f 106 *hpdp = __hugepd(((unsigned long)new & ~PD_HUGE) | pshift);
03bb2d65 107#endif
20717e1f 108 }
41151e77
BB
109 }
110 /* If we bailed from the for loop early, an error occurred, clean up */
111 if (i < num_hugepd) {
112 for (i = i - 1 ; i >= 0; i--, hpdp--)
20717e1f 113 *hpdp = __hugepd(0);
41151e77
BB
114 kmem_cache_free(cachep, new);
115 }
ed515b68 116 spin_unlock(ptl);
f10a04c0
DG
117 return 0;
118}
119
a1cd5419
BB
120/*
121 * These macros define how to determine which level of the page table holds
122 * the hpdp.
123 */
4b914286 124#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
a1cd5419
BB
125#define HUGEPD_PGD_SHIFT PGDIR_SHIFT
126#define HUGEPD_PUD_SHIFT PUD_SHIFT
a1cd5419
BB
127#endif
128
e2b3d202
AK
129/*
130 * At this point we do the placement change only for BOOK3S 64. This would
131 * possibly work on other subarchs.
132 */
133pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr, unsigned long sz)
134{
135 pgd_t *pg;
136 pud_t *pu;
137 pmd_t *pm;
138 hugepd_t *hpdp = NULL;
139 unsigned pshift = __ffs(sz);
140 unsigned pdshift = PGDIR_SHIFT;
ed515b68 141 spinlock_t *ptl;
e2b3d202
AK
142
143 addr &= ~(sz-1);
144 pg = pgd_offset(mm, addr);
145
03bb2d65 146#ifdef CONFIG_PPC_BOOK3S_64
e2b3d202
AK
147 if (pshift == PGDIR_SHIFT)
148 /* 16GB huge page */
149 return (pte_t *) pg;
ed515b68 150 else if (pshift > PUD_SHIFT) {
e2b3d202
AK
151 /*
152 * We need to use hugepd table
153 */
ed515b68 154 ptl = &mm->page_table_lock;
e2b3d202 155 hpdp = (hugepd_t *)pg;
ed515b68 156 } else {
e2b3d202
AK
157 pdshift = PUD_SHIFT;
158 pu = pud_alloc(mm, pg, addr);
159 if (pshift == PUD_SHIFT)
160 return (pte_t *)pu;
ed515b68
AK
161 else if (pshift > PMD_SHIFT) {
162 ptl = pud_lockptr(mm, pu);
e2b3d202 163 hpdp = (hugepd_t *)pu;
ed515b68 164 } else {
e2b3d202
AK
165 pdshift = PMD_SHIFT;
166 pm = pmd_alloc(mm, pu, addr);
167 if (pshift == PMD_SHIFT)
168 /* 16MB hugepage */
169 return (pte_t *)pm;
ed515b68
AK
170 else {
171 ptl = pmd_lockptr(mm, pm);
e2b3d202 172 hpdp = (hugepd_t *)pm;
ed515b68 173 }
e2b3d202
AK
174 }
175 }
e2b3d202 176#else
a1cd5419 177 if (pshift >= HUGEPD_PGD_SHIFT) {
ed515b68 178 ptl = &mm->page_table_lock;
a4fe3ce7
DG
179 hpdp = (hugepd_t *)pg;
180 } else {
181 pdshift = PUD_SHIFT;
182 pu = pud_alloc(mm, pg, addr);
a1cd5419 183 if (pshift >= HUGEPD_PUD_SHIFT) {
ed515b68 184 ptl = pud_lockptr(mm, pu);
a4fe3ce7
DG
185 hpdp = (hugepd_t *)pu;
186 } else {
187 pdshift = PMD_SHIFT;
188 pm = pmd_alloc(mm, pu, addr);
ed515b68 189 ptl = pmd_lockptr(mm, pm);
a4fe3ce7
DG
190 hpdp = (hugepd_t *)pm;
191 }
192 }
03bb2d65 193#endif
a4fe3ce7
DG
194 if (!hpdp)
195 return NULL;
196
197 BUG_ON(!hugepd_none(*hpdp) && !hugepd_ok(*hpdp));
198
ed515b68
AK
199 if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr,
200 pdshift, pshift, ptl))
a4fe3ce7
DG
201 return NULL;
202
b30e7590 203 return hugepte_offset(*hpdp, addr, pdshift);
4ec161cf 204}
4ec161cf 205
79cc38de 206#ifdef CONFIG_PPC_BOOK3S_64
41151e77 207/*
79cc38de
AK
208 * Tracks gpages after the device tree is scanned and before the
209 * huge_boot_pages list is ready on pseries.
41151e77 210 */
79cc38de
AK
211#define MAX_NUMBER_GPAGES 1024
212__initdata static u64 gpage_freearray[MAX_NUMBER_GPAGES];
213__initdata static unsigned nr_gpages;
41151e77
BB
214
215/*
79cc38de 216 * Build list of addresses of gigantic pages. This function is used in early
14ed7409 217 * boot before the buddy allocator is setup.
41151e77 218 */
79cc38de 219void __init pseries_add_gpage(u64 addr, u64 page_size, unsigned long number_of_pages)
658013e9
JT
220{
221 if (!addr)
222 return;
223 while (number_of_pages > 0) {
224 gpage_freearray[nr_gpages] = addr;
225 nr_gpages++;
226 number_of_pages--;
227 addr += page_size;
228 }
229}
230
79cc38de 231int __init pseries_alloc_bootmem_huge_page(struct hstate *hstate)
ec4b2c0c
JT
232{
233 struct huge_bootmem_page *m;
234 if (nr_gpages == 0)
235 return 0;
236 m = phys_to_virt(gpage_freearray[--nr_gpages]);
237 gpage_freearray[nr_gpages] = 0;
238 list_add(&m->list, &huge_boot_pages);
0d9ea754 239 m->hstate = hstate;
ec4b2c0c
JT
240 return 1;
241}
41151e77 242#endif
ec4b2c0c 243
79cc38de
AK
244
245int __init alloc_bootmem_huge_page(struct hstate *h)
246{
247
248#ifdef CONFIG_PPC_BOOK3S_64
249 if (firmware_has_feature(FW_FEATURE_LPAR) && !radix_enabled())
250 return pseries_alloc_bootmem_huge_page(h);
251#endif
252 return __alloc_bootmem_huge_page(h);
253}
254
4b914286 255#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
41151e77
BB
256#define HUGEPD_FREELIST_SIZE \
257 ((PAGE_SIZE - sizeof(struct hugepd_freelist)) / sizeof(pte_t))
258
259struct hugepd_freelist {
260 struct rcu_head rcu;
261 unsigned int index;
262 void *ptes[0];
263};
264
265static DEFINE_PER_CPU(struct hugepd_freelist *, hugepd_freelist_cur);
266
267static void hugepd_free_rcu_callback(struct rcu_head *head)
268{
269 struct hugepd_freelist *batch =
270 container_of(head, struct hugepd_freelist, rcu);
271 unsigned int i;
272
273 for (i = 0; i < batch->index; i++)
274 kmem_cache_free(hugepte_cache, batch->ptes[i]);
275
276 free_page((unsigned long)batch);
277}
278
279static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
280{
281 struct hugepd_freelist **batchp;
282
08a5bb29 283 batchp = &get_cpu_var(hugepd_freelist_cur);
41151e77
BB
284
285 if (atomic_read(&tlb->mm->mm_users) < 2 ||
b426e4bd 286 mm_is_thread_local(tlb->mm)) {
41151e77 287 kmem_cache_free(hugepte_cache, hugepte);
08a5bb29 288 put_cpu_var(hugepd_freelist_cur);
41151e77
BB
289 return;
290 }
291
292 if (*batchp == NULL) {
293 *batchp = (struct hugepd_freelist *)__get_free_page(GFP_ATOMIC);
294 (*batchp)->index = 0;
295 }
296
297 (*batchp)->ptes[(*batchp)->index++] = hugepte;
298 if ((*batchp)->index == HUGEPD_FREELIST_SIZE) {
299 call_rcu_sched(&(*batchp)->rcu, hugepd_free_rcu_callback);
300 *batchp = NULL;
301 }
94b09d75 302 put_cpu_var(hugepd_freelist_cur);
41151e77 303}
03bb2d65
CL
304#else
305static inline void hugepd_free(struct mmu_gather *tlb, void *hugepte) {}
41151e77
BB
306#endif
307
a4fe3ce7
DG
308static void free_hugepd_range(struct mmu_gather *tlb, hugepd_t *hpdp, int pdshift,
309 unsigned long start, unsigned long end,
310 unsigned long floor, unsigned long ceiling)
f10a04c0
DG
311{
312 pte_t *hugepte = hugepd_page(*hpdp);
41151e77
BB
313 int i;
314
a4fe3ce7 315 unsigned long pdmask = ~((1UL << pdshift) - 1);
41151e77 316 unsigned int num_hugepd = 1;
03bb2d65 317 unsigned int shift = hugepd_shift(*hpdp);
41151e77 318
881fde1d 319 /* Note: On fsl the hpdp may be the first of several */
03bb2d65
CL
320 if (shift > pdshift)
321 num_hugepd = 1 << (shift - pdshift);
a4fe3ce7
DG
322
323 start &= pdmask;
324 if (start < floor)
325 return;
326 if (ceiling) {
327 ceiling &= pdmask;
328 if (! ceiling)
329 return;
330 }
331 if (end - 1 > ceiling - 1)
332 return;
f10a04c0 333
41151e77 334 for (i = 0; i < num_hugepd; i++, hpdp++)
20717e1f 335 *hpdp = __hugepd(0);
41151e77 336
03bb2d65
CL
337 if (shift >= pdshift)
338 hugepd_free(tlb, hugepte);
339 else
fadd03c6
AK
340 pgtable_free_tlb(tlb, hugepte,
341 get_hugepd_cache_index(pdshift - shift));
f10a04c0
DG
342}
343
f10a04c0
DG
344static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
345 unsigned long addr, unsigned long end,
a4fe3ce7 346 unsigned long floor, unsigned long ceiling)
f10a04c0
DG
347{
348 pmd_t *pmd;
349 unsigned long next;
350 unsigned long start;
351
352 start = addr;
f10a04c0 353 do {
03bb2d65
CL
354 unsigned long more;
355
a1cd5419 356 pmd = pmd_offset(pud, addr);
f10a04c0 357 next = pmd_addr_end(addr, end);
b30e7590 358 if (!is_hugepd(__hugepd(pmd_val(*pmd)))) {
8bbd9f04
AK
359 /*
360 * if it is not hugepd pointer, we should already find
361 * it cleared.
362 */
363 WARN_ON(!pmd_none_or_clear_bad(pmd));
f10a04c0 364 continue;
8bbd9f04 365 }
a1cd5419
BB
366 /*
367 * Increment next by the size of the huge mapping since
368 * there may be more than one entry at this level for a
369 * single hugepage, but all of them point to
370 * the same kmem cache that holds the hugepte.
371 */
03bb2d65
CL
372 more = addr + (1 << hugepd_shift(*(hugepd_t *)pmd));
373 if (more > next)
374 next = more;
375
a4fe3ce7
DG
376 free_hugepd_range(tlb, (hugepd_t *)pmd, PMD_SHIFT,
377 addr, next, floor, ceiling);
a1cd5419 378 } while (addr = next, addr != end);
f10a04c0
DG
379
380 start &= PUD_MASK;
381 if (start < floor)
382 return;
383 if (ceiling) {
384 ceiling &= PUD_MASK;
385 if (!ceiling)
386 return;
1da177e4 387 }
f10a04c0
DG
388 if (end - 1 > ceiling - 1)
389 return;
1da177e4 390
f10a04c0
DG
391 pmd = pmd_offset(pud, start);
392 pud_clear(pud);
9e1b32ca 393 pmd_free_tlb(tlb, pmd, start);
50c6a665 394 mm_dec_nr_pmds(tlb->mm);
f10a04c0 395}
f10a04c0
DG
396
397static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
398 unsigned long addr, unsigned long end,
399 unsigned long floor, unsigned long ceiling)
400{
401 pud_t *pud;
402 unsigned long next;
403 unsigned long start;
404
405 start = addr;
f10a04c0 406 do {
a1cd5419 407 pud = pud_offset(pgd, addr);
f10a04c0 408 next = pud_addr_end(addr, end);
b30e7590 409 if (!is_hugepd(__hugepd(pud_val(*pud)))) {
4ec161cf
JT
410 if (pud_none_or_clear_bad(pud))
411 continue;
0d9ea754 412 hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
a4fe3ce7 413 ceiling);
4ec161cf 414 } else {
03bb2d65 415 unsigned long more;
a1cd5419
BB
416 /*
417 * Increment next by the size of the huge mapping since
418 * there may be more than one entry at this level for a
419 * single hugepage, but all of them point to
420 * the same kmem cache that holds the hugepte.
421 */
03bb2d65
CL
422 more = addr + (1 << hugepd_shift(*(hugepd_t *)pud));
423 if (more > next)
424 next = more;
425
a4fe3ce7
DG
426 free_hugepd_range(tlb, (hugepd_t *)pud, PUD_SHIFT,
427 addr, next, floor, ceiling);
4ec161cf 428 }
a1cd5419 429 } while (addr = next, addr != end);
f10a04c0
DG
430
431 start &= PGDIR_MASK;
432 if (start < floor)
433 return;
434 if (ceiling) {
435 ceiling &= PGDIR_MASK;
436 if (!ceiling)
437 return;
438 }
439 if (end - 1 > ceiling - 1)
440 return;
441
442 pud = pud_offset(pgd, start);
443 pgd_clear(pgd);
9e1b32ca 444 pud_free_tlb(tlb, pud, start);
b4e98d9a 445 mm_dec_nr_puds(tlb->mm);
f10a04c0
DG
446}
447
448/*
449 * This function frees user-level page tables of a process.
f10a04c0 450 */
42b77728 451void hugetlb_free_pgd_range(struct mmu_gather *tlb,
f10a04c0
DG
452 unsigned long addr, unsigned long end,
453 unsigned long floor, unsigned long ceiling)
454{
455 pgd_t *pgd;
456 unsigned long next;
f10a04c0
DG
457
458 /*
a4fe3ce7
DG
459 * Because there are a number of different possible pagetable
460 * layouts for hugepage ranges, we limit knowledge of how
461 * things should be laid out to the allocation path
462 * (huge_pte_alloc(), above). Everything else works out the
463 * structure as it goes from information in the hugepd
464 * pointers. That means that we can't here use the
465 * optimization used in the normal page free_pgd_range(), of
466 * checking whether we're actually covering a large enough
467 * range to have to do anything at the top level of the walk
468 * instead of at the bottom.
f10a04c0 469 *
a4fe3ce7
DG
470 * To make sense of this, you should probably go read the big
471 * block comment at the top of the normal free_pgd_range(),
472 * too.
f10a04c0 473 */
f10a04c0 474
f10a04c0 475 do {
f10a04c0 476 next = pgd_addr_end(addr, end);
41151e77 477 pgd = pgd_offset(tlb->mm, addr);
b30e7590 478 if (!is_hugepd(__hugepd(pgd_val(*pgd)))) {
0b26425c
DG
479 if (pgd_none_or_clear_bad(pgd))
480 continue;
481 hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
482 } else {
03bb2d65 483 unsigned long more;
41151e77
BB
484 /*
485 * Increment next by the size of the huge mapping since
881fde1d
BB
486 * there may be more than one entry at the pgd level
487 * for a single hugepage, but all of them point to the
488 * same kmem cache that holds the hugepte.
41151e77 489 */
03bb2d65
CL
490 more = addr + (1 << hugepd_shift(*(hugepd_t *)pgd));
491 if (more > next)
492 next = more;
493
a4fe3ce7
DG
494 free_hugepd_range(tlb, (hugepd_t *)pgd, PGDIR_SHIFT,
495 addr, next, floor, ceiling);
0b26425c 496 }
41151e77 497 } while (addr = next, addr != end);
1da177e4
LT
498}
499
50791e6d
AK
500struct page *follow_huge_pd(struct vm_area_struct *vma,
501 unsigned long address, hugepd_t hpd,
502 int flags, int pdshift)
503{
504 pte_t *ptep;
505 spinlock_t *ptl;
506 struct page *page = NULL;
507 unsigned long mask;
508 int shift = hugepd_shift(hpd);
509 struct mm_struct *mm = vma->vm_mm;
510
511retry:
ed515b68
AK
512 /*
513 * hugepage directory entries are protected by mm->page_table_lock
514 * Use this instead of huge_pte_lockptr
515 */
50791e6d
AK
516 ptl = &mm->page_table_lock;
517 spin_lock(ptl);
518
519 ptep = hugepte_offset(hpd, address, pdshift);
520 if (pte_present(*ptep)) {
521 mask = (1UL << shift) - 1;
522 page = pte_page(*ptep);
523 page += ((address & mask) >> PAGE_SHIFT);
524 if (flags & FOLL_GET)
525 get_page(page);
526 } else {
527 if (is_hugetlb_entry_migration(*ptep)) {
528 spin_unlock(ptl);
529 __migration_entry_wait(mm, ptep, ptl);
530 goto retry;
531 }
532 }
533 spin_unlock(ptl);
534 return page;
535}
536
39adfa54
DG
537static unsigned long hugepte_addr_end(unsigned long addr, unsigned long end,
538 unsigned long sz)
539{
540 unsigned long __boundary = (addr + sz) & ~(sz-1);
541 return (__boundary - 1 < end - 1) ? __boundary : end;
542}
543
b30e7590
AK
544int gup_huge_pd(hugepd_t hugepd, unsigned long addr, unsigned pdshift,
545 unsigned long end, int write, struct page **pages, int *nr)
a4fe3ce7
DG
546{
547 pte_t *ptep;
b30e7590 548 unsigned long sz = 1UL << hugepd_shift(hugepd);
39adfa54 549 unsigned long next;
a4fe3ce7
DG
550
551 ptep = hugepte_offset(hugepd, addr, pdshift);
552 do {
39adfa54 553 next = hugepte_addr_end(addr, end, sz);
a4fe3ce7
DG
554 if (!gup_hugepte(ptep, sz, addr, end, write, pages, nr))
555 return 0;
39adfa54 556 } while (ptep++, addr = next, addr != end);
a4fe3ce7
DG
557
558 return 1;
559}
1da177e4 560
76512959 561#ifdef CONFIG_PPC_MM_SLICES
1da177e4
LT
562unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
563 unsigned long len, unsigned long pgoff,
564 unsigned long flags)
565{
0d9ea754
JT
566 struct hstate *hstate = hstate_file(file);
567 int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
48f797de 568
aa0ab02b 569#ifdef CONFIG_PPC_RADIX_MMU
48483760
AK
570 if (radix_enabled())
571 return radix__hugetlb_get_unmapped_area(file, addr, len,
572 pgoff, flags);
aa0ab02b 573#endif
34d07177 574 return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1);
1da177e4 575}
76512959 576#endif
1da177e4 577
3340289d
MG
578unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
579{
25c29f9e 580#ifdef CONFIG_PPC_MM_SLICES
2f5f0dfd 581 /* With radix we don't use slice, so derive it from vma*/
014a32b3
NP
582 if (!radix_enabled()) {
583 unsigned int psize = get_slice_psize(vma->vm_mm, vma->vm_start);
584
2f5f0dfd 585 return 1UL << mmu_psize_to_shift(psize);
014a32b3 586 }
2f5f0dfd 587#endif
09135cc5 588 return vma_kernel_pagesize(vma);
41151e77
BB
589}
590
591static inline bool is_power_of_4(unsigned long x)
592{
593 if (is_power_of_2(x))
594 return (__ilog2(x) % 2) ? false : true;
595 return false;
3340289d
MG
596}
597
d1837cba 598static int __init add_huge_page_size(unsigned long long size)
4ec161cf 599{
d1837cba
DG
600 int shift = __ffs(size);
601 int mmu_psize;
a4fe3ce7 602
4ec161cf 603 /* Check that it is a page size supported by the hardware and
d1837cba 604 * that it fits within pagetable and slice limits. */
03bb2d65
CL
605 if (size <= PAGE_SIZE)
606 return -EINVAL;
4b914286 607#if defined(CONFIG_PPC_FSL_BOOK3E)
03bb2d65 608 if (!is_power_of_4(size))
41151e77 609 return -EINVAL;
4b914286 610#elif !defined(CONFIG_PPC_8xx)
03bb2d65 611 if (!is_power_of_2(size) || (shift > SLICE_HIGH_SHIFT))
d1837cba 612 return -EINVAL;
41151e77 613#endif
91224346 614
d1837cba
DG
615 if ((mmu_psize = shift_to_mmu_psize(shift)) < 0)
616 return -EINVAL;
617
a525108c
AK
618#ifdef CONFIG_PPC_BOOK3S_64
619 /*
620 * We need to make sure that for different page sizes reported by
621 * firmware we only add hugetlb support for page sizes that can be
622 * supported by linux page table layout.
623 * For now we have
624 * Radix: 2M
625 * Hash: 16M and 16G
626 */
627 if (radix_enabled()) {
40692eb5
AK
628 if (mmu_psize != MMU_PAGE_2M) {
629 if (cpu_has_feature(CPU_FTR_POWER9_DD1) ||
630 (mmu_psize != MMU_PAGE_1G))
631 return -EINVAL;
632 }
a525108c
AK
633 } else {
634 if (mmu_psize != MMU_PAGE_16M && mmu_psize != MMU_PAGE_16G)
635 return -EINVAL;
636 }
637#endif
638
d1837cba
DG
639 BUG_ON(mmu_psize_defs[mmu_psize].shift != shift);
640
641 /* Return if huge page size has already been setup */
642 if (size_to_hstate(size))
643 return 0;
644
645 hugetlb_add_hstate(shift - PAGE_SHIFT);
646
647 return 0;
4ec161cf
JT
648}
649
650static int __init hugepage_setup_sz(char *str)
651{
652 unsigned long long size;
4ec161cf
JT
653
654 size = memparse(str, &str);
655
71bf79cc
VT
656 if (add_huge_page_size(size) != 0) {
657 hugetlb_bad_size();
658 pr_err("Invalid huge page size specified(%llu)\n", size);
659 }
4ec161cf
JT
660
661 return 1;
662}
663__setup("hugepagesz=", hugepage_setup_sz);
664
41151e77
BB
665struct kmem_cache *hugepte_cache;
666static int __init hugetlbpage_init(void)
667{
668 int psize;
669
85975387
HB
670 if (hugetlb_disabled) {
671 pr_info("HugeTLB support is disabled!\n");
672 return 0;
673 }
674
4b914286 675#if !defined(CONFIG_PPC_FSL_BOOK3E) && !defined(CONFIG_PPC_8xx)
48483760 676 if (!radix_enabled() && !mmu_has_feature(MMU_FTR_16M_PAGE))
f10a04c0 677 return -ENODEV;
03bb2d65 678#endif
d1837cba
DG
679 for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
680 unsigned shift;
681 unsigned pdshift;
0d9ea754 682
d1837cba
DG
683 if (!mmu_psize_defs[psize].shift)
684 continue;
00df438e 685
d1837cba
DG
686 shift = mmu_psize_to_shift(psize);
687
6fa50483
AK
688#ifdef CONFIG_PPC_BOOK3S_64
689 if (shift > PGDIR_SHIFT)
d1837cba 690 continue;
6fa50483
AK
691 else if (shift > PUD_SHIFT)
692 pdshift = PGDIR_SHIFT;
693 else if (shift > PMD_SHIFT)
694 pdshift = PUD_SHIFT;
695 else
696 pdshift = PMD_SHIFT;
697#else
03bb2d65 698 if (shift < HUGEPD_PUD_SHIFT)
d1837cba 699 pdshift = PMD_SHIFT;
03bb2d65 700 else if (shift < HUGEPD_PGD_SHIFT)
d1837cba
DG
701 pdshift = PUD_SHIFT;
702 else
703 pdshift = PGDIR_SHIFT;
6fa50483
AK
704#endif
705
706 if (add_huge_page_size(1ULL << shift) < 0)
707 continue;
e2b3d202
AK
708 /*
709 * if we have pdshift and shift value same, we don't
710 * use pgt cache for hugepd.
711 */
bf5ca68d 712 if (pdshift > shift)
e2b3d202 713 pgtable_cache_add(pdshift - shift, NULL);
4b914286 714#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
03bb2d65
CL
715 else if (!hugepte_cache) {
716 /*
717 * Create a kmem cache for hugeptes. The bottom bits in
718 * the pte have size information encoded in them, so
719 * align them to allow this
720 */
721 hugepte_cache = kmem_cache_create("hugepte-cache",
722 sizeof(pte_t),
723 HUGEPD_SHIFT_MASK + 1,
724 0, NULL);
725 if (hugepte_cache == NULL)
726 panic("%s: Unable to create kmem cache "
727 "for hugeptes\n", __func__);
728
729 }
730#endif
0d9ea754 731 }
f10a04c0 732
4b914286
CL
733#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
734 /* Default hpage size = 4M on FSL_BOOK3E and 512k on 8xx */
03bb2d65
CL
735 if (mmu_psize_defs[MMU_PAGE_4M].shift)
736 HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_4M].shift;
4b914286
CL
737 else if (mmu_psize_defs[MMU_PAGE_512K].shift)
738 HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_512K].shift;
03bb2d65 739#else
d1837cba
DG
740 /* Set default large page size. Currently, we pick 16M or 1M
741 * depending on what is available
742 */
743 if (mmu_psize_defs[MMU_PAGE_16M].shift)
744 HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_16M].shift;
745 else if (mmu_psize_defs[MMU_PAGE_1M].shift)
746 HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_1M].shift;
48483760
AK
747 else if (mmu_psize_defs[MMU_PAGE_2M].shift)
748 HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_2M].shift;
03bb2d65 749#endif
f10a04c0
DG
750 return 0;
751}
03bb2d65 752
6f114281 753arch_initcall(hugetlbpage_init);
0895ecda
DG
754
755void flush_dcache_icache_hugepage(struct page *page)
756{
757 int i;
41151e77 758 void *start;
0895ecda
DG
759
760 BUG_ON(!PageCompound(page));
761
41151e77
BB
762 for (i = 0; i < (1UL << compound_order(page)); i++) {
763 if (!PageHighMem(page)) {
764 __flush_dcache_icache(page_address(page+i));
765 } else {
2480b208 766 start = kmap_atomic(page+i);
41151e77 767 __flush_dcache_icache(start);
2480b208 768 kunmap_atomic(start);
41151e77
BB
769 }
770 }
0895ecda 771}
29409997
AK
772
773#endif /* CONFIG_HUGETLB_PAGE */
774
775/*
776 * We have 4 cases for pgds and pmds:
777 * (1) invalid (all zeroes)
778 * (2) pointer to next table, as normal; bottom 6 bits == 0
6a119eae
AK
779 * (3) leaf pte for huge page _PAGE_PTE set
780 * (4) hugepd pointer, _PAGE_PTE = 0 and bits [2..6] indicate size of table
0ac52dd7
AK
781 *
782 * So long as we atomically load page table pointers we are safe against teardown,
783 * we can follow the address down to the the page and take a ref on it.
691e95fd 784 * This function need to be called with interrupts disabled. We use this variant
4e26bc4a 785 * when we have MSR[EE] = 0 but the paca->irq_soft_mask = IRQS_ENABLED
29409997 786 */
94171b19
AK
787pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
788 bool *is_thp, unsigned *hpage_shift)
29409997 789{
0ac52dd7
AK
790 pgd_t pgd, *pgdp;
791 pud_t pud, *pudp;
792 pmd_t pmd, *pmdp;
29409997
AK
793 pte_t *ret_pte;
794 hugepd_t *hpdp = NULL;
795 unsigned pdshift = PGDIR_SHIFT;
796
94171b19
AK
797 if (hpage_shift)
798 *hpage_shift = 0;
29409997 799
891121e6
AK
800 if (is_thp)
801 *is_thp = false;
802
0ac52dd7 803 pgdp = pgdir + pgd_index(ea);
4f9c53c8 804 pgd = READ_ONCE(*pgdp);
ac52ae47 805 /*
0ac52dd7
AK
806 * Always operate on the local stack value. This make sure the
807 * value don't get updated by a parallel THP split/collapse,
808 * page fault or a page unmap. The return pte_t * is still not
809 * stable. So should be checked there for above conditions.
ac52ae47 810 */
0ac52dd7 811 if (pgd_none(pgd))
ac52ae47 812 return NULL;
0ac52dd7
AK
813 else if (pgd_huge(pgd)) {
814 ret_pte = (pte_t *) pgdp;
29409997 815 goto out;
b30e7590 816 } else if (is_hugepd(__hugepd(pgd_val(pgd))))
0ac52dd7 817 hpdp = (hugepd_t *)&pgd;
ac52ae47 818 else {
0ac52dd7
AK
819 /*
820 * Even if we end up with an unmap, the pgtable will not
821 * be freed, because we do an rcu free and here we are
822 * irq disabled
823 */
29409997 824 pdshift = PUD_SHIFT;
0ac52dd7 825 pudp = pud_offset(&pgd, ea);
da1a288d 826 pud = READ_ONCE(*pudp);
29409997 827
0ac52dd7 828 if (pud_none(pud))
ac52ae47 829 return NULL;
0ac52dd7
AK
830 else if (pud_huge(pud)) {
831 ret_pte = (pte_t *) pudp;
29409997 832 goto out;
b30e7590 833 } else if (is_hugepd(__hugepd(pud_val(pud))))
0ac52dd7 834 hpdp = (hugepd_t *)&pud;
ac52ae47 835 else {
29409997 836 pdshift = PMD_SHIFT;
0ac52dd7 837 pmdp = pmd_offset(&pud, ea);
da1a288d 838 pmd = READ_ONCE(*pmdp);
ac52ae47
AK
839 /*
840 * A hugepage collapse is captured by pmd_none, because
841 * it mark the pmd none and do a hpte invalidate.
ac52ae47 842 */
7d6e7f7f 843 if (pmd_none(pmd))
ac52ae47 844 return NULL;
29409997 845
ebd31197 846 if (pmd_trans_huge(pmd) || pmd_devmap(pmd)) {
891121e6
AK
847 if (is_thp)
848 *is_thp = true;
849 ret_pte = (pte_t *) pmdp;
850 goto out;
851 }
852
853 if (pmd_huge(pmd)) {
0ac52dd7 854 ret_pte = (pte_t *) pmdp;
29409997 855 goto out;
b30e7590 856 } else if (is_hugepd(__hugepd(pmd_val(pmd))))
0ac52dd7 857 hpdp = (hugepd_t *)&pmd;
ac52ae47 858 else
0ac52dd7 859 return pte_offset_kernel(&pmd, ea);
29409997
AK
860 }
861 }
862 if (!hpdp)
863 return NULL;
864
b30e7590 865 ret_pte = hugepte_offset(*hpdp, ea, pdshift);
29409997
AK
866 pdshift = hugepd_shift(*hpdp);
867out:
94171b19
AK
868 if (hpage_shift)
869 *hpage_shift = pdshift;
29409997
AK
870 return ret_pte;
871}
94171b19 872EXPORT_SYMBOL_GPL(__find_linux_pte);
29409997
AK
873
874int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
875 unsigned long end, int write, struct page **pages, int *nr)
876{
29409997 877 unsigned long pte_end;
ddc58f27 878 struct page *head, *page;
29409997
AK
879 pte_t pte;
880 int refs;
881
882 pte_end = (addr + sz) & ~(sz-1);
883 if (pte_end < end)
884 end = pte_end;
885
4f9c53c8 886 pte = READ_ONCE(*ptep);
29409997 887
5fa5b16b 888 if (!pte_access_permitted(pte, write))
29409997
AK
889 return 0;
890
891 /* hugepages are never "special" */
892 VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
893
894 refs = 0;
895 head = pte_page(pte);
896
897 page = head + ((addr & (sz-1)) >> PAGE_SHIFT);
29409997
AK
898 do {
899 VM_BUG_ON(compound_head(page) != head);
900 pages[*nr] = page;
901 (*nr)++;
902 page++;
903 refs++;
904 } while (addr += PAGE_SIZE, addr != end);
905
906 if (!page_cache_add_speculative(head, refs)) {
907 *nr -= refs;
908 return 0;
909 }
910
911 if (unlikely(pte_val(pte) != pte_val(*ptep))) {
912 /* Could be optimized better */
913 *nr -= refs;
914 while (refs--)
915 put_page(head);
916 return 0;
917 }
918
29409997
AK
919 return 1;
920}