[linux-2.6-block.git] / arch / powerpc / mm / fsl_booke_mmu.c

/*
 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
 * E500 Book E processors.
 *
 * Copyright 2004 Freescale Semiconductor, Inc
 *
 * This file contains the routines for initializing the MMU
 * on the 4xx series of chips.
 *  -- paulus
 *
 *  Derived from arch/ppc/mm/init.c:
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
 *    Copyright (C) 1996 Paul Mackerras
 *
 *  Derived from "arch/i386/mm/init.c"
 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/stddef.h>
#include <linux/vmalloc.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/highmem.h>

#include <asm/pgalloc.h>
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/uaccess.h>
#include <asm/smp.h>
#include <asm/machdep.h>
#include <asm/setup.h>

#include "mmu_decl.h"

extern void loadcam_entry(unsigned int index);
unsigned int tlbcam_index;
static unsigned long __cam0, __cam1, __cam2;

#define NUM_TLBCAMS	(16)

struct tlbcam TLBCAM[NUM_TLBCAMS];

struct tlbcamrange {
   	unsigned long start;
	unsigned long limit;
	phys_addr_t phys;
} tlbcam_addrs[NUM_TLBCAMS];

extern unsigned int tlbcam_index;

/*
 * Return PA for this VA if it is mapped by a CAM, or 0
 */
unsigned long v_mapped_by_tlbcam(unsigned long va)
{
	int b;
	for (b = 0; b < tlbcam_index; ++b)
		if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
			return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
	return 0;
}

/*
 * Return VA for a given PA or 0 if not mapped
 */
unsigned long p_mapped_by_tlbcam(unsigned long pa)
{
	int b;
	for (b = 0; b < tlbcam_index; ++b)
		if (pa >= tlbcam_addrs[b].phys
	    	    && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
		              +tlbcam_addrs[b].phys)
			return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
	return 0;
}

/*
 * Set up one of the I/D BAT (block address translation) register pairs.
 * The parameters are not checked; in particular size must be a power
 * of 4 between 4k and 256M.
 */
void settlbcam(int index, unsigned long virt, phys_addr_t phys,
		unsigned int size, int flags, unsigned int pid)
{
	unsigned int tsize, lz;

	asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
	tsize = (21 - lz) / 2;

#ifdef CONFIG_SMP
	if ((flags & _PAGE_NO_CACHE) == 0)
		flags |= _PAGE_COHERENT;
#endif

	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
	TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
	TLBCAM[index].MAS2 = virt & PAGE_MASK;

	TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;

	TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR;
	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);

#ifndef CONFIG_KGDB /* want user access for breakpoints */
	if (flags & _PAGE_USER) {
	   TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
	   TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
	}
#else
	TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
#endif

	tlbcam_addrs[index].start = virt;
	tlbcam_addrs[index].limit = virt + size - 1;
	tlbcam_addrs[index].phys = phys;

	loadcam_entry(index);
}

void invalidate_tlbcam_entry(int index)
{
	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index);
	TLBCAM[index].MAS1 = ~MAS1_VALID;

	loadcam_entry(index);
}

void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
		unsigned long cam2)
{
	settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0);
	tlbcam_index++;
	if (cam1) {
		tlbcam_index++;
		settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1, _PAGE_KERNEL, 0);
	}
	if (cam2) {
		tlbcam_index++;
		settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1, cam2, _PAGE_KERNEL, 0);
	}
}

/*
 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
 */
void __init MMU_init_hw(void)
{
	flush_instruction_cache();
}

unsigned long __init mmu_mapin_ram(void)
{
	cam_mapin_ram(__cam0, __cam1, __cam2);

	return __cam0 + __cam1 + __cam2;
}


void __init
adjust_total_lowmem(void)
{
	phys_addr_t max_lowmem_size = __max_low_memory;
	phys_addr_t cam_max_size = 0x10000000;
	phys_addr_t ram;

	/* adjust CAM size to max_lowmem_size */
	if (max_lowmem_size < cam_max_size)
		cam_max_size = max_lowmem_size;

	/* adjust lowmem size to max_lowmem_size */
	ram = min(max_lowmem_size, total_lowmem);

	/* Calculate CAM values */
	__cam0 = 1UL << 2 * (__ilog2(ram) / 2);
	if (__cam0 > cam_max_size)
		__cam0 = cam_max_size;
	ram -= __cam0;
	if (ram) {
		__cam1 = 1UL << 2 * (__ilog2(ram) / 2);
		if (__cam1 > cam_max_size)
			__cam1 = cam_max_size;
		ram -= __cam1;
	}
	if (ram) {
		__cam2 = 1UL << 2 * (__ilog2(ram) / 2);
		if (__cam2 > cam_max_size)
			__cam2 = cam_max_size;
		ram -= __cam2;
	}

	printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb,"
			" CAM2=%ldMb residual: %ldMb\n",
			__cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
			(long int)((total_lowmem - __cam0 - __cam1 - __cam2)
				   >> 20));
	__max_low_memory = __cam0 + __cam1 + __cam2;
	__initial_memory_limit_addr = memstart_addr + __max_low_memory;
}
Commit	Line	Data
14cf11af	1	/*
4c8d3d99	2	* Modifications by Kumar Gala (galak@kernel.crashing.org) to support
14cf11af PM	3	* E500 Book E processors.
	4	*
	5	* Copyright 2004 Freescale Semiconductor, Inc
	6	*
	7	* This file contains the routines for initializing the MMU
	8	* on the 4xx series of chips.
	9	* -- paulus
	10	*
	11	* Derived from arch/ppc/mm/init.c:
	12	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	13	*
	14	* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
	15	* and Cort Dougan (PReP) (cort@cs.nmt.edu)
	16	* Copyright (C) 1996 Paul Mackerras
14cf11af PM	17	*
	18	* Derived from "arch/i386/mm/init.c"
	19	* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
	20	*
	21	* This program is free software; you can redistribute it and/or
	22	* modify it under the terms of the GNU General Public License
	23	* as published by the Free Software Foundation; either version
	24	* 2 of the License, or (at your option) any later version.
	25	*
	26	*/
	27
14cf11af PM	28	#include <linux/signal.h>
	29	#include <linux/sched.h>
	30	#include <linux/kernel.h>
	31	#include <linux/errno.h>
	32	#include <linux/string.h>
	33	#include <linux/types.h>
	34	#include <linux/ptrace.h>
	35	#include <linux/mman.h>
	36	#include <linux/mm.h>
	37	#include <linux/swap.h>
	38	#include <linux/stddef.h>
	39	#include <linux/vmalloc.h>
	40	#include <linux/init.h>
	41	#include <linux/delay.h>
	42	#include <linux/highmem.h>
	43
	44	#include <asm/pgalloc.h>
	45	#include <asm/prom.h>
	46	#include <asm/io.h>
	47	#include <asm/mmu_context.h>
	48	#include <asm/pgtable.h>
	49	#include <asm/mmu.h>
	50	#include <asm/uaccess.h>
	51	#include <asm/smp.h>
14cf11af PM	52	#include <asm/machdep.h>
	53	#include <asm/setup.h>
	54
99c62dd7 KG	55	#include "mmu_decl.h"
99c62dd7 KG	56
14cf11af PM	57	extern void loadcam_entry(unsigned int index);
14cf11af PM	58	unsigned int tlbcam_index;
14cf11af	59	static unsigned long __cam0, __cam1, __cam2;
14cf11af PM	60
	61	#define NUM_TLBCAMS (16)
	62
19f5465e	63	struct tlbcam TLBCAM[NUM_TLBCAMS];
14cf11af PM	64
	65	struct tlbcamrange {
	66	unsigned long start;
	67	unsigned long limit;
	68	phys_addr_t phys;
	69	} tlbcam_addrs[NUM_TLBCAMS];
	70
	71	extern unsigned int tlbcam_index;
	72
	73	/*
	74	* Return PA for this VA if it is mapped by a CAM, or 0
	75	*/
	76	unsigned long v_mapped_by_tlbcam(unsigned long va)
	77	{
	78	int b;
	79	for (b = 0; b < tlbcam_index; ++b)
	80	if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
	81	return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
	82	return 0;
	83	}
	84
	85	/*
	86	* Return VA for a given PA or 0 if not mapped
	87	*/
	88	unsigned long p_mapped_by_tlbcam(unsigned long pa)
	89	{
	90	int b;
	91	for (b = 0; b < tlbcam_index; ++b)
	92	if (pa >= tlbcam_addrs[b].phys
	93	&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
	94	+tlbcam_addrs[b].phys)
	95	return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
	96	return 0;
	97	}
	98
	99	/*
	100	* Set up one of the I/D BAT (block address translation) register pairs.
	101	* The parameters are not checked; in particular size must be a power
	102	* of 4 between 4k and 256M.
	103	*/
	104	void settlbcam(int index, unsigned long virt, phys_addr_t phys,
	105	unsigned int size, int flags, unsigned int pid)
	106	{
	107	unsigned int tsize, lz;
	108
	109	asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
	110	tsize = (21 - lz) / 2;
	111
	112	#ifdef CONFIG_SMP
	113	if ((flags & _PAGE_NO_CACHE) == 0)
	114	flags \|= _PAGE_COHERENT;
	115	#endif
	116
	117	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) \| MAS0_ESEL(index) \| MAS0_NV(index+1);
	118	TLBCAM[index].MAS1 = MAS1_VALID \| MAS1_IPROT \| MAS1_TSIZE(tsize) \| MAS1_TID(pid);
	119	TLBCAM[index].MAS2 = virt & PAGE_MASK;
	120
	121	TLBCAM[index].MAS2 \|= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
	122	TLBCAM[index].MAS2 \|= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
	123	TLBCAM[index].MAS2 \|= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
	124	TLBCAM[index].MAS2 \|= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
	125	TLBCAM[index].MAS2 \|= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
	126
	127	TLBCAM[index].MAS3 = (phys & PAGE_MASK) \| MAS3_SX \| MAS3_SR;
128	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_SW : 0);
129
130	#ifndef CONFIG_KGDB /* want user access for breakpoints */
131	if (flags & _PAGE_USER) {
132	TLBCAM[index].MAS3 \|= MAS3_UX \| MAS3_UR;
133	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_UW : 0);
134	}
135	#else
136	TLBCAM[index].MAS3 \|= MAS3_UX \| MAS3_UR;
137	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_UW : 0);
138	#endif
139
140	tlbcam_addrs[index].start = virt;
141	tlbcam_addrs[index].limit = virt + size - 1;
142	tlbcam_addrs[index].phys = phys;
143
144	loadcam_entry(index);
145	}
146
147	void invalidate_tlbcam_entry(int index)
148	{
149	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) \| MAS0_ESEL(index);
150	TLBCAM[index].MAS1 = ~MAS1_VALID;
151
152	loadcam_entry(index);
153	}
154
155	void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
156	unsigned long cam2)
157	{
99c62dd7	158	settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0);
14cf11af PM	159	tlbcam_index++;
	160	if (cam1) {
	161	tlbcam_index++;
99c62dd7	162	settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1, _PAGE_KERNEL, 0);
14cf11af PM	163	}
	164	if (cam2) {
	165	tlbcam_index++;
99c62dd7	166	settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1, cam2, _PAGE_KERNEL, 0);
14cf11af PM	167	}
	168	}
	169
	170	/*
	171	* MMU_init_hw does the chip-specific initialization of the MMU hardware.
	172	*/
	173	void __init MMU_init_hw(void)
	174	{
	175	flush_instruction_cache();
	176	}
	177
	178	unsigned long __init mmu_mapin_ram(void)
	179	{
	180	cam_mapin_ram(__cam0, __cam1, __cam2);
	181
	182	return __cam0 + __cam1 + __cam2;
	183	}
	184
	185
	186	void __init
	187	adjust_total_lowmem(void)
	188	{
0aef996b KG	189	phys_addr_t max_lowmem_size = __max_low_memory;
	190	phys_addr_t cam_max_size = 0x10000000;
	191	phys_addr_t ram;
14cf11af	192
0aef996b KG	193	/* adjust CAM size to max_lowmem_size */
	194	if (max_lowmem_size < cam_max_size)
	195	cam_max_size = max_lowmem_size;
14cf11af	196
0aef996b	197	/* adjust lowmem size to max_lowmem_size */
82331ab1	198	ram = min(max_lowmem_size, total_lowmem);
14cf11af PM	199
	200	/* Calculate CAM values */
	201	__cam0 = 1UL << 2 * (__ilog2(ram) / 2);
0aef996b KG	202	if (__cam0 > cam_max_size)
0aef996b KG	203	__cam0 = cam_max_size;
14cf11af PM	204	ram -= __cam0;
	205	if (ram) {
	206	__cam1 = 1UL << 2 * (__ilog2(ram) / 2);
0aef996b KG	207	if (__cam1 > cam_max_size)
0aef996b KG	208	__cam1 = cam_max_size;
14cf11af PM	209	ram -= __cam1;
	210	}
	211	if (ram) {
	212	__cam2 = 1UL << 2 * (__ilog2(ram) / 2);
0aef996b KG	213	if (__cam2 > cam_max_size)
0aef996b KG	214	__cam2 = cam_max_size;
14cf11af PM	215	ram -= __cam2;
	216	}
	217
	218	printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb,"
	219	" CAM2=%ldMb residual: %ldMb\n",
	220	__cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
82331ab1 BB	221	(long int)((total_lowmem - __cam0 - __cam1 - __cam2)
82331ab1 BB	222	>> 20));
0aef996b	223	__max_low_memory = __cam0 + __cam1 + __cam2;
09b5e63f	224	__initial_memory_limit_addr = memstart_addr + __max_low_memory;
14cf11af	225	}