Merge tag 'arc-v3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
[linux-2.6-block.git] / arch / powerpc / mm / fsl_booke_mmu.c
CommitLineData
14cf11af 1/*
4c8d3d99 2 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
14cf11af
PM
3 * E500 Book E processors.
4 *
78f62237 5 * Copyright 2004,2010 Freescale Semiconductor, Inc.
14cf11af
PM
6 *
7 * This file contains the routines for initializing the MMU
8 * on the 4xx series of chips.
9 * -- paulus
10 *
11 * Derived from arch/ppc/mm/init.c:
12 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
13 *
14 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
15 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
16 * Copyright (C) 1996 Paul Mackerras
14cf11af
PM
17 *
18 * Derived from "arch/i386/mm/init.c"
19 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
20 *
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version
24 * 2 of the License, or (at your option) any later version.
25 *
26 */
27
14cf11af
PM
28#include <linux/signal.h>
29#include <linux/sched.h>
30#include <linux/kernel.h>
31#include <linux/errno.h>
32#include <linux/string.h>
33#include <linux/types.h>
34#include <linux/ptrace.h>
35#include <linux/mman.h>
36#include <linux/mm.h>
37#include <linux/swap.h>
38#include <linux/stddef.h>
39#include <linux/vmalloc.h>
40#include <linux/init.h>
41#include <linux/delay.h>
42#include <linux/highmem.h>
e63075a3 43#include <linux/memblock.h>
14cf11af
PM
44
45#include <asm/pgalloc.h>
46#include <asm/prom.h>
47#include <asm/io.h>
48#include <asm/mmu_context.h>
49#include <asm/pgtable.h>
50#include <asm/mmu.h>
51#include <asm/uaccess.h>
52#include <asm/smp.h>
14cf11af
PM
53#include <asm/machdep.h>
54#include <asm/setup.h>
55
99c62dd7
KG
56#include "mmu_decl.h"
57
14cf11af 58unsigned int tlbcam_index;
14cf11af 59
78f62237
KG
60#define NUM_TLBCAMS (64)
61struct tlbcam TLBCAM[NUM_TLBCAMS];
14cf11af
PM
62
63struct tlbcamrange {
8b27f0b6 64 unsigned long start;
14cf11af
PM
65 unsigned long limit;
66 phys_addr_t phys;
67} tlbcam_addrs[NUM_TLBCAMS];
68
69extern unsigned int tlbcam_index;
70
8b27f0b6
KG
71unsigned long tlbcam_sz(int idx)
72{
73 return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
74}
75
14cf11af
PM
76/*
77 * Return PA for this VA if it is mapped by a CAM, or 0
78 */
6c24b174 79phys_addr_t v_mapped_by_tlbcam(unsigned long va)
14cf11af
PM
80{
81 int b;
82 for (b = 0; b < tlbcam_index; ++b)
83 if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
84 return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
85 return 0;
86}
87
88/*
89 * Return VA for a given PA or 0 if not mapped
90 */
6c24b174 91unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
14cf11af
PM
92{
93 int b;
94 for (b = 0; b < tlbcam_index; ++b)
95 if (pa >= tlbcam_addrs[b].phys
8b27f0b6 96 && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
14cf11af
PM
97 +tlbcam_addrs[b].phys)
98 return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
99 return 0;
100}
101
102/*
d10ac373 103 * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
4559424a
BB
104 * in particular size must be a power of 4 between 4k and the max supported by
105 * an implementation; max may further be limited by what can be represented in
106 * an unsigned long (for example, 32-bit implementations cannot support a 4GB
107 * size).
14cf11af 108 */
8b27f0b6
KG
109static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
110 unsigned long size, unsigned long flags, unsigned int pid)
14cf11af 111{
4559424a 112 unsigned int tsize;
14cf11af 113
4559424a 114 tsize = __ilog2(size) - 10;
14cf11af
PM
115
116#ifdef CONFIG_SMP
117 if ((flags & _PAGE_NO_CACHE) == 0)
118 flags |= _PAGE_COHERENT;
119#endif
120
121 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
122 TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
123 TLBCAM[index].MAS2 = virt & PAGE_MASK;
124
125 TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
126 TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
127 TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
128 TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
129 TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
130
8b27f0b6 131 TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
14cf11af 132 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
e8137341 133 if (mmu_has_feature(MMU_FTR_BIG_PHYS))
8b27f0b6 134 TLBCAM[index].MAS7 = (u64)phys >> 32;
14cf11af 135
92437d41
PG
136 /* Below is unlikely -- only for large user pages or similar */
137 if (pte_user(flags)) {
14cf11af
PM
138 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
139 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
140 }
14cf11af
PM
141
142 tlbcam_addrs[index].start = virt;
143 tlbcam_addrs[index].limit = virt + size - 1;
144 tlbcam_addrs[index].phys = phys;
145
146 loadcam_entry(index);
147}
148
1dc91c3e
KG
149unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
150 phys_addr_t phys)
151{
f0b8b341
KG
152 unsigned int camsize = __ilog2(ram);
153 unsigned int align = __ffs(virt | phys);
154 unsigned long max_cam;
155
156 if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
157 /* Convert (4^max) kB to (2^max) bytes */
158 max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
159 camsize &= ~1U;
160 align &= ~1U;
161 } else {
162 /* Convert (2^max) kB to (2^max) bytes */
163 max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
164 }
1dc91c3e
KG
165
166 if (camsize > align)
167 camsize = align;
168 if (camsize > max_cam)
169 camsize = max_cam;
170
171 return 1UL << camsize;
172}
173
8b27f0b6 174unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
14cf11af 175{
8b27f0b6 176 int i;
f88747e7
TP
177 unsigned long virt = PAGE_OFFSET;
178 phys_addr_t phys = memstart_addr;
8b27f0b6 179 unsigned long amount_mapped = 0;
f88747e7 180
8b27f0b6
KG
181 /* Calculate CAM values */
182 for (i = 0; ram && i < max_cam_idx; i++) {
8b27f0b6
KG
183 unsigned long cam_sz;
184
1dc91c3e 185 cam_sz = calc_cam_sz(ram, virt, phys);
8b27f0b6
KG
186 settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
187
188 ram -= cam_sz;
189 amount_mapped += cam_sz;
190 virt += cam_sz;
191 phys += cam_sz;
14cf11af 192 }
8b27f0b6
KG
193 tlbcam_index = i;
194
195 return amount_mapped;
196}
f88747e7 197
55fd766b
KG
198#ifdef CONFIG_PPC32
199
200#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
201#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
202#endif
203
a73611b6 204unsigned long __init mmu_mapin_ram(unsigned long top)
8b27f0b6
KG
205{
206 return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
14cf11af
PM
207}
208
209/*
210 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
211 */
212void __init MMU_init_hw(void)
213{
214 flush_instruction_cache();
215}
216
8b27f0b6 217void __init adjust_total_lowmem(void)
14cf11af 218{
8b27f0b6 219 unsigned long ram;
f88747e7 220 int i;
14cf11af 221
f88747e7
TP
222 /* adjust lowmem size to __max_low_memory */
223 ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
14cf11af 224
8b27f0b6 225 __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
c8f3570b 226
8b27f0b6
KG
227 pr_info("Memory CAM mapping: ");
228 for (i = 0; i < tlbcam_index - 1; i++)
229 pr_cont("%lu/", tlbcam_sz(i) >> 20);
230 pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
96a8bac5 231 (unsigned int)((total_lowmem - __max_low_memory) >> 20));
8b27f0b6 232
e63075a3 233 memblock_set_current_limit(memstart_addr + __max_low_memory);
14cf11af 234}
cd3db0c4
BH
235
236void setup_initial_memory_limit(phys_addr_t first_memblock_base,
237 phys_addr_t first_memblock_size)
238{
239 phys_addr_t limit = first_memblock_base + first_memblock_size;
240
241 /* 64M mapped initially according to head_fsl_booke.S */
242 memblock_set_current_limit(min_t(u64, limit, 0x04000000));
243}
55fd766b 244#endif