powerpc: Disable interrupts in 64-bit kernel FP and vector faults
[linux-2.6-block.git] / arch / powerpc / mm / fault.c
CommitLineData
14cf11af 1/*
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2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/i386/mm/fault.c"
6 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
7 *
8 * Modified by Cort Dougan and Paul Mackerras.
9 *
10 * Modified for PPC64 by Dave Engebretsen (engebret@ibm.com)
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
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18#include <linux/signal.h>
19#include <linux/sched.h>
20#include <linux/kernel.h>
21#include <linux/errno.h>
22#include <linux/string.h>
23#include <linux/types.h>
24#include <linux/ptrace.h>
25#include <linux/mman.h>
26#include <linux/mm.h>
27#include <linux/interrupt.h>
28#include <linux/highmem.h>
29#include <linux/module.h>
30#include <linux/kprobes.h>
1eeb66a1 31#include <linux/kdebug.h>
cdd6c482 32#include <linux/perf_event.h>
28b54990 33#include <linux/magic.h>
76462232 34#include <linux/ratelimit.h>
14cf11af 35
40900194 36#include <asm/firmware.h>
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37#include <asm/page.h>
38#include <asm/pgtable.h>
39#include <asm/mmu.h>
40#include <asm/mmu_context.h>
41#include <asm/system.h>
42#include <asm/uaccess.h>
43#include <asm/tlbflush.h>
14cf11af 44#include <asm/siginfo.h>
5efab4a0 45#include <mm/mmu_decl.h>
4f9e87c0 46
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47#include "icswx.h"
48
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49#ifdef CONFIG_KPROBES
50static inline int notify_page_fault(struct pt_regs *regs)
4f9e87c0 51{
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CH
52 int ret = 0;
53
54 /* kprobe_running() needs smp_processor_id() */
55 if (!user_mode(regs)) {
56 preempt_disable();
57 if (kprobe_running() && kprobe_fault_handler(regs, 11))
58 ret = 1;
59 preempt_enable();
60 }
4f9e87c0 61
9f90b997 62 return ret;
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63}
64#else
9f90b997 65static inline int notify_page_fault(struct pt_regs *regs)
4f9e87c0 66{
9f90b997 67 return 0;
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68}
69#endif
70
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71/*
72 * Check whether the instruction at regs->nip is a store using
73 * an update addressing form which will update r1.
74 */
75static int store_updates_sp(struct pt_regs *regs)
76{
77 unsigned int inst;
78
79 if (get_user(inst, (unsigned int __user *)regs->nip))
80 return 0;
81 /* check for 1 in the rA field */
82 if (((inst >> 16) & 0x1f) != 1)
83 return 0;
84 /* check major opcode */
85 switch (inst >> 26) {
86 case 37: /* stwu */
87 case 39: /* stbu */
88 case 45: /* sthu */
89 case 53: /* stfsu */
90 case 55: /* stfdu */
91 return 1;
92 case 62: /* std or stdu */
93 return (inst & 3) == 1;
94 case 31:
95 /* check minor opcode */
96 switch ((inst >> 1) & 0x3ff) {
97 case 181: /* stdux */
98 case 183: /* stwux */
99 case 247: /* stbux */
100 case 439: /* sthux */
101 case 695: /* stfsux */
102 case 759: /* stfdux */
103 return 1;
104 }
105 }
106 return 0;
107}
108
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109/*
110 * For 600- and 800-family processors, the error_code parameter is DSISR
111 * for a data fault, SRR1 for an instruction fault. For 400-family processors
112 * the error_code parameter is ESR for a data fault, 0 for an instruction
113 * fault.
114 * For 64-bit processors, the error_code parameter is
115 * - DSISR for a non-SLB data access fault,
116 * - SRR1 & 0x08000000 for a non-SLB instruction access fault
117 * - 0 any SLB fault.
118 *
119 * The return value is 0 if the fault was handled, or the signal
120 * number if this is a kernel fault that can't be handled here.
121 */
122int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
123 unsigned long error_code)
124{
125 struct vm_area_struct * vma;
126 struct mm_struct *mm = current->mm;
127 siginfo_t info;
128 int code = SEGV_MAPERR;
83c54070 129 int is_write = 0, ret;
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130 int trap = TRAP(regs);
131 int is_exec = trap == 0x400;
132
133#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
134 /*
135 * Fortunately the bit assignments in SRR1 for an instruction
136 * fault and DSISR for a data fault are mostly the same for the
137 * bits we are interested in. But there are some bits which
138 * indicate errors in DSISR but can validly be set in SRR1.
139 */
140 if (trap == 0x400)
141 error_code &= 0x48200000;
142 else
143 is_write = error_code & DSISR_ISSTORE;
144#else
145 is_write = error_code & ESR_DST;
146#endif /* CONFIG_4xx || CONFIG_BOOKE */
147
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148#ifdef CONFIG_PPC_ICSWX
149 /*
150 * we need to do this early because this "data storage
151 * interrupt" does not update the DAR/DEAR so we don't want to
152 * look at it
153 */
154 if (error_code & ICSWX_DSI_UCT) {
155 int ret;
156
157 ret = acop_handle_fault(regs, address, error_code);
158 if (ret)
159 return ret;
160 }
161#endif
162
9f90b997 163 if (notify_page_fault(regs))
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164 return 0;
165
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166 if (unlikely(debugger_fault_handler(regs)))
167 return 0;
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168
169 /* On a kernel SLB miss we can only check for a valid exception entry */
170 if (!user_mode(regs) && (address >= TASK_SIZE))
171 return SIGSEGV;
172
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173#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \
174 defined(CONFIG_PPC_BOOK3S_64))
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175 if (error_code & DSISR_DABRMATCH) {
176 /* DABR match */
bce6c5fd 177 do_dabr(regs, address, error_code);
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178 return 0;
179 }
9c7cc234 180#endif
14cf11af 181
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182 /* We restore the interrupt state now */
183 if (!arch_irq_disabled_regs(regs))
184 local_irq_enable();
185
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186 if (in_atomic() || mm == NULL) {
187 if (!user_mode(regs))
188 return SIGSEGV;
189 /* in_atomic() in user mode is really bad,
190 as is current->mm == NULL. */
df3c9019 191 printk(KERN_EMERG "Page fault in user mode with "
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192 "in_atomic() = %d mm = %p\n", in_atomic(), mm);
193 printk(KERN_EMERG "NIP = %lx MSR = %lx\n",
194 regs->nip, regs->msr);
195 die("Weird page fault", regs, SIGSEGV);
196 }
197
a8b0ca17 198 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
7dd1fcc2 199
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200 /* When running in the kernel we expect faults to occur only to
201 * addresses in user space. All other faults represent errors in the
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202 * kernel and should generate an OOPS. Unfortunately, in the case of an
203 * erroneous fault occurring in a code path which already holds mmap_sem
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204 * we will deadlock attempting to validate the fault against the
205 * address space. Luckily the kernel only validly references user
206 * space from well defined areas of code, which are listed in the
207 * exceptions table.
208 *
209 * As the vast majority of faults will be valid we will only perform
fc5266ea 210 * the source reference check when there is a possibility of a deadlock.
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211 * Attempt to lock the address space, if we cannot we then validate the
212 * source. If this is invalid we can skip the address space check,
213 * thus avoiding the deadlock.
214 */
215 if (!down_read_trylock(&mm->mmap_sem)) {
216 if (!user_mode(regs) && !search_exception_tables(regs->nip))
217 goto bad_area_nosemaphore;
218
219 down_read(&mm->mmap_sem);
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220 } else {
221 /*
222 * The above down_read_trylock() might have succeeded in
223 * which case we'll have missed the might_sleep() from
224 * down_read():
225 */
226 might_sleep();
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227 }
228
229 vma = find_vma(mm, address);
230 if (!vma)
231 goto bad_area;
232 if (vma->vm_start <= address)
233 goto good_area;
234 if (!(vma->vm_flags & VM_GROWSDOWN))
235 goto bad_area;
236
237 /*
238 * N.B. The POWER/Open ABI allows programs to access up to
239 * 288 bytes below the stack pointer.
240 * The kernel signal delivery code writes up to about 1.5kB
241 * below the stack pointer (r1) before decrementing it.
242 * The exec code can write slightly over 640kB to the stack
243 * before setting the user r1. Thus we allow the stack to
244 * expand to 1MB without further checks.
245 */
246 if (address + 0x100000 < vma->vm_end) {
247 /* get user regs even if this fault is in kernel mode */
248 struct pt_regs *uregs = current->thread.regs;
249 if (uregs == NULL)
250 goto bad_area;
251
252 /*
253 * A user-mode access to an address a long way below
254 * the stack pointer is only valid if the instruction
255 * is one which would update the stack pointer to the
256 * address accessed if the instruction completed,
257 * i.e. either stwu rs,n(r1) or stwux rs,r1,rb
258 * (or the byte, halfword, float or double forms).
259 *
260 * If we don't check this then any write to the area
261 * between the last mapped region and the stack will
262 * expand the stack rather than segfaulting.
263 */
264 if (address + 2048 < uregs->gpr[1]
265 && (!user_mode(regs) || !store_updates_sp(regs)))
266 goto bad_area;
267 }
268 if (expand_stack(vma, address))
269 goto bad_area;
270
271good_area:
272 code = SEGV_ACCERR;
273#if defined(CONFIG_6xx)
274 if (error_code & 0x95700000)
275 /* an error such as lwarx to I/O controller space,
276 address matching DABR, eciwx, etc. */
277 goto bad_area;
278#endif /* CONFIG_6xx */
279#if defined(CONFIG_8xx)
5efab4a0
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280 /* 8xx sometimes need to load a invalid/non-present TLBs.
281 * These must be invalidated separately as linux mm don't.
282 */
283 if (error_code & 0x40000000) /* no translation? */
284 _tlbil_va(address, 0, 0, 0);
285
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286 /* The MPC8xx seems to always set 0x80000000, which is
287 * "undefined". Of those that can be set, this is the only
288 * one which seems bad.
289 */
290 if (error_code & 0x10000000)
291 /* Guarded storage error. */
292 goto bad_area;
293#endif /* CONFIG_8xx */
294
295 if (is_exec) {
8d30c14c
BH
296#ifdef CONFIG_PPC_STD_MMU
297 /* Protection fault on exec go straight to failure on
298 * Hash based MMUs as they either don't support per-page
299 * execute permission, or if they do, it's handled already
300 * at the hash level. This test would probably have to
301 * be removed if we change the way this works to make hash
302 * processors use the same I/D cache coherency mechanism
303 * as embedded.
304 */
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305 if (error_code & DSISR_PROTFAULT)
306 goto bad_area;
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307#endif /* CONFIG_PPC_STD_MMU */
308
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309 /*
310 * Allow execution from readable areas if the MMU does not
311 * provide separate controls over reading and executing.
8d30c14c
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312 *
313 * Note: That code used to not be enabled for 4xx/BookE.
314 * It is now as I/D cache coherency for these is done at
315 * set_pte_at() time and I see no reason why the test
316 * below wouldn't be valid on those processors. This -may-
317 * break programs compiled with a really old ABI though.
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318 */
319 if (!(vma->vm_flags & VM_EXEC) &&
320 (cpu_has_feature(CPU_FTR_NOEXECUTE) ||
321 !(vma->vm_flags & (VM_READ | VM_WRITE))))
14cf11af 322 goto bad_area;
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323 /* a write */
324 } else if (is_write) {
325 if (!(vma->vm_flags & VM_WRITE))
326 goto bad_area;
327 /* a read */
328 } else {
329 /* protection fault */
330 if (error_code & 0x08000000)
331 goto bad_area;
df67b3da 332 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
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333 goto bad_area;
334 }
335
336 /*
337 * If for any reason at all we couldn't handle the fault,
338 * make sure we exit gracefully rather than endlessly redo
339 * the fault.
340 */
d06063cc 341 ret = handle_mm_fault(mm, vma, address, is_write ? FAULT_FLAG_WRITE : 0);
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NP
342 if (unlikely(ret & VM_FAULT_ERROR)) {
343 if (ret & VM_FAULT_OOM)
344 goto out_of_memory;
345 else if (ret & VM_FAULT_SIGBUS)
346 goto do_sigbus;
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347 BUG();
348 }
40900194 349 if (ret & VM_FAULT_MAJOR) {
83c54070 350 current->maj_flt++;
a8b0ca17 351 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
78f13e95 352 regs, address);
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353#ifdef CONFIG_PPC_SMLPAR
354 if (firmware_has_feature(FW_FEATURE_CMO)) {
355 preempt_disable();
a6326e98 356 get_lppaca()->page_ins += (1 << PAGE_FACTOR);
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357 preempt_enable();
358 }
359#endif
ac17dc8e 360 } else {
83c54070 361 current->min_flt++;
a8b0ca17 362 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
78f13e95 363 regs, address);
ac17dc8e 364 }
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365 up_read(&mm->mmap_sem);
366 return 0;
367
368bad_area:
369 up_read(&mm->mmap_sem);
370
371bad_area_nosemaphore:
372 /* User mode accesses cause a SIGSEGV */
373 if (user_mode(regs)) {
374 _exception(SIGSEGV, regs, code, address);
375 return 0;
376 }
377
76462232
CD
378 if (is_exec && (error_code & DSISR_PROTFAULT))
379 printk_ratelimited(KERN_CRIT "kernel tried to execute NX-protected"
380 " page (%lx) - exploit attempt? (uid: %d)\n",
381 address, current_uid());
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382
383 return SIGSEGV;
384
385/*
386 * We ran out of memory, or some other thing happened to us that made
387 * us unable to handle the page fault gracefully.
388 */
389out_of_memory:
390 up_read(&mm->mmap_sem);
e460c2c9
BH
391 if (!user_mode(regs))
392 return SIGKILL;
393 pagefault_out_of_memory();
394 return 0;
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395
396do_sigbus:
397 up_read(&mm->mmap_sem);
398 if (user_mode(regs)) {
399 info.si_signo = SIGBUS;
400 info.si_errno = 0;
401 info.si_code = BUS_ADRERR;
402 info.si_addr = (void __user *)address;
403 force_sig_info(SIGBUS, &info, current);
404 return 0;
405 }
406 return SIGBUS;
407}
408
409/*
410 * bad_page_fault is called when we have a bad access from the kernel.
411 * It is called from the DSI and ISI handlers in head.S and from some
412 * of the procedures in traps.c.
413 */
414void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
415{
416 const struct exception_table_entry *entry;
28b54990 417 unsigned long *stackend;
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418
419 /* Are we prepared to handle this fault? */
420 if ((entry = search_exception_tables(regs->nip)) != NULL) {
421 regs->nip = entry->fixup;
422 return;
423 }
424
425 /* kernel has accessed a bad area */
723925b7 426
723925b7 427 switch (regs->trap) {
a416dd8d
ME
428 case 0x300:
429 case 0x380:
430 printk(KERN_ALERT "Unable to handle kernel paging request for "
431 "data at address 0x%08lx\n", regs->dar);
432 break;
433 case 0x400:
434 case 0x480:
435 printk(KERN_ALERT "Unable to handle kernel paging request for "
436 "instruction fetch\n");
437 break;
438 default:
439 printk(KERN_ALERT "Unable to handle kernel paging request for "
440 "unknown fault\n");
441 break;
723925b7
OJ
442 }
443 printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
444 regs->nip);
445
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AB
446 stackend = end_of_stack(current);
447 if (current != &init_task && *stackend != STACK_END_MAGIC)
448 printk(KERN_ALERT "Thread overran stack, or stack corrupted\n");
449
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450 die("Kernel access of bad area", regs, sig);
451}