Commit | Line | Data |
---|---|---|
14cf11af | 1 | /* |
14cf11af PM |
2 | * PowerPC version |
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
4 | * | |
5 | * Derived from "arch/i386/mm/fault.c" | |
6 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | |
7 | * | |
8 | * Modified by Cort Dougan and Paul Mackerras. | |
9 | * | |
10 | * Modified for PPC64 by Dave Engebretsen (engebret@ibm.com) | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
14cf11af PM |
18 | #include <linux/signal.h> |
19 | #include <linux/sched.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/string.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/ptrace.h> | |
25 | #include <linux/mman.h> | |
26 | #include <linux/mm.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/highmem.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/kprobes.h> | |
1eeb66a1 | 31 | #include <linux/kdebug.h> |
cdd6c482 | 32 | #include <linux/perf_event.h> |
14cf11af | 33 | |
40900194 | 34 | #include <asm/firmware.h> |
14cf11af PM |
35 | #include <asm/page.h> |
36 | #include <asm/pgtable.h> | |
37 | #include <asm/mmu.h> | |
38 | #include <asm/mmu_context.h> | |
39 | #include <asm/system.h> | |
40 | #include <asm/uaccess.h> | |
41 | #include <asm/tlbflush.h> | |
14cf11af | 42 | #include <asm/siginfo.h> |
5efab4a0 | 43 | #include <mm/mmu_decl.h> |
4f9e87c0 | 44 | |
9f90b997 CH |
45 | #ifdef CONFIG_KPROBES |
46 | static inline int notify_page_fault(struct pt_regs *regs) | |
4f9e87c0 | 47 | { |
9f90b997 CH |
48 | int ret = 0; |
49 | ||
50 | /* kprobe_running() needs smp_processor_id() */ | |
51 | if (!user_mode(regs)) { | |
52 | preempt_disable(); | |
53 | if (kprobe_running() && kprobe_fault_handler(regs, 11)) | |
54 | ret = 1; | |
55 | preempt_enable(); | |
56 | } | |
4f9e87c0 | 57 | |
9f90b997 | 58 | return ret; |
4f9e87c0 AK |
59 | } |
60 | #else | |
9f90b997 | 61 | static inline int notify_page_fault(struct pt_regs *regs) |
4f9e87c0 | 62 | { |
9f90b997 | 63 | return 0; |
4f9e87c0 AK |
64 | } |
65 | #endif | |
66 | ||
14cf11af PM |
67 | /* |
68 | * Check whether the instruction at regs->nip is a store using | |
69 | * an update addressing form which will update r1. | |
70 | */ | |
71 | static int store_updates_sp(struct pt_regs *regs) | |
72 | { | |
73 | unsigned int inst; | |
74 | ||
75 | if (get_user(inst, (unsigned int __user *)regs->nip)) | |
76 | return 0; | |
77 | /* check for 1 in the rA field */ | |
78 | if (((inst >> 16) & 0x1f) != 1) | |
79 | return 0; | |
80 | /* check major opcode */ | |
81 | switch (inst >> 26) { | |
82 | case 37: /* stwu */ | |
83 | case 39: /* stbu */ | |
84 | case 45: /* sthu */ | |
85 | case 53: /* stfsu */ | |
86 | case 55: /* stfdu */ | |
87 | return 1; | |
88 | case 62: /* std or stdu */ | |
89 | return (inst & 3) == 1; | |
90 | case 31: | |
91 | /* check minor opcode */ | |
92 | switch ((inst >> 1) & 0x3ff) { | |
93 | case 181: /* stdux */ | |
94 | case 183: /* stwux */ | |
95 | case 247: /* stbux */ | |
96 | case 439: /* sthux */ | |
97 | case 695: /* stfsux */ | |
98 | case 759: /* stfdux */ | |
99 | return 1; | |
100 | } | |
101 | } | |
102 | return 0; | |
103 | } | |
104 | ||
14cf11af PM |
105 | /* |
106 | * For 600- and 800-family processors, the error_code parameter is DSISR | |
107 | * for a data fault, SRR1 for an instruction fault. For 400-family processors | |
108 | * the error_code parameter is ESR for a data fault, 0 for an instruction | |
109 | * fault. | |
110 | * For 64-bit processors, the error_code parameter is | |
111 | * - DSISR for a non-SLB data access fault, | |
112 | * - SRR1 & 0x08000000 for a non-SLB instruction access fault | |
113 | * - 0 any SLB fault. | |
114 | * | |
115 | * The return value is 0 if the fault was handled, or the signal | |
116 | * number if this is a kernel fault that can't be handled here. | |
117 | */ | |
118 | int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address, | |
119 | unsigned long error_code) | |
120 | { | |
121 | struct vm_area_struct * vma; | |
122 | struct mm_struct *mm = current->mm; | |
123 | siginfo_t info; | |
124 | int code = SEGV_MAPERR; | |
83c54070 | 125 | int is_write = 0, ret; |
14cf11af PM |
126 | int trap = TRAP(regs); |
127 | int is_exec = trap == 0x400; | |
128 | ||
129 | #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) | |
130 | /* | |
131 | * Fortunately the bit assignments in SRR1 for an instruction | |
132 | * fault and DSISR for a data fault are mostly the same for the | |
133 | * bits we are interested in. But there are some bits which | |
134 | * indicate errors in DSISR but can validly be set in SRR1. | |
135 | */ | |
136 | if (trap == 0x400) | |
137 | error_code &= 0x48200000; | |
138 | else | |
139 | is_write = error_code & DSISR_ISSTORE; | |
140 | #else | |
141 | is_write = error_code & ESR_DST; | |
142 | #endif /* CONFIG_4xx || CONFIG_BOOKE */ | |
143 | ||
9f90b997 | 144 | if (notify_page_fault(regs)) |
14cf11af PM |
145 | return 0; |
146 | ||
c3b75bd7 MN |
147 | if (unlikely(debugger_fault_handler(regs))) |
148 | return 0; | |
14cf11af PM |
149 | |
150 | /* On a kernel SLB miss we can only check for a valid exception entry */ | |
151 | if (!user_mode(regs) && (address >= TASK_SIZE)) | |
152 | return SIGSEGV; | |
153 | ||
9c7cc234 P |
154 | #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \ |
155 | defined(CONFIG_PPC_BOOK3S_64)) | |
14cf11af PM |
156 | if (error_code & DSISR_DABRMATCH) { |
157 | /* DABR match */ | |
bce6c5fd | 158 | do_dabr(regs, address, error_code); |
14cf11af PM |
159 | return 0; |
160 | } | |
9c7cc234 | 161 | #endif |
14cf11af PM |
162 | |
163 | if (in_atomic() || mm == NULL) { | |
164 | if (!user_mode(regs)) | |
165 | return SIGSEGV; | |
166 | /* in_atomic() in user mode is really bad, | |
167 | as is current->mm == NULL. */ | |
df3c9019 | 168 | printk(KERN_EMERG "Page fault in user mode with " |
14cf11af PM |
169 | "in_atomic() = %d mm = %p\n", in_atomic(), mm); |
170 | printk(KERN_EMERG "NIP = %lx MSR = %lx\n", | |
171 | regs->nip, regs->msr); | |
172 | die("Weird page fault", regs, SIGSEGV); | |
173 | } | |
174 | ||
cdd6c482 | 175 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); |
7dd1fcc2 | 176 | |
14cf11af PM |
177 | /* When running in the kernel we expect faults to occur only to |
178 | * addresses in user space. All other faults represent errors in the | |
fc5266ea AB |
179 | * kernel and should generate an OOPS. Unfortunately, in the case of an |
180 | * erroneous fault occurring in a code path which already holds mmap_sem | |
14cf11af PM |
181 | * we will deadlock attempting to validate the fault against the |
182 | * address space. Luckily the kernel only validly references user | |
183 | * space from well defined areas of code, which are listed in the | |
184 | * exceptions table. | |
185 | * | |
186 | * As the vast majority of faults will be valid we will only perform | |
fc5266ea | 187 | * the source reference check when there is a possibility of a deadlock. |
14cf11af PM |
188 | * Attempt to lock the address space, if we cannot we then validate the |
189 | * source. If this is invalid we can skip the address space check, | |
190 | * thus avoiding the deadlock. | |
191 | */ | |
192 | if (!down_read_trylock(&mm->mmap_sem)) { | |
193 | if (!user_mode(regs) && !search_exception_tables(regs->nip)) | |
194 | goto bad_area_nosemaphore; | |
195 | ||
196 | down_read(&mm->mmap_sem); | |
197 | } | |
198 | ||
199 | vma = find_vma(mm, address); | |
200 | if (!vma) | |
201 | goto bad_area; | |
202 | if (vma->vm_start <= address) | |
203 | goto good_area; | |
204 | if (!(vma->vm_flags & VM_GROWSDOWN)) | |
205 | goto bad_area; | |
206 | ||
207 | /* | |
208 | * N.B. The POWER/Open ABI allows programs to access up to | |
209 | * 288 bytes below the stack pointer. | |
210 | * The kernel signal delivery code writes up to about 1.5kB | |
211 | * below the stack pointer (r1) before decrementing it. | |
212 | * The exec code can write slightly over 640kB to the stack | |
213 | * before setting the user r1. Thus we allow the stack to | |
214 | * expand to 1MB without further checks. | |
215 | */ | |
216 | if (address + 0x100000 < vma->vm_end) { | |
217 | /* get user regs even if this fault is in kernel mode */ | |
218 | struct pt_regs *uregs = current->thread.regs; | |
219 | if (uregs == NULL) | |
220 | goto bad_area; | |
221 | ||
222 | /* | |
223 | * A user-mode access to an address a long way below | |
224 | * the stack pointer is only valid if the instruction | |
225 | * is one which would update the stack pointer to the | |
226 | * address accessed if the instruction completed, | |
227 | * i.e. either stwu rs,n(r1) or stwux rs,r1,rb | |
228 | * (or the byte, halfword, float or double forms). | |
229 | * | |
230 | * If we don't check this then any write to the area | |
231 | * between the last mapped region and the stack will | |
232 | * expand the stack rather than segfaulting. | |
233 | */ | |
234 | if (address + 2048 < uregs->gpr[1] | |
235 | && (!user_mode(regs) || !store_updates_sp(regs))) | |
236 | goto bad_area; | |
237 | } | |
238 | if (expand_stack(vma, address)) | |
239 | goto bad_area; | |
240 | ||
241 | good_area: | |
242 | code = SEGV_ACCERR; | |
243 | #if defined(CONFIG_6xx) | |
244 | if (error_code & 0x95700000) | |
245 | /* an error such as lwarx to I/O controller space, | |
246 | address matching DABR, eciwx, etc. */ | |
247 | goto bad_area; | |
248 | #endif /* CONFIG_6xx */ | |
249 | #if defined(CONFIG_8xx) | |
5efab4a0 JT |
250 | /* 8xx sometimes need to load a invalid/non-present TLBs. |
251 | * These must be invalidated separately as linux mm don't. | |
252 | */ | |
253 | if (error_code & 0x40000000) /* no translation? */ | |
254 | _tlbil_va(address, 0, 0, 0); | |
255 | ||
14cf11af PM |
256 | /* The MPC8xx seems to always set 0x80000000, which is |
257 | * "undefined". Of those that can be set, this is the only | |
258 | * one which seems bad. | |
259 | */ | |
260 | if (error_code & 0x10000000) | |
261 | /* Guarded storage error. */ | |
262 | goto bad_area; | |
263 | #endif /* CONFIG_8xx */ | |
264 | ||
265 | if (is_exec) { | |
8d30c14c BH |
266 | #ifdef CONFIG_PPC_STD_MMU |
267 | /* Protection fault on exec go straight to failure on | |
268 | * Hash based MMUs as they either don't support per-page | |
269 | * execute permission, or if they do, it's handled already | |
270 | * at the hash level. This test would probably have to | |
271 | * be removed if we change the way this works to make hash | |
272 | * processors use the same I/D cache coherency mechanism | |
273 | * as embedded. | |
274 | */ | |
14cf11af PM |
275 | if (error_code & DSISR_PROTFAULT) |
276 | goto bad_area; | |
8d30c14c BH |
277 | #endif /* CONFIG_PPC_STD_MMU */ |
278 | ||
08ae6cc1 PM |
279 | /* |
280 | * Allow execution from readable areas if the MMU does not | |
281 | * provide separate controls over reading and executing. | |
8d30c14c BH |
282 | * |
283 | * Note: That code used to not be enabled for 4xx/BookE. | |
284 | * It is now as I/D cache coherency for these is done at | |
285 | * set_pte_at() time and I see no reason why the test | |
286 | * below wouldn't be valid on those processors. This -may- | |
287 | * break programs compiled with a really old ABI though. | |
08ae6cc1 PM |
288 | */ |
289 | if (!(vma->vm_flags & VM_EXEC) && | |
290 | (cpu_has_feature(CPU_FTR_NOEXECUTE) || | |
291 | !(vma->vm_flags & (VM_READ | VM_WRITE)))) | |
14cf11af | 292 | goto bad_area; |
14cf11af PM |
293 | /* a write */ |
294 | } else if (is_write) { | |
295 | if (!(vma->vm_flags & VM_WRITE)) | |
296 | goto bad_area; | |
297 | /* a read */ | |
298 | } else { | |
299 | /* protection fault */ | |
300 | if (error_code & 0x08000000) | |
301 | goto bad_area; | |
df67b3da | 302 | if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) |
14cf11af PM |
303 | goto bad_area; |
304 | } | |
305 | ||
306 | /* | |
307 | * If for any reason at all we couldn't handle the fault, | |
308 | * make sure we exit gracefully rather than endlessly redo | |
309 | * the fault. | |
310 | */ | |
d06063cc | 311 | ret = handle_mm_fault(mm, vma, address, is_write ? FAULT_FLAG_WRITE : 0); |
83c54070 NP |
312 | if (unlikely(ret & VM_FAULT_ERROR)) { |
313 | if (ret & VM_FAULT_OOM) | |
314 | goto out_of_memory; | |
315 | else if (ret & VM_FAULT_SIGBUS) | |
316 | goto do_sigbus; | |
14cf11af PM |
317 | BUG(); |
318 | } | |
40900194 | 319 | if (ret & VM_FAULT_MAJOR) { |
83c54070 | 320 | current->maj_flt++; |
cdd6c482 | 321 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0, |
78f13e95 | 322 | regs, address); |
40900194 BK |
323 | #ifdef CONFIG_PPC_SMLPAR |
324 | if (firmware_has_feature(FW_FEATURE_CMO)) { | |
325 | preempt_disable(); | |
a6326e98 | 326 | get_lppaca()->page_ins += (1 << PAGE_FACTOR); |
40900194 BK |
327 | preempt_enable(); |
328 | } | |
329 | #endif | |
ac17dc8e | 330 | } else { |
83c54070 | 331 | current->min_flt++; |
cdd6c482 | 332 | perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0, |
78f13e95 | 333 | regs, address); |
ac17dc8e | 334 | } |
14cf11af PM |
335 | up_read(&mm->mmap_sem); |
336 | return 0; | |
337 | ||
338 | bad_area: | |
339 | up_read(&mm->mmap_sem); | |
340 | ||
341 | bad_area_nosemaphore: | |
342 | /* User mode accesses cause a SIGSEGV */ | |
343 | if (user_mode(regs)) { | |
344 | _exception(SIGSEGV, regs, code, address); | |
345 | return 0; | |
346 | } | |
347 | ||
348 | if (is_exec && (error_code & DSISR_PROTFAULT) | |
349 | && printk_ratelimit()) | |
350 | printk(KERN_CRIT "kernel tried to execute NX-protected" | |
351 | " page (%lx) - exploit attempt? (uid: %d)\n", | |
1330deb0 | 352 | address, current_uid()); |
14cf11af PM |
353 | |
354 | return SIGSEGV; | |
355 | ||
356 | /* | |
357 | * We ran out of memory, or some other thing happened to us that made | |
358 | * us unable to handle the page fault gracefully. | |
359 | */ | |
360 | out_of_memory: | |
361 | up_read(&mm->mmap_sem); | |
e460c2c9 BH |
362 | if (!user_mode(regs)) |
363 | return SIGKILL; | |
364 | pagefault_out_of_memory(); | |
365 | return 0; | |
14cf11af PM |
366 | |
367 | do_sigbus: | |
368 | up_read(&mm->mmap_sem); | |
369 | if (user_mode(regs)) { | |
370 | info.si_signo = SIGBUS; | |
371 | info.si_errno = 0; | |
372 | info.si_code = BUS_ADRERR; | |
373 | info.si_addr = (void __user *)address; | |
374 | force_sig_info(SIGBUS, &info, current); | |
375 | return 0; | |
376 | } | |
377 | return SIGBUS; | |
378 | } | |
379 | ||
380 | /* | |
381 | * bad_page_fault is called when we have a bad access from the kernel. | |
382 | * It is called from the DSI and ISI handlers in head.S and from some | |
383 | * of the procedures in traps.c. | |
384 | */ | |
385 | void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig) | |
386 | { | |
387 | const struct exception_table_entry *entry; | |
388 | ||
389 | /* Are we prepared to handle this fault? */ | |
390 | if ((entry = search_exception_tables(regs->nip)) != NULL) { | |
391 | regs->nip = entry->fixup; | |
392 | return; | |
393 | } | |
394 | ||
395 | /* kernel has accessed a bad area */ | |
723925b7 | 396 | |
723925b7 | 397 | switch (regs->trap) { |
a416dd8d ME |
398 | case 0x300: |
399 | case 0x380: | |
400 | printk(KERN_ALERT "Unable to handle kernel paging request for " | |
401 | "data at address 0x%08lx\n", regs->dar); | |
402 | break; | |
403 | case 0x400: | |
404 | case 0x480: | |
405 | printk(KERN_ALERT "Unable to handle kernel paging request for " | |
406 | "instruction fetch\n"); | |
407 | break; | |
408 | default: | |
409 | printk(KERN_ALERT "Unable to handle kernel paging request for " | |
410 | "unknown fault\n"); | |
411 | break; | |
723925b7 OJ |
412 | } |
413 | printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n", | |
414 | regs->nip); | |
415 | ||
14cf11af PM |
416 | die("Kernel access of bad area", regs, sig); |
417 | } |