Commit | Line | Data |
---|---|---|
2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * native hashtable management. | |
4 | * | |
5 | * SMP scalability work: | |
6 | * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM | |
1da177e4 | 7 | */ |
3c726f8d BH |
8 | |
9 | #undef DEBUG_LOW | |
10 | ||
1da177e4 LT |
11 | #include <linux/spinlock.h> |
12 | #include <linux/bitops.h> | |
beacc6da | 13 | #include <linux/of.h> |
4e287e65 | 14 | #include <linux/processor.h> |
1da177e4 LT |
15 | #include <linux/threads.h> |
16 | #include <linux/smp.h> | |
65fddcfc | 17 | #include <linux/pgtable.h> |
1da177e4 | 18 | |
1da177e4 LT |
19 | #include <asm/machdep.h> |
20 | #include <asm/mmu.h> | |
21 | #include <asm/mmu_context.h> | |
0428491c | 22 | #include <asm/trace.h> |
1da177e4 LT |
23 | #include <asm/tlb.h> |
24 | #include <asm/cputable.h> | |
3c726f8d | 25 | #include <asm/udbg.h> |
71bf08b6 | 26 | #include <asm/kexec.h> |
60dbf438 | 27 | #include <asm/ppc-opcode.h> |
2c86cd18 | 28 | #include <asm/feature-fixups.h> |
3c726f8d | 29 | |
ec249dd8 | 30 | #include <misc/cxl-base.h> |
4c6d9acc | 31 | |
3c726f8d BH |
32 | #ifdef DEBUG_LOW |
33 | #define DBG_LOW(fmt...) udbg_printf(fmt) | |
34 | #else | |
35 | #define DBG_LOW(fmt...) | |
36 | #endif | |
1da177e4 | 37 | |
12f04f2b | 38 | #ifdef __BIG_ENDIAN__ |
1da177e4 | 39 | #define HPTE_LOCK_BIT 3 |
12f04f2b AB |
40 | #else |
41 | #define HPTE_LOCK_BIT (56+3) | |
42 | #endif | |
1da177e4 | 43 | |
d667edc0 | 44 | static DEFINE_RAW_SPINLOCK(native_tlbie_lock); |
1da177e4 | 45 | |
be83d548 NP |
46 | #ifdef CONFIG_LOCKDEP |
47 | static struct lockdep_map hpte_lock_map = | |
48 | STATIC_LOCKDEP_MAP_INIT("hpte_lock", &hpte_lock_map); | |
49 | ||
50 | static void acquire_hpte_lock(void) | |
51 | { | |
52 | lock_map_acquire(&hpte_lock_map); | |
53 | } | |
54 | ||
55 | static void release_hpte_lock(void) | |
56 | { | |
57 | lock_map_release(&hpte_lock_map); | |
58 | } | |
59 | #else | |
60 | static void acquire_hpte_lock(void) | |
61 | { | |
62 | } | |
63 | ||
64 | static void release_hpte_lock(void) | |
65 | { | |
66 | } | |
67 | #endif | |
68 | ||
a3961f82 MS |
69 | static inline unsigned long ___tlbie(unsigned long vpn, int psize, |
70 | int apsize, int ssize) | |
3c726f8d | 71 | { |
5524a27d | 72 | unsigned long va; |
3c726f8d | 73 | unsigned int penc; |
de640959 | 74 | unsigned long sllp; |
3c726f8d | 75 | |
5524a27d AK |
76 | /* |
77 | * We need 14 to 65 bits of va for a tlibe of 4K page | |
78 | * With vpn we ignore the lower VPN_SHIFT bits already. | |
79 | * And top two bits are already ignored because we can | |
027dfac6 | 80 | * only accomodate 76 bits in a 64 bit vpn with a VPN_SHIFT |
5524a27d AK |
81 | * of 12. |
82 | */ | |
83 | va = vpn << VPN_SHIFT; | |
84 | /* | |
85 | * clear top 16 bits of 64bit va, non SLS segment | |
86 | * Older versions of the architecture (2.02 and earler) require the | |
87 | * masking of the top 16 bits. | |
88 | */ | |
accfad7d AK |
89 | if (mmu_has_feature(MMU_FTR_TLBIE_CROP_VA)) |
90 | va &= ~(0xffffULL << 48); | |
3c726f8d BH |
91 | |
92 | switch (psize) { | |
93 | case MMU_PAGE_4K: | |
1f6aaacc AK |
94 | /* clear out bits after (52) [0....52.....63] */ |
95 | va &= ~((1ul << (64 - 52)) - 1); | |
1189be65 | 96 | va |= ssize << 8; |
138ee7ee | 97 | sllp = get_sllp_encoding(apsize); |
de640959 | 98 | va |= sllp << 5; |
a32e252f | 99 | asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2) |
969391c5 | 100 | : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) |
60dbf438 | 101 | : "memory"); |
3c726f8d BH |
102 | break; |
103 | default: | |
5524a27d | 104 | /* We need 14 to 14 + i bits of va */ |
b1022fbd | 105 | penc = mmu_psize_defs[psize].penc[apsize]; |
1f6aaacc | 106 | va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); |
19242b24 | 107 | va |= penc << 12; |
1189be65 | 108 | va |= ssize << 8; |
29ef7a3e AK |
109 | /* |
110 | * AVAL bits: | |
111 | * We don't need all the bits, but rest of the bits | |
112 | * must be ignored by the processor. | |
113 | * vpn cover upto 65 bits of va. (0...65) and we need | |
114 | * 58..64 bits of va. | |
115 | */ | |
116 | va |= (vpn & 0xfe); /* AVAL */ | |
60dbf438 | 117 | va |= 1; /* L */ |
a32e252f | 118 | asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2) |
969391c5 | 119 | : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) |
60dbf438 | 120 | : "memory"); |
3c726f8d BH |
121 | break; |
122 | } | |
a3961f82 MS |
123 | return va; |
124 | } | |
125 | ||
047e6575 AK |
126 | static inline void fixup_tlbie_vpn(unsigned long vpn, int psize, |
127 | int apsize, int ssize) | |
a5d4b589 | 128 | { |
047e6575 AK |
129 | if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) { |
130 | /* Radix flush for a hash guest */ | |
131 | ||
132 | unsigned long rb,rs,prs,r,ric; | |
133 | ||
134 | rb = PPC_BIT(52); /* IS = 2 */ | |
135 | rs = 0; /* lpid = 0 */ | |
136 | prs = 0; /* partition scoped */ | |
137 | r = 1; /* radix format */ | |
138 | ric = 0; /* RIC_FLSUH_TLB */ | |
139 | ||
140 | /* | |
141 | * Need the extra ptesync to make sure we don't | |
142 | * re-order the tlbie | |
143 | */ | |
144 | asm volatile("ptesync": : :"memory"); | |
145 | asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) | |
146 | : : "r"(rb), "i"(r), "i"(prs), | |
147 | "i"(ric), "r"(rs) : "memory"); | |
148 | } | |
149 | ||
150 | ||
09ce98ca | 151 | if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) { |
a5d4b589 AK |
152 | /* Need the extra ptesync to ensure we don't reorder tlbie*/ |
153 | asm volatile("ptesync": : :"memory"); | |
154 | ___tlbie(vpn, psize, apsize, ssize); | |
155 | } | |
156 | } | |
157 | ||
a3961f82 MS |
158 | static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize) |
159 | { | |
160 | unsigned long rb; | |
161 | ||
162 | rb = ___tlbie(vpn, psize, apsize, ssize); | |
163 | trace_tlbie(0, 0, rb, 0, 0, 0, 0); | |
3c726f8d BH |
164 | } |
165 | ||
b1022fbd | 166 | static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) |
3c726f8d | 167 | { |
5524a27d | 168 | unsigned long va; |
3c726f8d | 169 | unsigned int penc; |
de640959 | 170 | unsigned long sllp; |
3c726f8d | 171 | |
5524a27d AK |
172 | /* VPN_SHIFT can be atmost 12 */ |
173 | va = vpn << VPN_SHIFT; | |
174 | /* | |
175 | * clear top 16 bits of 64 bit va, non SLS segment | |
176 | * Older versions of the architecture (2.02 and earler) require the | |
177 | * masking of the top 16 bits. | |
178 | */ | |
accfad7d AK |
179 | if (mmu_has_feature(MMU_FTR_TLBIE_CROP_VA)) |
180 | va &= ~(0xffffULL << 48); | |
3c726f8d BH |
181 | |
182 | switch (psize) { | |
183 | case MMU_PAGE_4K: | |
1f6aaacc AK |
184 | /* clear out bits after(52) [0....52.....63] */ |
185 | va &= ~((1ul << (64 - 52)) - 1); | |
1189be65 | 186 | va |= ssize << 8; |
138ee7ee | 187 | sllp = get_sllp_encoding(apsize); |
de640959 | 188 | va |= sllp << 5; |
62479e6e | 189 | asm volatile(ASM_FTR_IFSET("tlbiel %0", PPC_TLBIEL_v205(%0, 0), %1) |
f923efbc BS |
190 | : : "r" (va), "i" (CPU_FTR_ARCH_206) |
191 | : "memory"); | |
3c726f8d BH |
192 | break; |
193 | default: | |
5524a27d | 194 | /* We need 14 to 14 + i bits of va */ |
b1022fbd | 195 | penc = mmu_psize_defs[psize].penc[apsize]; |
1f6aaacc | 196 | va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); |
19242b24 | 197 | va |= penc << 12; |
1189be65 | 198 | va |= ssize << 8; |
29ef7a3e AK |
199 | /* |
200 | * AVAL bits: | |
201 | * We don't need all the bits, but rest of the bits | |
202 | * must be ignored by the processor. | |
203 | * vpn cover upto 65 bits of va. (0...65) and we need | |
204 | * 58..64 bits of va. | |
205 | */ | |
206 | va |= (vpn & 0xfe); | |
60dbf438 | 207 | va |= 1; /* L */ |
62479e6e | 208 | asm volatile(ASM_FTR_IFSET("tlbiel %0", PPC_TLBIEL_v205(%0, 1), %1) |
f923efbc BS |
209 | : : "r" (va), "i" (CPU_FTR_ARCH_206) |
210 | : "memory"); | |
3c726f8d BH |
211 | break; |
212 | } | |
0428491c | 213 | trace_tlbie(0, 1, va, 0, 0, 0, 0); |
3c726f8d BH |
214 | |
215 | } | |
216 | ||
b1022fbd AK |
217 | static inline void tlbie(unsigned long vpn, int psize, int apsize, |
218 | int ssize, int local) | |
3c726f8d | 219 | { |
4c6d9acc | 220 | unsigned int use_local; |
44ae3ab3 | 221 | int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE); |
3c726f8d | 222 | |
4c6d9acc IM |
223 | use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) && !cxl_ctx_in_use(); |
224 | ||
3c726f8d BH |
225 | if (use_local) |
226 | use_local = mmu_psize_defs[psize].tlbiel; | |
227 | if (lock_tlbie && !use_local) | |
6b9c9b8a | 228 | raw_spin_lock(&native_tlbie_lock); |
3c726f8d BH |
229 | asm volatile("ptesync": : :"memory"); |
230 | if (use_local) { | |
b1022fbd | 231 | __tlbiel(vpn, psize, apsize, ssize); |
05504b42 | 232 | ppc_after_tlbiel_barrier(); |
3c726f8d | 233 | } else { |
b1022fbd | 234 | __tlbie(vpn, psize, apsize, ssize); |
047e6575 | 235 | fixup_tlbie_vpn(vpn, psize, apsize, ssize); |
3c726f8d BH |
236 | asm volatile("eieio; tlbsync; ptesync": : :"memory"); |
237 | } | |
238 | if (lock_tlbie && !use_local) | |
6b9c9b8a | 239 | raw_spin_unlock(&native_tlbie_lock); |
3c726f8d BH |
240 | } |
241 | ||
8e561e7e | 242 | static inline void native_lock_hpte(struct hash_pte *hptep) |
1da177e4 | 243 | { |
12f04f2b | 244 | unsigned long *word = (unsigned long *)&hptep->v; |
1da177e4 | 245 | |
be83d548 | 246 | acquire_hpte_lock(); |
1da177e4 | 247 | while (1) { |
66d99b88 | 248 | if (!test_and_set_bit_lock(HPTE_LOCK_BIT, word)) |
1da177e4 | 249 | break; |
4e287e65 | 250 | spin_begin(); |
1da177e4 | 251 | while(test_bit(HPTE_LOCK_BIT, word)) |
4e287e65 NP |
252 | spin_cpu_relax(); |
253 | spin_end(); | |
1da177e4 LT |
254 | } |
255 | } | |
256 | ||
8e561e7e | 257 | static inline void native_unlock_hpte(struct hash_pte *hptep) |
1da177e4 | 258 | { |
12f04f2b | 259 | unsigned long *word = (unsigned long *)&hptep->v; |
1da177e4 | 260 | |
be83d548 | 261 | release_hpte_lock(); |
66d99b88 | 262 | clear_bit_unlock(HPTE_LOCK_BIT, word); |
1da177e4 LT |
263 | } |
264 | ||
5524a27d | 265 | static long native_hpte_insert(unsigned long hpte_group, unsigned long vpn, |
3c726f8d | 266 | unsigned long pa, unsigned long rflags, |
b1022fbd | 267 | unsigned long vflags, int psize, int apsize, int ssize) |
1da177e4 | 268 | { |
8e561e7e | 269 | struct hash_pte *hptep = htab_address + hpte_group; |
96e28449 | 270 | unsigned long hpte_v, hpte_r; |
35159b57 | 271 | unsigned long flags; |
1da177e4 LT |
272 | int i; |
273 | ||
35159b57 NP |
274 | local_irq_save(flags); |
275 | ||
3c726f8d | 276 | if (!(vflags & HPTE_V_BOLTED)) { |
5524a27d | 277 | DBG_LOW(" insert(group=%lx, vpn=%016lx, pa=%016lx," |
3c726f8d | 278 | " rflags=%lx, vflags=%lx, psize=%d)\n", |
5524a27d | 279 | hpte_group, vpn, pa, rflags, vflags, psize); |
3c726f8d BH |
280 | } |
281 | ||
1da177e4 | 282 | for (i = 0; i < HPTES_PER_GROUP; i++) { |
12f04f2b | 283 | if (! (be64_to_cpu(hptep->v) & HPTE_V_VALID)) { |
1da177e4 LT |
284 | /* retry with lock held */ |
285 | native_lock_hpte(hptep); | |
12f04f2b | 286 | if (! (be64_to_cpu(hptep->v) & HPTE_V_VALID)) |
1da177e4 LT |
287 | break; |
288 | native_unlock_hpte(hptep); | |
289 | } | |
290 | ||
291 | hptep++; | |
292 | } | |
293 | ||
35159b57 NP |
294 | if (i == HPTES_PER_GROUP) { |
295 | local_irq_restore(flags); | |
1da177e4 | 296 | return -1; |
35159b57 | 297 | } |
1da177e4 | 298 | |
b1022fbd | 299 | hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID; |
6b243fcf | 300 | hpte_r = hpte_encode_r(pa, psize, apsize) | rflags; |
3c726f8d BH |
301 | |
302 | if (!(vflags & HPTE_V_BOLTED)) { | |
303 | DBG_LOW(" i=%x hpte_v=%016lx, hpte_r=%016lx\n", | |
304 | i, hpte_v, hpte_r); | |
305 | } | |
1da177e4 | 306 | |
6b243fcf PM |
307 | if (cpu_has_feature(CPU_FTR_ARCH_300)) { |
308 | hpte_r = hpte_old_to_new_r(hpte_v, hpte_r); | |
309 | hpte_v = hpte_old_to_new_v(hpte_v); | |
310 | } | |
311 | ||
12f04f2b | 312 | hptep->r = cpu_to_be64(hpte_r); |
1da177e4 | 313 | /* Guarantee the second dword is visible before the valid bit */ |
74a0ba61 | 314 | eieio(); |
1da177e4 LT |
315 | /* |
316 | * Now set the first dword including the valid bit | |
317 | * NOTE: this also unlocks the hpte | |
318 | */ | |
35159b57 | 319 | release_hpte_lock(); |
12f04f2b | 320 | hptep->v = cpu_to_be64(hpte_v); |
1da177e4 LT |
321 | |
322 | __asm__ __volatile__ ("ptesync" : : : "memory"); | |
323 | ||
35159b57 NP |
324 | local_irq_restore(flags); |
325 | ||
96e28449 | 326 | return i | (!!(vflags & HPTE_V_SECONDARY) << 3); |
1da177e4 LT |
327 | } |
328 | ||
329 | static long native_hpte_remove(unsigned long hpte_group) | |
330 | { | |
8bbe9fee | 331 | unsigned long hpte_v, flags; |
8e561e7e | 332 | struct hash_pte *hptep; |
1da177e4 LT |
333 | int i; |
334 | int slot_offset; | |
8bbe9fee ME |
335 | |
336 | local_irq_save(flags); | |
1da177e4 | 337 | |
3c726f8d BH |
338 | DBG_LOW(" remove(group=%lx)\n", hpte_group); |
339 | ||
1da177e4 LT |
340 | /* pick a random entry to start at */ |
341 | slot_offset = mftb() & 0x7; | |
342 | ||
343 | for (i = 0; i < HPTES_PER_GROUP; i++) { | |
344 | hptep = htab_address + hpte_group + slot_offset; | |
12f04f2b | 345 | hpte_v = be64_to_cpu(hptep->v); |
1da177e4 | 346 | |
96e28449 | 347 | if ((hpte_v & HPTE_V_VALID) && !(hpte_v & HPTE_V_BOLTED)) { |
1da177e4 LT |
348 | /* retry with lock held */ |
349 | native_lock_hpte(hptep); | |
12f04f2b | 350 | hpte_v = be64_to_cpu(hptep->v); |
96e28449 DG |
351 | if ((hpte_v & HPTE_V_VALID) |
352 | && !(hpte_v & HPTE_V_BOLTED)) | |
1da177e4 LT |
353 | break; |
354 | native_unlock_hpte(hptep); | |
355 | } | |
356 | ||
357 | slot_offset++; | |
358 | slot_offset &= 0x7; | |
359 | } | |
360 | ||
8bbe9fee ME |
361 | if (i == HPTES_PER_GROUP) { |
362 | i = -1; | |
363 | goto out; | |
364 | } | |
1da177e4 LT |
365 | |
366 | /* Invalidate the hpte. NOTE: this also unlocks it */ | |
be83d548 | 367 | release_hpte_lock(); |
96e28449 | 368 | hptep->v = 0; |
8bbe9fee ME |
369 | out: |
370 | local_irq_restore(flags); | |
1da177e4 LT |
371 | return i; |
372 | } | |
373 | ||
3c726f8d | 374 | static long native_hpte_updatepp(unsigned long slot, unsigned long newpp, |
db3d8534 | 375 | unsigned long vpn, int bpsize, |
aefa5688 | 376 | int apsize, int ssize, unsigned long flags) |
1da177e4 | 377 | { |
8e561e7e | 378 | struct hash_pte *hptep = htab_address + slot; |
3c726f8d | 379 | unsigned long hpte_v, want_v; |
aefa5688 | 380 | int ret = 0, local = 0; |
35159b57 NP |
381 | unsigned long irqflags; |
382 | ||
383 | local_irq_save(irqflags); | |
3c726f8d | 384 | |
db3d8534 | 385 | want_v = hpte_encode_avpn(vpn, bpsize, ssize); |
3c726f8d | 386 | |
5524a27d AK |
387 | DBG_LOW(" update(vpn=%016lx, avpnv=%016lx, group=%lx, newpp=%lx)", |
388 | vpn, want_v & HPTE_V_AVPN, slot, newpp); | |
3c726f8d | 389 | |
a833280b | 390 | hpte_v = hpte_get_old_v(hptep); |
0608d692 AK |
391 | /* |
392 | * We need to invalidate the TLB always because hpte_remove doesn't do | |
393 | * a tlb invalidate. If a hash bucket gets full, we "evict" a more/less | |
394 | * random entry from it. When we do that we don't invalidate the TLB | |
395 | * (hpte_remove) because we assume the old translation is still | |
396 | * technically "valid". | |
397 | */ | |
db3d8534 | 398 | if (!HPTE_V_COMPARE(hpte_v, want_v) || !(hpte_v & HPTE_V_VALID)) { |
3c726f8d | 399 | DBG_LOW(" -> miss\n"); |
3c726f8d BH |
400 | ret = -1; |
401 | } else { | |
0ec2698f AK |
402 | native_lock_hpte(hptep); |
403 | /* recheck with locks held */ | |
a833280b | 404 | hpte_v = hpte_get_old_v(hptep); |
0ec2698f AK |
405 | if (unlikely(!HPTE_V_COMPARE(hpte_v, want_v) || |
406 | !(hpte_v & HPTE_V_VALID))) { | |
407 | ret = -1; | |
408 | } else { | |
409 | DBG_LOW(" -> hit\n"); | |
410 | /* Update the HPTE */ | |
411 | hptep->r = cpu_to_be64((be64_to_cpu(hptep->r) & | |
8550e2fa AK |
412 | ~(HPTE_R_PPP | HPTE_R_N)) | |
413 | (newpp & (HPTE_R_PPP | HPTE_R_N | | |
0ec2698f AK |
414 | HPTE_R_C))); |
415 | } | |
416 | native_unlock_hpte(hptep); | |
3c726f8d | 417 | } |
aefa5688 AK |
418 | |
419 | if (flags & HPTE_LOCAL_UPDATE) | |
420 | local = 1; | |
421 | /* | |
422 | * Ensure it is out of the tlb too if it is not a nohpte fault | |
423 | */ | |
424 | if (!(flags & HPTE_NOHPTE_UPDATE)) | |
425 | tlbie(vpn, bpsize, apsize, ssize, local); | |
426 | ||
35159b57 NP |
427 | local_irq_restore(irqflags); |
428 | ||
3c726f8d | 429 | return ret; |
1da177e4 LT |
430 | } |
431 | ||
d78d5dac | 432 | static long __native_hpte_find(unsigned long want_v, unsigned long slot) |
1da177e4 | 433 | { |
8e561e7e | 434 | struct hash_pte *hptep; |
d78d5dac | 435 | unsigned long hpte_v; |
1189be65 | 436 | unsigned long i; |
1da177e4 | 437 | |
1189be65 | 438 | for (i = 0; i < HPTES_PER_GROUP; i++) { |
1da177e4 | 439 | |
a833280b AK |
440 | hptep = htab_address + slot; |
441 | hpte_v = hpte_get_old_v(hptep); | |
1189be65 PM |
442 | if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID)) |
443 | /* HPTE matches */ | |
444 | return slot; | |
445 | ++slot; | |
1da177e4 LT |
446 | } |
447 | ||
448 | return -1; | |
449 | } | |
450 | ||
d78d5dac AK |
451 | static long native_hpte_find(unsigned long vpn, int psize, int ssize) |
452 | { | |
453 | unsigned long hpte_group; | |
454 | unsigned long want_v; | |
455 | unsigned long hash; | |
456 | long slot; | |
457 | ||
458 | hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize); | |
459 | want_v = hpte_encode_avpn(vpn, psize, ssize); | |
460 | ||
461 | /* | |
462 | * We try to keep bolted entries always in primary hash | |
463 | * But in some case we can find them in secondary too. | |
464 | */ | |
465 | hpte_group = (hash & htab_hash_mask) * HPTES_PER_GROUP; | |
466 | slot = __native_hpte_find(want_v, hpte_group); | |
467 | if (slot < 0) { | |
468 | /* Try in secondary */ | |
469 | hpte_group = (~hash & htab_hash_mask) * HPTES_PER_GROUP; | |
470 | slot = __native_hpte_find(want_v, hpte_group); | |
471 | if (slot < 0) | |
472 | return -1; | |
473 | } | |
474 | ||
475 | return slot; | |
476 | } | |
477 | ||
1da177e4 LT |
478 | /* |
479 | * Update the page protection bits. Intended to be used to create | |
480 | * guard pages for kernel data structures on pages which are bolted | |
481 | * in the HPT. Assumes pages being operated on will not be stolen. | |
1da177e4 LT |
482 | * |
483 | * No need to lock here because we should be the only user. | |
484 | */ | |
3c726f8d | 485 | static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea, |
1189be65 | 486 | int psize, int ssize) |
1da177e4 | 487 | { |
5524a27d AK |
488 | unsigned long vpn; |
489 | unsigned long vsid; | |
1da177e4 | 490 | long slot; |
8e561e7e | 491 | struct hash_pte *hptep; |
35159b57 NP |
492 | unsigned long flags; |
493 | ||
494 | local_irq_save(flags); | |
1da177e4 | 495 | |
1189be65 | 496 | vsid = get_kernel_vsid(ea, ssize); |
5524a27d | 497 | vpn = hpt_vpn(ea, vsid, ssize); |
1da177e4 | 498 | |
5524a27d | 499 | slot = native_hpte_find(vpn, psize, ssize); |
1da177e4 LT |
500 | if (slot == -1) |
501 | panic("could not find page to bolt\n"); | |
502 | hptep = htab_address + slot; | |
503 | ||
3c726f8d | 504 | /* Update the HPTE */ |
12f04f2b | 505 | hptep->r = cpu_to_be64((be64_to_cpu(hptep->r) & |
8550e2fa AK |
506 | ~(HPTE_R_PPP | HPTE_R_N)) | |
507 | (newpp & (HPTE_R_PPP | HPTE_R_N))); | |
db3d8534 AK |
508 | /* |
509 | * Ensure it is out of the tlb too. Bolted entries base and | |
510 | * actual page size will be same. | |
511 | */ | |
512 | tlbie(vpn, psize, psize, ssize, 0); | |
35159b57 NP |
513 | |
514 | local_irq_restore(flags); | |
1da177e4 LT |
515 | } |
516 | ||
1b644f57 AB |
517 | /* |
518 | * Remove a bolted kernel entry. Memory hotplug uses this. | |
519 | * | |
520 | * No need to lock here because we should be the only user. | |
521 | */ | |
522 | static int native_hpte_removebolted(unsigned long ea, int psize, int ssize) | |
523 | { | |
524 | unsigned long vpn; | |
525 | unsigned long vsid; | |
526 | long slot; | |
527 | struct hash_pte *hptep; | |
35159b57 NP |
528 | unsigned long flags; |
529 | ||
530 | local_irq_save(flags); | |
1b644f57 AB |
531 | |
532 | vsid = get_kernel_vsid(ea, ssize); | |
533 | vpn = hpt_vpn(ea, vsid, ssize); | |
534 | ||
535 | slot = native_hpte_find(vpn, psize, ssize); | |
536 | if (slot == -1) | |
537 | return -ENOENT; | |
538 | ||
539 | hptep = htab_address + slot; | |
540 | ||
541 | VM_WARN_ON(!(be64_to_cpu(hptep->v) & HPTE_V_BOLTED)); | |
542 | ||
543 | /* Invalidate the hpte */ | |
544 | hptep->v = 0; | |
545 | ||
546 | /* Invalidate the TLB */ | |
547 | tlbie(vpn, psize, psize, ssize, 0); | |
35159b57 NP |
548 | |
549 | local_irq_restore(flags); | |
550 | ||
1b644f57 AB |
551 | return 0; |
552 | } | |
553 | ||
554 | ||
5524a27d | 555 | static void native_hpte_invalidate(unsigned long slot, unsigned long vpn, |
db3d8534 | 556 | int bpsize, int apsize, int ssize, int local) |
1da177e4 | 557 | { |
8e561e7e | 558 | struct hash_pte *hptep = htab_address + slot; |
96e28449 | 559 | unsigned long hpte_v; |
3c726f8d | 560 | unsigned long want_v; |
1da177e4 | 561 | unsigned long flags; |
1da177e4 LT |
562 | |
563 | local_irq_save(flags); | |
1da177e4 | 564 | |
5524a27d | 565 | DBG_LOW(" invalidate(vpn=%016lx, hash: %lx)\n", vpn, slot); |
3c726f8d | 566 | |
db3d8534 | 567 | want_v = hpte_encode_avpn(vpn, bpsize, ssize); |
a833280b | 568 | hpte_v = hpte_get_old_v(hptep); |
1da177e4 | 569 | |
27d8959d AK |
570 | if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID)) { |
571 | native_lock_hpte(hptep); | |
572 | /* recheck with locks held */ | |
573 | hpte_v = hpte_get_old_v(hptep); | |
574 | ||
be83d548 | 575 | if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID)) { |
27d8959d | 576 | /* Invalidate the hpte. NOTE: this also unlocks it */ |
be83d548 | 577 | release_hpte_lock(); |
27d8959d | 578 | hptep->v = 0; |
be83d548 | 579 | } else |
27d8959d AK |
580 | native_unlock_hpte(hptep); |
581 | } | |
0608d692 AK |
582 | /* |
583 | * We need to invalidate the TLB always because hpte_remove doesn't do | |
584 | * a tlb invalidate. If a hash bucket gets full, we "evict" a more/less | |
585 | * random entry from it. When we do that we don't invalidate the TLB | |
586 | * (hpte_remove) because we assume the old translation is still | |
587 | * technically "valid". | |
588 | */ | |
db3d8534 AK |
589 | tlbie(vpn, bpsize, apsize, ssize, local); |
590 | ||
1da177e4 LT |
591 | local_irq_restore(flags); |
592 | } | |
593 | ||
e34aa03c | 594 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
fa1f8ae8 AK |
595 | static void native_hugepage_invalidate(unsigned long vsid, |
596 | unsigned long addr, | |
1a527286 | 597 | unsigned char *hpte_slot_array, |
d557b098 | 598 | int psize, int ssize, int local) |
1a527286 | 599 | { |
969b7b20 | 600 | int i; |
1a527286 AK |
601 | struct hash_pte *hptep; |
602 | int actual_psize = MMU_PAGE_16M; | |
603 | unsigned int max_hpte_count, valid; | |
604 | unsigned long flags, s_addr = addr; | |
605 | unsigned long hpte_v, want_v, shift; | |
fa1f8ae8 | 606 | unsigned long hidx, vpn = 0, hash, slot; |
1a527286 AK |
607 | |
608 | shift = mmu_psize_defs[psize].shift; | |
609 | max_hpte_count = 1U << (PMD_SHIFT - shift); | |
610 | ||
611 | local_irq_save(flags); | |
612 | for (i = 0; i < max_hpte_count; i++) { | |
613 | valid = hpte_valid(hpte_slot_array, i); | |
614 | if (!valid) | |
615 | continue; | |
616 | hidx = hpte_hash_index(hpte_slot_array, i); | |
617 | ||
618 | /* get the vpn */ | |
619 | addr = s_addr + (i * (1ul << shift)); | |
1a527286 AK |
620 | vpn = hpt_vpn(addr, vsid, ssize); |
621 | hash = hpt_hash(vpn, shift, ssize); | |
622 | if (hidx & _PTEIDX_SECONDARY) | |
623 | hash = ~hash; | |
624 | ||
625 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | |
626 | slot += hidx & _PTEIDX_GROUP_IX; | |
627 | ||
628 | hptep = htab_address + slot; | |
629 | want_v = hpte_encode_avpn(vpn, psize, ssize); | |
a833280b | 630 | hpte_v = hpte_get_old_v(hptep); |
1a527286 AK |
631 | |
632 | /* Even if we miss, we need to invalidate the TLB */ | |
27d8959d AK |
633 | if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID)) { |
634 | /* recheck with locks held */ | |
635 | native_lock_hpte(hptep); | |
636 | hpte_v = hpte_get_old_v(hptep); | |
637 | ||
638 | if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID)) { | |
be83d548 NP |
639 | /* Invalidate the hpte. NOTE: this also unlocks it */ |
640 | release_hpte_lock(); | |
27d8959d AK |
641 | hptep->v = 0; |
642 | } else | |
643 | native_unlock_hpte(hptep); | |
644 | } | |
969b7b20 AK |
645 | /* |
646 | * We need to do tlb invalidate for all the address, tlbie | |
647 | * instruction compares entry_VA in tlb with the VA specified | |
648 | * here | |
649 | */ | |
d557b098 | 650 | tlbie(vpn, psize, actual_psize, ssize, local); |
1a527286 | 651 | } |
1a527286 AK |
652 | local_irq_restore(flags); |
653 | } | |
e34aa03c AK |
654 | #else |
655 | static void native_hugepage_invalidate(unsigned long vsid, | |
656 | unsigned long addr, | |
657 | unsigned char *hpte_slot_array, | |
658 | int psize, int ssize, int local) | |
659 | { | |
660 | WARN(1, "%s called without THP support\n", __func__); | |
661 | } | |
662 | #endif | |
1a527286 | 663 | |
8e561e7e | 664 | static void hpte_decode(struct hash_pte *hpte, unsigned long slot, |
b1022fbd | 665 | int *psize, int *apsize, int *ssize, unsigned long *vpn) |
71bf08b6 | 666 | { |
dcda287a | 667 | unsigned long avpn, pteg, vpi; |
12f04f2b AB |
668 | unsigned long hpte_v = be64_to_cpu(hpte->v); |
669 | unsigned long hpte_r = be64_to_cpu(hpte->r); | |
dcda287a | 670 | unsigned long vsid, seg_off; |
7e74c392 AK |
671 | int size, a_size, shift; |
672 | /* Look at the 8 bit LP value */ | |
12f04f2b | 673 | unsigned int lp = (hpte_r >> LP_SHIFT) & ((1 << LP_BITS) - 1); |
71bf08b6 | 674 | |
6b243fcf PM |
675 | if (cpu_has_feature(CPU_FTR_ARCH_300)) { |
676 | hpte_v = hpte_new_to_old_v(hpte_v, hpte_r); | |
677 | hpte_r = hpte_new_to_old_r(hpte_r); | |
678 | } | |
b1022fbd AK |
679 | if (!(hpte_v & HPTE_V_LARGE)) { |
680 | size = MMU_PAGE_4K; | |
681 | a_size = MMU_PAGE_4K; | |
682 | } else { | |
0eeede0c PM |
683 | size = hpte_page_sizes[lp] & 0xf; |
684 | a_size = hpte_page_sizes[lp] >> 4; | |
71bf08b6 | 685 | } |
2454c7e9 | 686 | /* This works for all page sizes, and for 256M and 1T segments */ |
6b243fcf | 687 | *ssize = hpte_v >> HPTE_V_SSIZE_SHIFT; |
71bf08b6 | 688 | shift = mmu_psize_defs[size].shift; |
71bf08b6 | 689 | |
dcda287a AK |
690 | avpn = (HPTE_V_AVPN_VAL(hpte_v) & ~mmu_psize_defs[size].avpnm); |
691 | pteg = slot / HPTES_PER_GROUP; | |
692 | if (hpte_v & HPTE_V_SECONDARY) | |
693 | pteg = ~pteg; | |
694 | ||
695 | switch (*ssize) { | |
696 | case MMU_SEGSIZE_256M: | |
697 | /* We only have 28 - 23 bits of seg_off in avpn */ | |
698 | seg_off = (avpn & 0x1f) << 23; | |
699 | vsid = avpn >> 5; | |
700 | /* We can find more bits from the pteg value */ | |
701 | if (shift < 23) { | |
702 | vpi = (vsid ^ pteg) & htab_hash_mask; | |
703 | seg_off |= vpi << shift; | |
704 | } | |
5524a27d | 705 | *vpn = vsid << (SID_SHIFT - VPN_SHIFT) | seg_off >> VPN_SHIFT; |
83383b73 | 706 | break; |
dcda287a AK |
707 | case MMU_SEGSIZE_1T: |
708 | /* We only have 40 - 23 bits of seg_off in avpn */ | |
709 | seg_off = (avpn & 0x1ffff) << 23; | |
710 | vsid = avpn >> 17; | |
711 | if (shift < 23) { | |
2454c7e9 | 712 | vpi = (vsid ^ (vsid << 25) ^ pteg) & htab_hash_mask; |
dcda287a | 713 | seg_off |= vpi << shift; |
71bf08b6 | 714 | } |
5524a27d | 715 | *vpn = vsid << (SID_SHIFT_1T - VPN_SHIFT) | seg_off >> VPN_SHIFT; |
83383b73 | 716 | break; |
dcda287a | 717 | default: |
5524a27d | 718 | *vpn = size = 0; |
3c726f8d | 719 | } |
b1022fbd AK |
720 | *psize = size; |
721 | *apsize = a_size; | |
3c726f8d BH |
722 | } |
723 | ||
f4c82d51 S |
724 | /* |
725 | * clear all mappings on kexec. All cpus are in real mode (or they will | |
726 | * be when they isi), and we are the only one left. We rely on our kernel | |
727 | * mapping being 0xC0's and the hardware ignoring those two real bits. | |
728 | * | |
fdf880a6 CB |
729 | * This must be called with interrupts disabled. |
730 | * | |
731 | * Taking the native_tlbie_lock is unsafe here due to the possibility of | |
732 | * lockdep being on. On pre POWER5 hardware, not taking the lock could | |
733 | * cause deadlock. POWER5 and newer not taking the lock is fine. This only | |
734 | * gets called during boot before secondary CPUs have come up and during | |
735 | * crashdump and all bets are off anyway. | |
736 | * | |
f4c82d51 | 737 | * TODO: add batching support when enabled. remember, no dynamic memory here, |
027dfac6 | 738 | * although there is the control page available... |
f4c82d51 | 739 | */ |
8119cefd | 740 | static notrace void native_hpte_clear(void) |
f4c82d51 | 741 | { |
5524a27d | 742 | unsigned long vpn = 0; |
fdf880a6 | 743 | unsigned long slot, slots; |
8e561e7e | 744 | struct hash_pte *hptep = htab_address; |
5524a27d | 745 | unsigned long hpte_v; |
f4c82d51 | 746 | unsigned long pteg_count; |
b1022fbd | 747 | int psize, apsize, ssize; |
f4c82d51 S |
748 | |
749 | pteg_count = htab_hash_mask + 1; | |
750 | ||
f4c82d51 S |
751 | slots = pteg_count * HPTES_PER_GROUP; |
752 | ||
753 | for (slot = 0; slot < slots; slot++, hptep++) { | |
754 | /* | |
755 | * we could lock the pte here, but we are the only cpu | |
756 | * running, right? and for crash dump, we probably | |
757 | * don't want to wait for a maybe bad cpu. | |
758 | */ | |
12f04f2b | 759 | hpte_v = be64_to_cpu(hptep->v); |
f4c82d51 | 760 | |
47f78a49 | 761 | /* |
fdf880a6 CB |
762 | * Call __tlbie() here rather than tlbie() since we can't take the |
763 | * native_tlbie_lock. | |
47f78a49 | 764 | */ |
96e28449 | 765 | if (hpte_v & HPTE_V_VALID) { |
b1022fbd | 766 | hpte_decode(hptep, slot, &psize, &apsize, &ssize, &vpn); |
96e28449 | 767 | hptep->v = 0; |
a3961f82 | 768 | ___tlbie(vpn, psize, apsize, ssize); |
f4c82d51 S |
769 | } |
770 | } | |
771 | ||
47f78a49 | 772 | asm volatile("eieio; tlbsync; ptesync":::"memory"); |
f4c82d51 S |
773 | } |
774 | ||
3c726f8d BH |
775 | /* |
776 | * Batched hash table flush, we batch the tlbie's to avoid taking/releasing | |
777 | * the lock all the time | |
778 | */ | |
61b1a942 | 779 | static void native_flush_hash_range(unsigned long number, int local) |
1da177e4 | 780 | { |
a5d4b589 | 781 | unsigned long vpn = 0; |
5524a27d | 782 | unsigned long hash, index, hidx, shift, slot; |
8e561e7e | 783 | struct hash_pte *hptep; |
96e28449 | 784 | unsigned long hpte_v; |
3c726f8d BH |
785 | unsigned long want_v; |
786 | unsigned long flags; | |
787 | real_pte_t pte; | |
69111bac | 788 | struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch); |
3c726f8d | 789 | unsigned long psize = batch->psize; |
1189be65 | 790 | int ssize = batch->ssize; |
3c726f8d | 791 | int i; |
88b1bf72 FB |
792 | unsigned int use_local; |
793 | ||
794 | use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) && | |
795 | mmu_psize_defs[psize].tlbiel && !cxl_ctx_in_use(); | |
1da177e4 LT |
796 | |
797 | local_irq_save(flags); | |
798 | ||
1da177e4 | 799 | for (i = 0; i < number; i++) { |
5524a27d | 800 | vpn = batch->vpn[i]; |
3c726f8d BH |
801 | pte = batch->pte[i]; |
802 | ||
5524a27d AK |
803 | pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) { |
804 | hash = hpt_hash(vpn, shift, ssize); | |
3c726f8d BH |
805 | hidx = __rpte_to_hidx(pte, index); |
806 | if (hidx & _PTEIDX_SECONDARY) | |
807 | hash = ~hash; | |
808 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | |
809 | slot += hidx & _PTEIDX_GROUP_IX; | |
810 | hptep = htab_address + slot; | |
74f227b2 | 811 | want_v = hpte_encode_avpn(vpn, psize, ssize); |
27d8959d AK |
812 | hpte_v = hpte_get_old_v(hptep); |
813 | ||
814 | if (!HPTE_V_COMPARE(hpte_v, want_v) || !(hpte_v & HPTE_V_VALID)) | |
815 | continue; | |
816 | /* lock and try again */ | |
3c726f8d | 817 | native_lock_hpte(hptep); |
a833280b | 818 | hpte_v = hpte_get_old_v(hptep); |
27d8959d AK |
819 | |
820 | if (!HPTE_V_COMPARE(hpte_v, want_v) || !(hpte_v & HPTE_V_VALID)) | |
3c726f8d | 821 | native_unlock_hpte(hptep); |
be83d548 NP |
822 | else { |
823 | release_hpte_lock(); | |
3c726f8d | 824 | hptep->v = 0; |
be83d548 | 825 | } |
27d8959d | 826 | |
3c726f8d | 827 | } pte_iterate_hashed_end(); |
1da177e4 LT |
828 | } |
829 | ||
88b1bf72 | 830 | if (use_local) { |
1da177e4 | 831 | asm volatile("ptesync":::"memory"); |
3c726f8d | 832 | for (i = 0; i < number; i++) { |
5524a27d | 833 | vpn = batch->vpn[i]; |
3c726f8d BH |
834 | pte = batch->pte[i]; |
835 | ||
5524a27d AK |
836 | pte_iterate_hashed_subpages(pte, psize, |
837 | vpn, index, shift) { | |
b1022fbd | 838 | __tlbiel(vpn, psize, psize, ssize); |
3c726f8d BH |
839 | } pte_iterate_hashed_end(); |
840 | } | |
05504b42 | 841 | ppc_after_tlbiel_barrier(); |
1da177e4 | 842 | } else { |
44ae3ab3 | 843 | int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE); |
1da177e4 LT |
844 | |
845 | if (lock_tlbie) | |
6b9c9b8a | 846 | raw_spin_lock(&native_tlbie_lock); |
1da177e4 LT |
847 | |
848 | asm volatile("ptesync":::"memory"); | |
3c726f8d | 849 | for (i = 0; i < number; i++) { |
5524a27d | 850 | vpn = batch->vpn[i]; |
3c726f8d BH |
851 | pte = batch->pte[i]; |
852 | ||
5524a27d AK |
853 | pte_iterate_hashed_subpages(pte, psize, |
854 | vpn, index, shift) { | |
b1022fbd | 855 | __tlbie(vpn, psize, psize, ssize); |
3c726f8d BH |
856 | } pte_iterate_hashed_end(); |
857 | } | |
a5d4b589 AK |
858 | /* |
859 | * Just do one more with the last used values. | |
860 | */ | |
047e6575 | 861 | fixup_tlbie_vpn(vpn, psize, psize, ssize); |
1da177e4 LT |
862 | asm volatile("eieio; tlbsync; ptesync":::"memory"); |
863 | ||
864 | if (lock_tlbie) | |
6b9c9b8a | 865 | raw_spin_unlock(&native_tlbie_lock); |
1da177e4 LT |
866 | } |
867 | ||
868 | local_irq_restore(flags); | |
869 | } | |
870 | ||
7d0daae4 | 871 | void __init hpte_init_native(void) |
1da177e4 | 872 | { |
7025776e BH |
873 | mmu_hash_ops.hpte_invalidate = native_hpte_invalidate; |
874 | mmu_hash_ops.hpte_updatepp = native_hpte_updatepp; | |
875 | mmu_hash_ops.hpte_updateboltedpp = native_hpte_updateboltedpp; | |
1b644f57 | 876 | mmu_hash_ops.hpte_removebolted = native_hpte_removebolted; |
7025776e BH |
877 | mmu_hash_ops.hpte_insert = native_hpte_insert; |
878 | mmu_hash_ops.hpte_remove = native_hpte_remove; | |
879 | mmu_hash_ops.hpte_clear_all = native_hpte_clear; | |
880 | mmu_hash_ops.flush_hash_range = native_flush_hash_range; | |
881 | mmu_hash_ops.hugepage_invalidate = native_hugepage_invalidate; | |
1da177e4 | 882 | } |