projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 1a59d1b8 | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 64ff3128 | 2 | /* |
| 64ff3128 AB |
3 | * |
| 4 | * Copyright (C) IBM Corporation, 2010 | |
| 5 | * | |
| 6 | * Author: Anton Blanchard <anton@au.ibm.com> | |
| 7 | */ | |
| 8 | #include <asm/processor.h> | |
| 9 | #include <asm/ppc_asm.h> | |
| 9445aa1a | 10 | #include <asm/export.h> |
| 2c86cd18 | 11 | #include <asm/feature-fixups.h> |
| 64ff3128 AB |
12 | |
| 13 | /* Note: This code relies on -mminimal-toc */ | |
| 14 | ||
| 15 | _GLOBAL(__arch_hweight8) | |
| 16 | BEGIN_FTR_SECTION | |
| b1576fec | 17 | b __sw_hweight8 |
| 64ff3128 AB |
18 | nop |
| 19 | nop | |
| 20 | FTR_SECTION_ELSE | |
| c75df6f9 | 21 | PPC_POPCNTB(R3,R3) |
| 64ff3128 AB |
22 | clrldi r3,r3,64-8 |
| 23 | blr | |
| 24 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB) | |
| 9445aa1a | 25 | EXPORT_SYMBOL(__arch_hweight8) |
| 64ff3128 AB |
26 | |
| 27 | _GLOBAL(__arch_hweight16) | |
| 28 | BEGIN_FTR_SECTION | |
| b1576fec | 29 | b __sw_hweight16 |
| 64ff3128 AB |
30 | nop |
| 31 | nop | |
| 32 | nop | |
| 33 | nop | |
| 34 | FTR_SECTION_ELSE | |
| 35 | BEGIN_FTR_SECTION_NESTED(50) | |
| c75df6f9 | 36 | PPC_POPCNTB(R3,R3) |
| 64ff3128 AB |
37 | srdi r4,r3,8 |
| 38 | add r3,r4,r3 | |
| 39 | clrldi r3,r3,64-8 | |
| 40 | blr | |
| 41 | FTR_SECTION_ELSE_NESTED(50) | |
| 42 | clrlwi r3,r3,16 | |
| c75df6f9 | 43 | PPC_POPCNTW(R3,R3) |
| 64ff3128 AB |
44 | clrldi r3,r3,64-8 |
| 45 | blr | |
| 46 | ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 50) | |
| 47 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB) | |
| 9445aa1a | 48 | EXPORT_SYMBOL(__arch_hweight16) |
| 64ff3128 AB |
49 | |
| 50 | _GLOBAL(__arch_hweight32) | |
| 51 | BEGIN_FTR_SECTION | |
| b1576fec | 52 | b __sw_hweight32 |
| 64ff3128 AB |
53 | nop |
| 54 | nop | |
| 55 | nop | |
| 56 | nop | |
| 57 | nop | |
| 58 | nop | |
| 59 | FTR_SECTION_ELSE | |
| 60 | BEGIN_FTR_SECTION_NESTED(51) | |
| c75df6f9 | 61 | PPC_POPCNTB(R3,R3) |
| 64ff3128 AB |
62 | srdi r4,r3,16 |
| 63 | add r3,r4,r3 | |
| 64 | srdi r4,r3,8 | |
| 65 | add r3,r4,r3 | |
| 66 | clrldi r3,r3,64-8 | |
| 67 | blr | |
| 68 | FTR_SECTION_ELSE_NESTED(51) | |
| c75df6f9 | 69 | PPC_POPCNTW(R3,R3) |
| 64ff3128 AB |
70 | clrldi r3,r3,64-8 |
| 71 | blr | |
| 72 | ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 51) | |
| 73 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB) | |
| 9445aa1a | 74 | EXPORT_SYMBOL(__arch_hweight32) |
| 64ff3128 AB |
75 | |
| 76 | _GLOBAL(__arch_hweight64) | |
| 77 | BEGIN_FTR_SECTION | |
| b1576fec | 78 | b __sw_hweight64 |
| 64ff3128 AB |
79 | nop |
| 80 | nop | |
| 81 | nop | |
| 82 | nop | |
| 83 | nop | |
| 84 | nop | |
| 85 | nop | |
| 86 | nop | |
| 87 | FTR_SECTION_ELSE | |
| 88 | BEGIN_FTR_SECTION_NESTED(52) | |
| c75df6f9 | 89 | PPC_POPCNTB(R3,R3) |
| 64ff3128 AB |
90 | srdi r4,r3,32 |
| 91 | add r3,r4,r3 | |
| 92 | srdi r4,r3,16 | |
| 93 | add r3,r4,r3 | |
| 94 | srdi r4,r3,8 | |
| 95 | add r3,r4,r3 | |
| 96 | clrldi r3,r3,64-8 | |
| 97 | blr | |
| 98 | FTR_SECTION_ELSE_NESTED(52) | |
| c75df6f9 | 99 | PPC_POPCNTD(R3,R3) |
| 64ff3128 AB |
100 | clrldi r3,r3,64-8 |
| 101 | blr | |
| 102 | ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 52) | |
| 103 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB) | |
| 9445aa1a | 104 | EXPORT_SYMBOL(__arch_hweight64) |