Merge tag 'for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power...
[linux-2.6-block.git] / arch / powerpc / lib / copyuser_64.S
CommitLineData
2874c5fd 1/* SPDX-License-Identifier: GPL-2.0-or-later */
14cf11af 2/*
14cf11af 3 * Copyright (C) 2002 Paul Mackerras, IBM Corp.
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4 */
5#include <asm/processor.h>
6#include <asm/ppc_asm.h>
9445aa1a 7#include <asm/export.h>
ec0c464c 8#include <asm/asm-compat.h>
2c86cd18 9#include <asm/feature-fixups.h>
14cf11af 10
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11#ifndef SELFTEST_CASE
12/* 0 == most CPUs, 1 == POWER6, 2 == Cell */
13#define SELFTEST_CASE 0
14#endif
15
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16#ifdef __BIG_ENDIAN__
17#define sLd sld /* Shift towards low-numbered address. */
18#define sHd srd /* Shift towards high-numbered address. */
19#else
20#define sLd srd /* Shift towards low-numbered address. */
21#define sHd sld /* Shift towards high-numbered address. */
22#endif
23
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24/*
25 * These macros are used to generate exception table entries.
26 * The exception handlers below use the original arguments
27 * (stored on the stack) and the point where we're up to in
28 * the destination buffer, i.e. the address of the first
29 * unmodified byte. Generally r3 points into the destination
30 * buffer, but the first unmodified byte is at a variable
31 * offset from r3. In the code below, the symbol r3_offset
32 * is set to indicate the current offset at each point in
33 * the code. This offset is then used as a negative offset
34 * from the exception handler code, and those instructions
35 * before the exception handlers are addi instructions that
36 * adjust r3 to point to the correct place.
37 */
38 .macro lex /* exception handler for load */
39100: EX_TABLE(100b, .Lld_exc - r3_offset)
40 .endm
41
42 .macro stex /* exception handler for store */
43100: EX_TABLE(100b, .Lst_exc - r3_offset)
44 .endm
45
14cf11af 46 .align 7
169c7cee 47_GLOBAL_TOC(__copy_tofrom_user)
15a3204d 48#ifdef CONFIG_PPC_BOOK3S_64
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49BEGIN_FTR_SECTION
50 nop
51FTR_SECTION_ELSE
52 b __copy_tofrom_user_power7
53ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
15a3204d 54#endif
a66086b8 55_GLOBAL(__copy_tofrom_user_base)
a7c81ce3 56 /* first check for a 4kB copy on a 4kB boundary */
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57 cmpldi cr1,r5,16
58 cmpdi cr6,r5,4096
59 or r0,r3,r4
60 neg r6,r3 /* LS 3 bits = # bytes to 8-byte dest bdry */
61 andi. r0,r0,4095
62 std r3,-24(r1)
63 crand cr0*4+2,cr0*4+2,cr6*4+2
64 std r4,-16(r1)
65 std r5,-8(r1)
66 dcbt 0,r4
3c726f8d 67 beq .Lcopy_page_4K
14cf11af 68 andi. r6,r6,7
694caf02 69 PPC_MTOCRF(0x01,r5)
14cf11af 70 blt cr1,.Lshort_copy
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71/* Below we want to nop out the bne if we're on a CPU that has the
72 * CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
73 * cleared.
74 * At the time of writing the only CPU that has this combination of bits
75 * set is Power6.
76 */
98c45f51 77test_feature = (SELFTEST_CASE == 1)
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78BEGIN_FTR_SECTION
79 nop
80FTR_SECTION_ELSE
14cf11af 81 bne .Ldst_unaligned
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82ALT_FTR_SECTION_END(CPU_FTR_UNALIGNED_LD_STD | CPU_FTR_CP_USE_DCBTZ, \
83 CPU_FTR_UNALIGNED_LD_STD)
14cf11af 84.Ldst_aligned:
14cf11af 85 addi r3,r3,-16
a7c81ce3 86r3_offset = 16
98c45f51 87test_feature = (SELFTEST_CASE == 0)
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88BEGIN_FTR_SECTION
89 andi. r0,r4,7
14cf11af 90 bne .Lsrc_unaligned
a4e22f02 91END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
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92 blt cr1,.Ldo_tail /* if < 16 bytes to copy */
93 srdi r0,r5,5
94 cmpdi cr1,r0,0
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95lex; ld r7,0(r4)
96lex; ld r6,8(r4)
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97 addi r4,r4,16
98 mtctr r0
99 andi. r0,r5,0x10
100 beq 22f
101 addi r3,r3,16
a7c81ce3 102r3_offset = 0
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103 addi r4,r4,-16
104 mr r9,r7
105 mr r8,r6
106 beq cr1,72f
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10721:
108lex; ld r7,16(r4)
109lex; ld r6,24(r4)
789c299c 110 addi r4,r4,32
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111stex; std r9,0(r3)
112r3_offset = 8
113stex; std r8,8(r3)
114r3_offset = 16
11522:
116lex; ld r9,0(r4)
117lex; ld r8,8(r4)
118stex; std r7,16(r3)
119r3_offset = 24
120stex; std r6,24(r3)
789c299c 121 addi r3,r3,32
a7c81ce3 122r3_offset = 0
14cf11af 123 bdnz 21b
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12472:
125stex; std r9,0(r3)
126r3_offset = 8
127stex; std r8,8(r3)
128r3_offset = 16
789c299c 129 andi. r5,r5,0xf
14cf11af 130 beq+ 3f
789c299c 131 addi r4,r4,16
14cf11af 132.Ldo_tail:
789c299c 133 addi r3,r3,16
a7c81ce3 134r3_offset = 0
789c299c 135 bf cr7*4+0,246f
a7c81ce3 136lex; ld r9,0(r4)
789c299c 137 addi r4,r4,8
a7c81ce3 138stex; std r9,0(r3)
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139 addi r3,r3,8
140246: bf cr7*4+1,1f
a7c81ce3 141lex; lwz r9,0(r4)
f72b728b 142 addi r4,r4,4
a7c81ce3 143stex; stw r9,0(r3)
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144 addi r3,r3,4
1451: bf cr7*4+2,2f
a7c81ce3 146lex; lhz r9,0(r4)
f72b728b 147 addi r4,r4,2
a7c81ce3 148stex; sth r9,0(r3)
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149 addi r3,r3,2
1502: bf cr7*4+3,3f
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151lex; lbz r9,0(r4)
152stex; stb r9,0(r3)
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1533: li r3,0
154 blr
155
156.Lsrc_unaligned:
a7c81ce3 157r3_offset = 16
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158 srdi r6,r5,3
159 addi r5,r5,-16
160 subf r4,r0,r4
161 srdi r7,r5,4
162 sldi r10,r0,3
163 cmpldi cr6,r6,3
164 andi. r5,r5,7
165 mtctr r7
166 subfic r11,r10,64
167 add r5,r5,r0
168 bt cr7*4+0,28f
169
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170lex; ld r9,0(r4) /* 3+2n loads, 2+2n stores */
171lex; ld r0,8(r4)
20151169 172 sLd r6,r9,r10
a7c81ce3 173lex; ldu r9,16(r4)
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174 sHd r7,r0,r11
175 sLd r8,r0,r10
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176 or r7,r7,r6
177 blt cr6,79f
a7c81ce3 178lex; ld r0,8(r4)
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179 b 2f
180
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18128:
182lex; ld r0,0(r4) /* 4+2n loads, 3+2n stores */
183lex; ldu r9,8(r4)
20151169 184 sLd r8,r0,r10
14cf11af 185 addi r3,r3,-8
a7c81ce3 186r3_offset = 24
14cf11af 187 blt cr6,5f
a7c81ce3 188lex; ld r0,8(r4)
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189 sHd r12,r9,r11
190 sLd r6,r9,r10
a7c81ce3 191lex; ldu r9,16(r4)
14cf11af 192 or r12,r8,r12
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193 sHd r7,r0,r11
194 sLd r8,r0,r10
14cf11af 195 addi r3,r3,16
a7c81ce3 196r3_offset = 8
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197 beq cr6,78f
198
1991: or r7,r7,r6
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200lex; ld r0,8(r4)
201stex; std r12,8(r3)
202r3_offset = 16
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2032: sHd r12,r9,r11
204 sLd r6,r9,r10
a7c81ce3 205lex; ldu r9,16(r4)
14cf11af 206 or r12,r8,r12
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207stex; stdu r7,16(r3)
208r3_offset = 8
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209 sHd r7,r0,r11
210 sLd r8,r0,r10
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211 bdnz 1b
212
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21378:
214stex; std r12,8(r3)
215r3_offset = 16
14cf11af 216 or r7,r7,r6
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21779:
218stex; std r7,16(r3)
219r3_offset = 24
20151169 2205: sHd r12,r9,r11
14cf11af 221 or r12,r8,r12
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222stex; std r12,24(r3)
223r3_offset = 32
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224 bne 6f
225 li r3,0
226 blr
2276: cmpwi cr1,r5,8
228 addi r3,r3,32
a7c81ce3 229r3_offset = 0
20151169 230 sLd r9,r9,r10
f72b728b 231 ble cr1,7f
a7c81ce3 232lex; ld r0,8(r4)
20151169 233 sHd r7,r0,r11
14cf11af 234 or r9,r7,r9
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2357:
236 bf cr7*4+1,1f
20151169 237#ifdef __BIG_ENDIAN__
f72b728b 238 rotldi r9,r9,32
20151169 239#endif
a7c81ce3 240stex; stw r9,0(r3)
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241#ifdef __LITTLE_ENDIAN__
242 rotrdi r9,r9,32
243#endif
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244 addi r3,r3,4
2451: bf cr7*4+2,2f
20151169 246#ifdef __BIG_ENDIAN__
f72b728b 247 rotldi r9,r9,16
20151169 248#endif
a7c81ce3 249stex; sth r9,0(r3)
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250#ifdef __LITTLE_ENDIAN__
251 rotrdi r9,r9,16
252#endif
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253 addi r3,r3,2
2542: bf cr7*4+3,3f
20151169 255#ifdef __BIG_ENDIAN__
f72b728b 256 rotldi r9,r9,8
20151169 257#endif
a7c81ce3 258stex; stb r9,0(r3)
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259#ifdef __LITTLE_ENDIAN__
260 rotrdi r9,r9,8
261#endif
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2623: li r3,0
263 blr
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264
265.Ldst_unaligned:
a7c81ce3 266r3_offset = 0
694caf02 267 PPC_MTOCRF(0x01,r6) /* put #bytes to 8B bdry into cr7 */
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268 subf r5,r6,r5
269 li r7,0
a4e22f02 270 cmpldi cr1,r5,16
14cf11af 271 bf cr7*4+3,1f
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272100: EX_TABLE(100b, .Lld_exc_r7)
273 lbz r0,0(r4)
274100: EX_TABLE(100b, .Lst_exc_r7)
275 stb r0,0(r3)
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276 addi r7,r7,1
2771: bf cr7*4+2,2f
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278100: EX_TABLE(100b, .Lld_exc_r7)
279 lhzx r0,r7,r4
280100: EX_TABLE(100b, .Lst_exc_r7)
281 sthx r0,r7,r3
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282 addi r7,r7,2
2832: bf cr7*4+1,3f
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284100: EX_TABLE(100b, .Lld_exc_r7)
285 lwzx r0,r7,r4
286100: EX_TABLE(100b, .Lst_exc_r7)
287 stwx r0,r7,r3
694caf02 2883: PPC_MTOCRF(0x01,r5)
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289 add r4,r6,r4
290 add r3,r6,r3
291 b .Ldst_aligned
292
293.Lshort_copy:
a7c81ce3 294r3_offset = 0
14cf11af 295 bf cr7*4+0,1f
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296lex; lwz r0,0(r4)
297lex; lwz r9,4(r4)
14cf11af 298 addi r4,r4,8
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299stex; stw r0,0(r3)
300stex; stw r9,4(r3)
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301 addi r3,r3,8
3021: bf cr7*4+1,2f
a7c81ce3 303lex; lwz r0,0(r4)
14cf11af 304 addi r4,r4,4
a7c81ce3 305stex; stw r0,0(r3)
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306 addi r3,r3,4
3072: bf cr7*4+2,3f
a7c81ce3 308lex; lhz r0,0(r4)
14cf11af 309 addi r4,r4,2
a7c81ce3 310stex; sth r0,0(r3)
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311 addi r3,r3,2
3123: bf cr7*4+3,4f
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313lex; lbz r0,0(r4)
314stex; stb r0,0(r3)
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3154: li r3,0
316 blr
317
318/*
319 * exception handlers follow
320 * we have to return the number of bytes not copied
321 * for an exception on a load, we set the rest of the destination to 0
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322 * Note that the number of bytes of instructions for adjusting r3 needs
323 * to equal the amount of the adjustment, due to the trick of using
324 * .Lld_exc - r3_offset as the handler address.
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325 */
326
a7c81ce3 327.Lld_exc_r7:
14cf11af 328 add r3,r3,r7
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329 b .Lld_exc
330
331 /* adjust by 24 */
14cf11af 332 addi r3,r3,8
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333 nop
334 /* adjust by 16 */
14cf11af 335 addi r3,r3,8
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336 nop
337 /* adjust by 8 */
14cf11af 338 addi r3,r3,8
a7c81ce3 339 nop
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340
341/*
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342 * Here we have had a fault on a load and r3 points to the first
343 * unmodified byte of the destination. We use the original arguments
344 * and r3 to work out how much wasn't copied. Since we load some
345 * distance ahead of the stores, we continue copying byte-by-byte until
346 * we hit the load fault again in order to copy as much as possible.
14cf11af 347 */
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348.Lld_exc:
349 ld r6,-24(r1)
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350 ld r4,-16(r1)
351 ld r5,-8(r1)
352 subf r6,r6,r3
353 add r4,r4,r6
354 subf r5,r6,r5 /* #bytes left to go */
355
356/*
357 * first see if we can copy any more bytes before hitting another exception
358 */
359 mtctr r5
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360r3_offset = 0
361100: EX_TABLE(100b, .Ldone)
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36243: lbz r0,0(r4)
363 addi r4,r4,1
a7c81ce3 364stex; stb r0,0(r3)
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365 addi r3,r3,1
366 bdnz 43b
367 li r3,0 /* huh? all copied successfully this time? */
368 blr
369
370/*
3448890c 371 * here we have trapped again, amount remaining is in ctr.
14cf11af 372 */
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373.Ldone:
374 mfctr r3
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375 blr
376
377/*
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378 * exception handlers for stores: we need to work out how many bytes
379 * weren't copied, and we may need to copy some more.
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380 * Note that the number of bytes of instructions for adjusting r3 needs
381 * to equal the amount of the adjustment, due to the trick of using
382 * .Lst_exc - r3_offset as the handler address.
14cf11af 383 */
a7c81ce3 384.Lst_exc_r7:
14cf11af 385 add r3,r3,r7
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386 b .Lst_exc
387
388 /* adjust by 24 */
14cf11af 389 addi r3,r3,8
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390 nop
391 /* adjust by 16 */
14cf11af 392 addi r3,r3,8
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393 nop
394 /* adjust by 8 */
14cf11af 395 addi r3,r3,4
a7c81ce3 396 /* adjust by 4 */
14cf11af 397 addi r3,r3,4
a7c81ce3 398.Lst_exc:
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399 ld r6,-24(r1) /* original destination pointer */
400 ld r4,-16(r1) /* original source pointer */
401 ld r5,-8(r1) /* original number of bytes */
402 add r7,r6,r5
403 /*
404 * If the destination pointer isn't 8-byte aligned,
405 * we may have got the exception as a result of a
406 * store that overlapped a page boundary, so we may be
407 * able to copy a few more bytes.
408 */
40917: andi. r0,r3,7
410 beq 19f
411 subf r8,r6,r3 /* #bytes copied */
412100: EX_TABLE(100b,19f)
413 lbzx r0,r8,r4
414100: EX_TABLE(100b,19f)
415 stb r0,0(r3)
416 addi r3,r3,1
417 cmpld r3,r7
418 blt 17b
41919: subf r3,r3,r7 /* #bytes not copied in r3 */
3448890c 420 blr
14cf11af 421
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422/*
423 * Routine to copy a whole page of data, optimized for POWER4.
424 * On POWER4 it is more than 50% faster than the simple loop
0f369103 425 * above (following the .Ldst_aligned label).
14cf11af 426 */
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427 .macro exc
428100: EX_TABLE(100b, .Labort)
429 .endm
3c726f8d 430.Lcopy_page_4K:
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431 std r31,-32(1)
432 std r30,-40(1)
433 std r29,-48(1)
434 std r28,-56(1)
435 std r27,-64(1)
436 std r26,-72(1)
437 std r25,-80(1)
438 std r24,-88(1)
439 std r23,-96(1)
440 std r22,-104(1)
441 std r21,-112(1)
442 std r20,-120(1)
443 li r5,4096/32 - 1
444 addi r3,r3,-8
445 li r0,5
4460: addi r5,r5,-24
447 mtctr r0
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448exc; ld r22,640(4)
449exc; ld r21,512(4)
450exc; ld r20,384(4)
451exc; ld r11,256(4)
452exc; ld r9,128(4)
453exc; ld r7,0(4)
454exc; ld r25,648(4)
455exc; ld r24,520(4)
456exc; ld r23,392(4)
457exc; ld r10,264(4)
458exc; ld r8,136(4)
459exc; ldu r6,8(4)
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460 cmpwi r5,24
4611:
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462exc; std r22,648(3)
463exc; std r21,520(3)
464exc; std r20,392(3)
465exc; std r11,264(3)
466exc; std r9,136(3)
467exc; std r7,8(3)
468exc; ld r28,648(4)
469exc; ld r27,520(4)
470exc; ld r26,392(4)
471exc; ld r31,264(4)
472exc; ld r30,136(4)
473exc; ld r29,8(4)
474exc; std r25,656(3)
475exc; std r24,528(3)
476exc; std r23,400(3)
477exc; std r10,272(3)
478exc; std r8,144(3)
479exc; std r6,16(3)
480exc; ld r22,656(4)
481exc; ld r21,528(4)
482exc; ld r20,400(4)
483exc; ld r11,272(4)
484exc; ld r9,144(4)
485exc; ld r7,16(4)
486exc; std r28,664(3)
487exc; std r27,536(3)
488exc; std r26,408(3)
489exc; std r31,280(3)
490exc; std r30,152(3)
491exc; stdu r29,24(3)
492exc; ld r25,664(4)
493exc; ld r24,536(4)
494exc; ld r23,408(4)
495exc; ld r10,280(4)
496exc; ld r8,152(4)
497exc; ldu r6,24(4)
14cf11af 498 bdnz 1b
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499exc; std r22,648(3)
500exc; std r21,520(3)
501exc; std r20,392(3)
502exc; std r11,264(3)
503exc; std r9,136(3)
504exc; std r7,8(3)
505 addi r4,r4,640
506 addi r3,r3,648
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507 bge 0b
508 mtctr r5
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509exc; ld r7,0(4)
510exc; ld r8,8(4)
511exc; ldu r9,16(4)
14cf11af 5123:
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513exc; ld r10,8(4)
514exc; std r7,8(3)
515exc; ld r7,16(4)
516exc; std r8,16(3)
517exc; ld r8,24(4)
518exc; std r9,24(3)
519exc; ldu r9,32(4)
520exc; stdu r10,32(3)
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521 bdnz 3b
5224:
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523exc; ld r10,8(4)
524exc; std r7,8(3)
525exc; std r8,16(3)
526exc; std r9,24(3)
527exc; std r10,32(3)
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5289: ld r20,-120(1)
529 ld r21,-112(1)
530 ld r22,-104(1)
531 ld r23,-96(1)
532 ld r24,-88(1)
533 ld r25,-80(1)
534 ld r26,-72(1)
535 ld r27,-64(1)
536 ld r28,-56(1)
537 ld r29,-48(1)
538 ld r30,-40(1)
539 ld r31,-32(1)
540 li r3,0
541 blr
542
543/*
544 * on an exception, reset to the beginning and jump back into the
545 * standard __copy_tofrom_user
546 */
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PM
547.Labort:
548 ld r20,-120(1)
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PM
549 ld r21,-112(1)
550 ld r22,-104(1)
551 ld r23,-96(1)
552 ld r24,-88(1)
553 ld r25,-80(1)
554 ld r26,-72(1)
555 ld r27,-64(1)
556 ld r28,-56(1)
557 ld r29,-48(1)
558 ld r30,-40(1)
559 ld r31,-32(1)
560 ld r3,-24(r1)
561 ld r4,-16(r1)
562 li r5,4096
563 b .Ldst_aligned
9445aa1a 564EXPORT_SYMBOL(__copy_tofrom_user)