powerpc/lib/code-patching: Don't use struct 'ppc_inst' for runnable code in tests.
[linux-2.6-block.git] / arch / powerpc / lib / code-patching.c
CommitLineData
2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
aaddd3ea
ME
2/*
3 * Copyright 2008 Michael Ellerman, IBM Corporation.
aaddd3ea
ME
4 */
5
6#include <linux/kernel.h>
71f6e58e 7#include <linux/kprobes.h>
ae0dc736
ME
8#include <linux/vmalloc.h>
9#include <linux/init.h>
27ac792c 10#include <linux/mm.h>
37bc3e5f
BS
11#include <linux/cpuhotplug.h>
12#include <linux/slab.h>
7c0f6ba6 13#include <linux/uaccess.h>
aaddd3ea 14
37bc3e5f
BS
15#include <asm/tlbflush.h>
16#include <asm/page.h>
17#include <asm/code-patching.h>
252eb558 18#include <asm/setup.h>
75346251 19#include <asm/inst.h>
aaddd3ea 20
94afd069
JN
21static int __patch_instruction(struct ppc_inst *exec_addr, struct ppc_inst instr,
22 struct ppc_inst *patch_addr)
aaddd3ea 23{
e63ceebd
CL
24 if (!ppc_inst_prefixed(instr)) {
25 u32 val = ppc_inst_val(instr);
26
27 __put_kernel_nofault(patch_addr, &val, u32, failed);
28 } else {
693557eb 29 u64 val = ppc_inst_as_ulong(instr);
e63ceebd
CL
30
31 __put_kernel_nofault(patch_addr, &val, u64, failed);
32 }
37bc3e5f 33
8cf4c057
CL
34 asm ("dcbst 0, %0; sync; icbi 0,%1; sync; isync" :: "r" (patch_addr),
35 "r" (exec_addr));
37bc3e5f
BS
36
37 return 0;
e64ac41a
CL
38
39failed:
40 return -EFAULT;
37bc3e5f
BS
41}
42
94afd069 43int raw_patch_instruction(struct ppc_inst *addr, struct ppc_inst instr)
8cf4c057
CL
44{
45 return __patch_instruction(addr, instr, addr);
46}
47
37bc3e5f
BS
48#ifdef CONFIG_STRICT_KERNEL_RWX
49static DEFINE_PER_CPU(struct vm_struct *, text_poke_area);
50
51static int text_area_cpu_up(unsigned int cpu)
52{
53 struct vm_struct *area;
54
55 area = get_vm_area(PAGE_SIZE, VM_ALLOC);
56 if (!area) {
57 WARN_ONCE(1, "Failed to create text area for cpu %d\n",
58 cpu);
59 return -1;
60 }
61 this_cpu_write(text_poke_area, area);
62
63 return 0;
64}
65
66static int text_area_cpu_down(unsigned int cpu)
67{
68 free_vm_area(this_cpu_read(text_poke_area));
69 return 0;
70}
71
72/*
73 * Run as a late init call. This allows all the boot time patching to be done
74 * simply by patching the code, and then we're called here prior to
75 * mark_rodata_ro(), which happens after all init calls are run. Although
76 * BUG_ON() is rude, in this case it should only happen if ENOMEM, and we judge
77 * it as being preferable to a kernel that will crash later when someone tries
78 * to use patch_instruction().
79 */
80static int __init setup_text_poke_area(void)
81{
82 BUG_ON(!cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
83 "powerpc/text_poke:online", text_area_cpu_up,
84 text_area_cpu_down));
85
86 return 0;
87}
88late_initcall(setup_text_poke_area);
89
90/*
91 * This can be called for kernel text or a module.
92 */
93static int map_patch_area(void *addr, unsigned long text_poke_addr)
94{
95 unsigned long pfn;
96 int err;
97
ccc8fcf7 98 if (is_vmalloc_or_module_addr(addr))
37bc3e5f
BS
99 pfn = vmalloc_to_pfn(addr);
100 else
101 pfn = __pa_symbol(addr) >> PAGE_SHIFT;
102
c766ee72 103 err = map_kernel_page(text_poke_addr, (pfn << PAGE_SHIFT), PAGE_KERNEL);
37bc3e5f
BS
104
105 pr_devel("Mapped addr %lx with pfn %lx:%d\n", text_poke_addr, pfn, err);
106 if (err)
107 return -1;
108
109 return 0;
110}
111
112static inline int unmap_patch_area(unsigned long addr)
113{
114 pte_t *ptep;
115 pmd_t *pmdp;
116 pud_t *pudp;
2fb47060 117 p4d_t *p4dp;
37bc3e5f
BS
118 pgd_t *pgdp;
119
120 pgdp = pgd_offset_k(addr);
121 if (unlikely(!pgdp))
122 return -EINVAL;
123
2fb47060
MR
124 p4dp = p4d_offset(pgdp, addr);
125 if (unlikely(!p4dp))
126 return -EINVAL;
127
128 pudp = pud_offset(p4dp, addr);
37bc3e5f
BS
129 if (unlikely(!pudp))
130 return -EINVAL;
131
132 pmdp = pmd_offset(pudp, addr);
133 if (unlikely(!pmdp))
134 return -EINVAL;
135
136 ptep = pte_offset_kernel(pmdp, addr);
137 if (unlikely(!ptep))
138 return -EINVAL;
139
140 pr_devel("clearing mm %p, pte %p, addr %lx\n", &init_mm, ptep, addr);
141
142 /*
143 * In hash, pte_clear flushes the tlb, in radix, we have to
144 */
145 pte_clear(&init_mm, addr, ptep);
146 flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
147
b6e37968 148 return 0;
aaddd3ea
ME
149}
150
94afd069 151static int do_patch_instruction(struct ppc_inst *addr, struct ppc_inst instr)
37bc3e5f
BS
152{
153 int err;
94afd069 154 struct ppc_inst *patch_addr = NULL;
37bc3e5f
BS
155 unsigned long flags;
156 unsigned long text_poke_addr;
157 unsigned long kaddr = (unsigned long)addr;
158
159 /*
160 * During early early boot patch_instruction is called
161 * when text_poke_area is not ready, but we still need
162 * to allow patching. We just do the plain old patching
37bc3e5f 163 */
8183d99f 164 if (!this_cpu_read(text_poke_area))
8cf4c057 165 return raw_patch_instruction(addr, instr);
37bc3e5f
BS
166
167 local_irq_save(flags);
168
169 text_poke_addr = (unsigned long)__this_cpu_read(text_poke_area)->addr;
170 if (map_patch_area(addr, text_poke_addr)) {
171 err = -1;
172 goto out;
173 }
174
94afd069 175 patch_addr = (struct ppc_inst *)(text_poke_addr + (kaddr & ~PAGE_MASK));
37bc3e5f 176
8cf4c057 177 __patch_instruction(addr, instr, patch_addr);
37bc3e5f
BS
178
179 err = unmap_patch_area(text_poke_addr);
180 if (err)
181 pr_warn("failed to unmap %lx\n", text_poke_addr);
182
183out:
184 local_irq_restore(flags);
185
186 return err;
187}
188#else /* !CONFIG_STRICT_KERNEL_RWX */
189
94afd069 190static int do_patch_instruction(struct ppc_inst *addr, struct ppc_inst instr)
37bc3e5f 191{
8cf4c057 192 return raw_patch_instruction(addr, instr);
37bc3e5f
BS
193}
194
195#endif /* CONFIG_STRICT_KERNEL_RWX */
b45ba4a5 196
94afd069 197int patch_instruction(struct ppc_inst *addr, struct ppc_inst instr)
b45ba4a5
CL
198{
199 /* Make sure we aren't patching a freed init section */
200 if (init_mem_is_free && init_section_contains(addr, 4)) {
201 pr_debug("Skipping init section patching addr: 0x%px\n", addr);
202 return 0;
203 }
204 return do_patch_instruction(addr, instr);
205}
37bc3e5f
BS
206NOKPROBE_SYMBOL(patch_instruction);
207
94afd069 208int patch_branch(struct ppc_inst *addr, unsigned long target, int flags)
e7a57273 209{
94afd069 210 struct ppc_inst instr;
7c95d889
JN
211
212 create_branch(&instr, addr, target, flags);
213 return patch_instruction(addr, instr);
e7a57273
ME
214}
215
ebfa50df
A
216bool is_offset_in_branch_range(long offset)
217{
218 /*
219 * Powerpc branch instruction is :
220 *
221 * 0 6 30 31
222 * +---------+----------------+---+---+
223 * | opcode | LI |AA |LK |
224 * +---------+----------------+---+---+
225 * Where AA = 0 and LK = 0
226 *
227 * LI is a signed 24 bits integer. The real branch offset is computed
228 * by: imm32 = SignExtend(LI:'0b00', 32);
229 *
230 * So the maximum forward branch should be:
231 * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
232 * The maximum backward branch should be:
233 * (0xff800000 << 2) = 0xfe000000 = -0x2000000
234 */
235 return (offset >= -0x2000000 && offset <= 0x1fffffc && !(offset & 0x3));
236}
237
51c9c084
A
238/*
239 * Helper to check if a given instruction is a conditional branch
240 * Derived from the conditional checks in analyse_instr()
241 */
94afd069 242bool is_conditional_branch(struct ppc_inst instr)
51c9c084 243{
8094892d 244 unsigned int opcode = ppc_inst_primary_opcode(instr);
51c9c084
A
245
246 if (opcode == 16) /* bc, bca, bcl, bcla */
247 return true;
248 if (opcode == 19) {
777e26f0 249 switch ((ppc_inst_val(instr) >> 1) & 0x3ff) {
51c9c084
A
250 case 16: /* bclr, bclrl */
251 case 528: /* bcctr, bcctrl */
252 case 560: /* bctar, bctarl */
253 return true;
254 }
255 }
256 return false;
257}
71f6e58e 258NOKPROBE_SYMBOL(is_conditional_branch);
51c9c084 259
94afd069
JN
260int create_branch(struct ppc_inst *instr,
261 const struct ppc_inst *addr,
7c95d889 262 unsigned long target, int flags)
aaddd3ea 263{
053a858e 264 long offset;
aaddd3ea 265
94afd069 266 *instr = ppc_inst(0);
053a858e 267 offset = target;
aaddd3ea 268 if (! (flags & BRANCH_ABSOLUTE))
053a858e
ME
269 offset = offset - (unsigned long)addr;
270
271 /* Check we can represent the target in the instruction format */
ebfa50df 272 if (!is_offset_in_branch_range(offset))
7c95d889 273 return 1;
aaddd3ea
ME
274
275 /* Mask out the flags and target, so they don't step on each other. */
94afd069 276 *instr = ppc_inst(0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC));
aaddd3ea 277
7c95d889 278 return 0;
aaddd3ea 279}
411781a2 280
94afd069 281int create_cond_branch(struct ppc_inst *instr, const struct ppc_inst *addr,
7c95d889 282 unsigned long target, int flags)
411781a2 283{
411781a2
ME
284 long offset;
285
286 offset = target;
287 if (! (flags & BRANCH_ABSOLUTE))
288 offset = offset - (unsigned long)addr;
289
290 /* Check we can represent the target in the instruction format */
291 if (offset < -0x8000 || offset > 0x7FFF || offset & 0x3)
7c95d889 292 return 1;
411781a2
ME
293
294 /* Mask out the flags and target, so they don't step on each other. */
94afd069 295 *instr = ppc_inst(0x40000000 | (flags & 0x3FF0003) | (offset & 0xFFFC));
411781a2 296
7c95d889 297 return 0;
411781a2
ME
298}
299
94afd069 300static unsigned int branch_opcode(struct ppc_inst instr)
411781a2 301{
8094892d 302 return ppc_inst_primary_opcode(instr) & 0x3F;
411781a2
ME
303}
304
94afd069 305static int instr_is_branch_iform(struct ppc_inst instr)
411781a2
ME
306{
307 return branch_opcode(instr) == 18;
308}
309
94afd069 310static int instr_is_branch_bform(struct ppc_inst instr)
411781a2
ME
311{
312 return branch_opcode(instr) == 16;
313}
314
94afd069 315int instr_is_relative_branch(struct ppc_inst instr)
411781a2 316{
777e26f0 317 if (ppc_inst_val(instr) & BRANCH_ABSOLUTE)
411781a2
ME
318 return 0;
319
320 return instr_is_branch_iform(instr) || instr_is_branch_bform(instr);
321}
322
94afd069 323int instr_is_relative_link_branch(struct ppc_inst instr)
b9eab08d 324{
777e26f0 325 return instr_is_relative_branch(instr) && (ppc_inst_val(instr) & BRANCH_SET_LINK);
b9eab08d
JP
326}
327
94afd069 328static unsigned long branch_iform_target(const struct ppc_inst *instr)
411781a2
ME
329{
330 signed long imm;
331
18c85964 332 imm = ppc_inst_val(ppc_inst_read(instr)) & 0x3FFFFFC;
411781a2
ME
333
334 /* If the top bit of the immediate value is set this is negative */
335 if (imm & 0x2000000)
336 imm -= 0x4000000;
337
18c85964 338 if ((ppc_inst_val(ppc_inst_read(instr)) & BRANCH_ABSOLUTE) == 0)
411781a2
ME
339 imm += (unsigned long)instr;
340
341 return (unsigned long)imm;
342}
343
94afd069 344static unsigned long branch_bform_target(const struct ppc_inst *instr)
411781a2
ME
345{
346 signed long imm;
347
18c85964 348 imm = ppc_inst_val(ppc_inst_read(instr)) & 0xFFFC;
411781a2
ME
349
350 /* If the top bit of the immediate value is set this is negative */
351 if (imm & 0x8000)
352 imm -= 0x10000;
353
18c85964 354 if ((ppc_inst_val(ppc_inst_read(instr)) & BRANCH_ABSOLUTE) == 0)
411781a2
ME
355 imm += (unsigned long)instr;
356
357 return (unsigned long)imm;
358}
359
94afd069 360unsigned long branch_target(const struct ppc_inst *instr)
411781a2 361{
f8faaffa 362 if (instr_is_branch_iform(ppc_inst_read(instr)))
411781a2 363 return branch_iform_target(instr);
f8faaffa 364 else if (instr_is_branch_bform(ppc_inst_read(instr)))
411781a2
ME
365 return branch_bform_target(instr);
366
367 return 0;
368}
369
94afd069
JN
370int translate_branch(struct ppc_inst *instr, const struct ppc_inst *dest,
371 const struct ppc_inst *src)
411781a2
ME
372{
373 unsigned long target;
411781a2
ME
374 target = branch_target(src);
375
f8faaffa
JN
376 if (instr_is_branch_iform(ppc_inst_read(src)))
377 return create_branch(instr, dest, target,
378 ppc_inst_val(ppc_inst_read(src)));
379 else if (instr_is_branch_bform(ppc_inst_read(src)))
380 return create_cond_branch(instr, dest, target,
381 ppc_inst_val(ppc_inst_read(src)));
411781a2 382
7c95d889 383 return 1;
411781a2 384}
ae0dc736 385
1e8341ae
KH
386#ifdef CONFIG_PPC_BOOK3E_64
387void __patch_exception(int exc, unsigned long addr)
388{
389 extern unsigned int interrupt_base_book3e;
390 unsigned int *ibase = &interrupt_base_book3e;
391
392 /* Our exceptions vectors start with a NOP and -then- a branch
393 * to deal with single stepping from userspace which stops on
394 * the second instruction. Thus we need to patch the second
395 * instruction of the exception, not the first one
396 */
397
94afd069 398 patch_branch((struct ppc_inst *)(ibase + (exc / 4) + 1), addr, 0);
1e8341ae
KH
399}
400#endif
ae0dc736
ME
401
402#ifdef CONFIG_CODE_PATCHING_SELFTEST
403
6c0d181d
CL
404static int instr_is_branch_to_addr(const struct ppc_inst *instr, unsigned long addr)
405{
406 if (instr_is_branch_iform(ppc_inst_read(instr)) ||
407 instr_is_branch_bform(ppc_inst_read(instr)))
408 return branch_target(instr) == addr;
409
410 return 0;
411}
412
ae0dc736
ME
413static void __init test_trampoline(void)
414{
415 asm ("nop;\n");
416}
417
418#define check(x) \
419 if (!(x)) printk("code-patching: test failed at line %d\n", __LINE__);
420
421static void __init test_branch_iform(void)
422{
7c95d889 423 int err;
94afd069 424 struct ppc_inst instr;
e90a21ea
CL
425 u32 tmp[2];
426 struct ppc_inst *iptr = (struct ppc_inst *)tmp;
427 unsigned long addr = (unsigned long)tmp;
ae0dc736
ME
428
429 /* The simplest case, branch to self, no flags */
75346251 430 check(instr_is_branch_iform(ppc_inst(0x48000000)));
ae0dc736 431 /* All bits of target set, and flags */
75346251 432 check(instr_is_branch_iform(ppc_inst(0x4bffffff)));
ae0dc736 433 /* High bit of opcode set, which is wrong */
75346251 434 check(!instr_is_branch_iform(ppc_inst(0xcbffffff)));
ae0dc736 435 /* Middle bits of opcode set, which is wrong */
75346251 436 check(!instr_is_branch_iform(ppc_inst(0x7bffffff)));
ae0dc736
ME
437
438 /* Simplest case, branch to self with link */
75346251 439 check(instr_is_branch_iform(ppc_inst(0x48000001)));
ae0dc736 440 /* All bits of targets set */
75346251 441 check(instr_is_branch_iform(ppc_inst(0x4bfffffd)));
ae0dc736 442 /* Some bits of targets set */
75346251 443 check(instr_is_branch_iform(ppc_inst(0x4bff00fd)));
ae0dc736 444 /* Must be a valid branch to start with */
75346251 445 check(!instr_is_branch_iform(ppc_inst(0x7bfffffd)));
ae0dc736
ME
446
447 /* Absolute branch to 0x100 */
e90a21ea
CL
448 patch_instruction(iptr, ppc_inst(0x48000103));
449 check(instr_is_branch_to_addr(iptr, 0x100));
ae0dc736 450 /* Absolute branch to 0x420fc */
e90a21ea
CL
451 patch_instruction(iptr, ppc_inst(0x480420ff));
452 check(instr_is_branch_to_addr(iptr, 0x420fc));
ae0dc736 453 /* Maximum positive relative branch, + 20MB - 4B */
e90a21ea
CL
454 patch_instruction(iptr, ppc_inst(0x49fffffc));
455 check(instr_is_branch_to_addr(iptr, addr + 0x1FFFFFC));
ae0dc736 456 /* Smallest negative relative branch, - 4B */
e90a21ea
CL
457 patch_instruction(iptr, ppc_inst(0x4bfffffc));
458 check(instr_is_branch_to_addr(iptr, addr - 4));
ae0dc736 459 /* Largest negative relative branch, - 32 MB */
e90a21ea
CL
460 patch_instruction(iptr, ppc_inst(0x4a000000));
461 check(instr_is_branch_to_addr(iptr, addr - 0x2000000));
ae0dc736
ME
462
463 /* Branch to self, with link */
e90a21ea
CL
464 err = create_branch(&instr, iptr, addr, BRANCH_SET_LINK);
465 patch_instruction(iptr, instr);
466 check(instr_is_branch_to_addr(iptr, addr));
ae0dc736
ME
467
468 /* Branch to self - 0x100, with link */
e90a21ea
CL
469 err = create_branch(&instr, iptr, addr - 0x100, BRANCH_SET_LINK);
470 patch_instruction(iptr, instr);
471 check(instr_is_branch_to_addr(iptr, addr - 0x100));
ae0dc736
ME
472
473 /* Branch to self + 0x100, no link */
e90a21ea
CL
474 err = create_branch(&instr, iptr, addr + 0x100, 0);
475 patch_instruction(iptr, instr);
476 check(instr_is_branch_to_addr(iptr, addr + 0x100));
ae0dc736
ME
477
478 /* Maximum relative negative offset, - 32 MB */
e90a21ea
CL
479 err = create_branch(&instr, iptr, addr - 0x2000000, BRANCH_SET_LINK);
480 patch_instruction(iptr, instr);
481 check(instr_is_branch_to_addr(iptr, addr - 0x2000000));
ae0dc736
ME
482
483 /* Out of range relative negative offset, - 32 MB + 4*/
e90a21ea 484 err = create_branch(&instr, iptr, addr - 0x2000004, BRANCH_SET_LINK);
7c95d889 485 check(err);
ae0dc736
ME
486
487 /* Out of range relative positive offset, + 32 MB */
e90a21ea 488 err = create_branch(&instr, iptr, addr + 0x2000000, BRANCH_SET_LINK);
7c95d889 489 check(err);
ae0dc736
ME
490
491 /* Unaligned target */
e90a21ea 492 err = create_branch(&instr, iptr, addr + 3, BRANCH_SET_LINK);
7c95d889 493 check(err);
ae0dc736
ME
494
495 /* Check flags are masked correctly */
e90a21ea
CL
496 err = create_branch(&instr, iptr, addr, 0xFFFFFFFC);
497 patch_instruction(iptr, instr);
498 check(instr_is_branch_to_addr(iptr, addr));
217862d9 499 check(ppc_inst_equal(instr, ppc_inst(0x48000000)));
ae0dc736
ME
500}
501
502static void __init test_create_function_call(void)
503{
94afd069 504 struct ppc_inst *iptr;
ae0dc736 505 unsigned long dest;
94afd069 506 struct ppc_inst instr;
ae0dc736
ME
507
508 /* Check we can create a function call */
94afd069 509 iptr = (struct ppc_inst *)ppc_function_entry(test_trampoline);
ae0dc736 510 dest = ppc_function_entry(test_create_function_call);
7c95d889
JN
511 create_branch(&instr, iptr, dest, BRANCH_SET_LINK);
512 patch_instruction(iptr, instr);
ae0dc736
ME
513 check(instr_is_branch_to_addr(iptr, dest));
514}
515
516static void __init test_branch_bform(void)
517{
7c95d889 518 int err;
ae0dc736 519 unsigned long addr;
94afd069 520 struct ppc_inst *iptr, instr;
e90a21ea 521 u32 tmp[2];
94afd069 522 unsigned int flags;
ae0dc736 523
e90a21ea 524 iptr = (struct ppc_inst *)tmp;
ae0dc736
ME
525 addr = (unsigned long)iptr;
526
527 /* The simplest case, branch to self, no flags */
75346251 528 check(instr_is_branch_bform(ppc_inst(0x40000000)));
ae0dc736 529 /* All bits of target set, and flags */
75346251 530 check(instr_is_branch_bform(ppc_inst(0x43ffffff)));
ae0dc736 531 /* High bit of opcode set, which is wrong */
75346251 532 check(!instr_is_branch_bform(ppc_inst(0xc3ffffff)));
ae0dc736 533 /* Middle bits of opcode set, which is wrong */
75346251 534 check(!instr_is_branch_bform(ppc_inst(0x7bffffff)));
ae0dc736
ME
535
536 /* Absolute conditional branch to 0x100 */
e90a21ea
CL
537 patch_instruction(iptr, ppc_inst(0x43ff0103));
538 check(instr_is_branch_to_addr(iptr, 0x100));
ae0dc736 539 /* Absolute conditional branch to 0x20fc */
e90a21ea
CL
540 patch_instruction(iptr, ppc_inst(0x43ff20ff));
541 check(instr_is_branch_to_addr(iptr, 0x20fc));
ae0dc736 542 /* Maximum positive relative conditional branch, + 32 KB - 4B */
e90a21ea
CL
543 patch_instruction(iptr, ppc_inst(0x43ff7ffc));
544 check(instr_is_branch_to_addr(iptr, addr + 0x7FFC));
ae0dc736 545 /* Smallest negative relative conditional branch, - 4B */
e90a21ea
CL
546 patch_instruction(iptr, ppc_inst(0x43fffffc));
547 check(instr_is_branch_to_addr(iptr, addr - 4));
ae0dc736 548 /* Largest negative relative conditional branch, - 32 KB */
e90a21ea
CL
549 patch_instruction(iptr, ppc_inst(0x43ff8000));
550 check(instr_is_branch_to_addr(iptr, addr - 0x8000));
ae0dc736
ME
551
552 /* All condition code bits set & link */
553 flags = 0x3ff000 | BRANCH_SET_LINK;
554
555 /* Branch to self */
7c95d889 556 err = create_cond_branch(&instr, iptr, addr, flags);
e90a21ea
CL
557 patch_instruction(iptr, instr);
558 check(instr_is_branch_to_addr(iptr, addr));
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ME
559
560 /* Branch to self - 0x100 */
7c95d889 561 err = create_cond_branch(&instr, iptr, addr - 0x100, flags);
e90a21ea
CL
562 patch_instruction(iptr, instr);
563 check(instr_is_branch_to_addr(iptr, addr - 0x100));
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ME
564
565 /* Branch to self + 0x100 */
7c95d889 566 err = create_cond_branch(&instr, iptr, addr + 0x100, flags);
e90a21ea
CL
567 patch_instruction(iptr, instr);
568 check(instr_is_branch_to_addr(iptr, addr + 0x100));
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ME
569
570 /* Maximum relative negative offset, - 32 KB */
7c95d889 571 err = create_cond_branch(&instr, iptr, addr - 0x8000, flags);
e90a21ea
CL
572 patch_instruction(iptr, instr);
573 check(instr_is_branch_to_addr(iptr, addr - 0x8000));
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ME
574
575 /* Out of range relative negative offset, - 32 KB + 4*/
7c95d889
JN
576 err = create_cond_branch(&instr, iptr, addr - 0x8004, flags);
577 check(err);
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ME
578
579 /* Out of range relative positive offset, + 32 KB */
7c95d889
JN
580 err = create_cond_branch(&instr, iptr, addr + 0x8000, flags);
581 check(err);
ae0dc736
ME
582
583 /* Unaligned target */
7c95d889
JN
584 err = create_cond_branch(&instr, iptr, addr + 3, flags);
585 check(err);
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ME
586
587 /* Check flags are masked correctly */
7c95d889 588 err = create_cond_branch(&instr, iptr, addr, 0xFFFFFFFC);
e90a21ea
CL
589 patch_instruction(iptr, instr);
590 check(instr_is_branch_to_addr(iptr, addr));
217862d9 591 check(ppc_inst_equal(instr, ppc_inst(0x43FF0000)));
ae0dc736
ME
592}
593
594static void __init test_translate_branch(void)
595{
596 unsigned long addr;
0b582db5 597 void *p, *q;
94afd069 598 struct ppc_inst instr;
ae0dc736
ME
599 void *buf;
600
601 buf = vmalloc(PAGE_ALIGN(0x2000000 + 1));
602 check(buf);
603 if (!buf)
604 return;
605
606 /* Simple case, branch to self moved a little */
607 p = buf;
608 addr = (unsigned long)p;
609 patch_branch(p, addr, 0);
610 check(instr_is_branch_to_addr(p, addr));
0b582db5 611 q = p + 4;
7c95d889
JN
612 translate_branch(&instr, q, p);
613 patch_instruction(q, instr);
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ME
614 check(instr_is_branch_to_addr(q, addr));
615
616 /* Maximum negative case, move b . to addr + 32 MB */
617 p = buf;
618 addr = (unsigned long)p;
619 patch_branch(p, addr, 0);
620 q = buf + 0x2000000;
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JN
621 translate_branch(&instr, q, p);
622 patch_instruction(q, instr);
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ME
623 check(instr_is_branch_to_addr(p, addr));
624 check(instr_is_branch_to_addr(q, addr));
f8faaffa 625 check(ppc_inst_equal(ppc_inst_read(q), ppc_inst(0x4a000000)));
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ME
626
627 /* Maximum positive case, move x to x - 32 MB + 4 */
628 p = buf + 0x2000000;
629 addr = (unsigned long)p;
630 patch_branch(p, addr, 0);
631 q = buf + 4;
7c95d889
JN
632 translate_branch(&instr, q, p);
633 patch_instruction(q, instr);
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ME
634 check(instr_is_branch_to_addr(p, addr));
635 check(instr_is_branch_to_addr(q, addr));
f8faaffa 636 check(ppc_inst_equal(ppc_inst_read(q), ppc_inst(0x49fffffc)));
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ME
637
638 /* Jump to x + 16 MB moved to x + 20 MB */
639 p = buf;
640 addr = 0x1000000 + (unsigned long)buf;
641 patch_branch(p, addr, BRANCH_SET_LINK);
642 q = buf + 0x1400000;
7c95d889
JN
643 translate_branch(&instr, q, p);
644 patch_instruction(q, instr);
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ME
645 check(instr_is_branch_to_addr(p, addr));
646 check(instr_is_branch_to_addr(q, addr));
647
648 /* Jump to x + 16 MB moved to x - 16 MB + 4 */
649 p = buf + 0x1000000;
650 addr = 0x2000000 + (unsigned long)buf;
651 patch_branch(p, addr, 0);
652 q = buf + 4;
7c95d889
JN
653 translate_branch(&instr, q, p);
654 patch_instruction(q, instr);
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ME
655 check(instr_is_branch_to_addr(p, addr));
656 check(instr_is_branch_to_addr(q, addr));
657
658
659 /* Conditional branch tests */
660
661 /* Simple case, branch to self moved a little */
662 p = buf;
663 addr = (unsigned long)p;
7c95d889
JN
664 create_cond_branch(&instr, p, addr, 0);
665 patch_instruction(p, instr);
ae0dc736 666 check(instr_is_branch_to_addr(p, addr));
0b582db5 667 q = buf + 4;
7c95d889
JN
668 translate_branch(&instr, q, p);
669 patch_instruction(q, instr);
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670 check(instr_is_branch_to_addr(q, addr));
671
672 /* Maximum negative case, move b . to addr + 32 KB */
673 p = buf;
674 addr = (unsigned long)p;
7c95d889
JN
675 create_cond_branch(&instr, p, addr, 0xFFFFFFFC);
676 patch_instruction(p, instr);
ae0dc736 677 q = buf + 0x8000;
7c95d889
JN
678 translate_branch(&instr, q, p);
679 patch_instruction(q, instr);
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ME
680 check(instr_is_branch_to_addr(p, addr));
681 check(instr_is_branch_to_addr(q, addr));
f8faaffa 682 check(ppc_inst_equal(ppc_inst_read(q), ppc_inst(0x43ff8000)));
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ME
683
684 /* Maximum positive case, move x to x - 32 KB + 4 */
685 p = buf + 0x8000;
686 addr = (unsigned long)p;
7c95d889
JN
687 create_cond_branch(&instr, p, addr, 0xFFFFFFFC);
688 patch_instruction(p, instr);
ae0dc736 689 q = buf + 4;
7c95d889
JN
690 translate_branch(&instr, q, p);
691 patch_instruction(q, instr);
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ME
692 check(instr_is_branch_to_addr(p, addr));
693 check(instr_is_branch_to_addr(q, addr));
f8faaffa 694 check(ppc_inst_equal(ppc_inst_read(q), ppc_inst(0x43ff7ffc)));
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ME
695
696 /* Jump to x + 12 KB moved to x + 20 KB */
697 p = buf;
698 addr = 0x3000 + (unsigned long)buf;
7c95d889
JN
699 create_cond_branch(&instr, p, addr, BRANCH_SET_LINK);
700 patch_instruction(p, instr);
ae0dc736 701 q = buf + 0x5000;
7c95d889
JN
702 translate_branch(&instr, q, p);
703 patch_instruction(q, instr);
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ME
704 check(instr_is_branch_to_addr(p, addr));
705 check(instr_is_branch_to_addr(q, addr));
706
707 /* Jump to x + 8 KB moved to x - 8 KB + 4 */
708 p = buf + 0x2000;
709 addr = 0x4000 + (unsigned long)buf;
7c95d889
JN
710 create_cond_branch(&instr, p, addr, 0);
711 patch_instruction(p, instr);
ae0dc736 712 q = buf + 4;
7c95d889
JN
713 translate_branch(&instr, q, p);
714 patch_instruction(q, instr);
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ME
715 check(instr_is_branch_to_addr(p, addr));
716 check(instr_is_branch_to_addr(q, addr));
717
718 /* Free the buffer we were using */
719 vfree(buf);
720}
721
f77f8ff7
JN
722#ifdef CONFIG_PPC64
723static void __init test_prefixed_patching(void)
724{
725 extern unsigned int code_patching_test1[];
726 extern unsigned int code_patching_test1_expected[];
727 extern unsigned int end_code_patching_test1[];
728
729 __patch_instruction((struct ppc_inst *)code_patching_test1,
730 ppc_inst_prefix(OP_PREFIX << 26, 0x00000000),
731 (struct ppc_inst *)code_patching_test1);
732
733 check(!memcmp(code_patching_test1,
734 code_patching_test1_expected,
735 sizeof(unsigned int) *
736 (end_code_patching_test1 - code_patching_test1)));
737}
738#else
739static inline void test_prefixed_patching(void) {}
740#endif
741
ae0dc736
ME
742static int __init test_code_patching(void)
743{
744 printk(KERN_DEBUG "Running code patching self-tests ...\n");
745
746 test_branch_iform();
747 test_branch_bform();
748 test_create_function_call();
749 test_translate_branch();
f77f8ff7 750 test_prefixed_patching();
ae0dc736
ME
751
752 return 0;
753}
754late_initcall(test_code_patching);
755
756#endif /* CONFIG_CODE_PATCHING_SELFTEST */